| commit | acea1f512ea804d7c35b60682f62327dceea1e18 | [log] [tgz] |
|---|---|---|
| author | Rahul Joshi <rjoshi@nvidia.com> | Wed Sep 10 05:36:51 2025 -0700 |
| committer | GitHub <noreply@github.com> | Wed Sep 10 05:36:51 2025 -0700 |
| tree | 7a3bad1bb586c6908356c6e246c7478b6437dcb1 | |
| parent | 79e93178934eb93acf252de093c263f4db9eb8b7 [diff] |
[LLVM][MC][CodeEmitterGen] Reduce various `InstBits` table sizes (#156213) Change various `InstBits` tables have an entry only for non-pseudo target instructions and adjust the indexing into these tables accordingly. Some minor refactoring related to this: - Use early return after handling variable length encodings - Reduce the scope of anonymous namespace to just the class declaration. Example reductions in these table sizes for some targets: ``` Target FirstSupportedOpcode Reduction in size AMDGPU 10813 10813 * 16 = 168KB RISCV 12051 12051 * 8 = 94KB ```
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