# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=thumbv8.1m.main-none-unknown-eabi -mattr=+mve -run-pass=arm-low-overhead-loops -arm-enable-subreg-liveness %s -o - --verify-machineinstrs | FileCheck %s

--- |
  %struct.arm_2d_size_t = type { i16, i16 }
  define void @none(i16* noalias nocapture %phwTargetBase, i16 signext %iTargetStride, %struct.arm_2d_size_t* noalias nocapture readonly %ptCopySize, i16 zeroext %hwColour, i32 %chRatio) {
    unreachable
  }
  define void @copyin(i16* noalias nocapture %phwTargetBase, i16 signext %iTargetStride, %struct.arm_2d_size_t* noalias nocapture readonly %ptCopySize, i16 zeroext %hwColour, i32 %chRatio) {
    unreachable
  }
  define void @copyout(i16* noalias nocapture %phwTargetBase, i16 signext %iTargetStride, %struct.arm_2d_size_t* noalias nocapture readonly %ptCopySize, i16 zeroext %hwColour, i32 %chRatio) {
    unreachable
  }
...
---
name:            none
tracksRegLiveness: true
registers:       []
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
  - { reg: '$r2', virtual-reg: '' }
body:             |
  ; CHECK-LABEL: name: none
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.5(0x5c0b8170), %bb.1(0x23f47e90)
  ; CHECK-NEXT:   liveins: $r0, $r1, $r2, $r4, $r5, $r6, $lr
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $r5, killed $r6, killed $lr, implicit-def $sp, implicit $sp
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION def_cfa_offset 16
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $lr, -4
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $r6, -8
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $r5, -12
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $r4, -16
  ; CHECK-NEXT:   renamable $r12 = t2LDRSHi12 renamable $r2, 2, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   t2CMPri renamable $r12, 1, 14 /* CC::al */, $noreg, implicit-def $cpsr
  ; CHECK-NEXT:   t2IT 10, 4, implicit-def $itstate
  ; CHECK-NEXT:   renamable $r2 = t2LDRSHi12 killed renamable $r2, 0, 10 /* CC::ge */, $cpsr, implicit $r2, implicit $itstate
  ; CHECK-NEXT:   tCMPi8 renamable $r2, 1, 10 /* CC::ge */, killed $cpsr, implicit-def $cpsr, implicit killed $itstate
  ; CHECK-NEXT:   tBcc %bb.5, 11 /* CC::lt */, killed $cpsr
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT:   liveins: $r0, $r1, $r2, $r12
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   renamable $r3 = t2LDRHi12 $sp, 16, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   renamable $r1, dead $cpsr = nsw tLSLri killed renamable $r1, 1, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   renamable $r3 = t2RSBri killed renamable $r3, 256, 14 /* CC::al */, $noreg, $noreg
  ; CHECK-NEXT:   renamable $q0 = MVE_VDUP16 killed renamable $r3, 0, $noreg, $noreg, undef renamable $q0
  ; CHECK-NEXT:   renamable $r3, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
  ; CHECK-NEXT:   liveins: $q0, $r0, $r1, $r2, $r3, $r6, $r12
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   $r4 = tMOVr $r0, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   $lr = MVE_DLSTP_16 renamable $r2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.3:
  ; CHECK-NEXT:   successors: %bb.3(0x7c000000), %bb.4(0x04000000)
  ; CHECK-NEXT:   liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r4, $r6, $r12
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   renamable $q1 = MVE_VLDRHU16 renamable $r4, 0, 0, $noreg, renamable $lr
  ; CHECK-NEXT:   renamable $q1 = MVE_VAND killed renamable $q1, renamable $q0, 0, $noreg, renamable $lr, undef renamable $q1
  ; CHECK-NEXT:   renamable $r4 = MVE_VSTRHU16_post killed renamable $q1, killed renamable $r4, 16, 0, killed $noreg, renamable $lr
  ; CHECK-NEXT:   $lr = MVE_LETP killed renamable $lr, %bb.3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.4:
  ; CHECK-NEXT:   successors: %bb.5(0x04000000), %bb.2(0x7c000000)
  ; CHECK-NEXT:   liveins: $q0, $r0, $r1, $r2, $r3, $r6, $r12
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   renamable $r3, dead $cpsr = nuw nsw tADDi8 killed renamable $r3, 1, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   renamable $r0 = tADDhirr killed renamable $r0, renamable $r1, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   tCMPhir renamable $r3, renamable $r12, 14 /* CC::al */, $noreg, implicit-def $cpsr
  ; CHECK-NEXT:   tBcc %bb.2, 1 /* CC::ne */, killed $cpsr
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.5:
  ; CHECK-NEXT:   frame-destroy tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $pc
  bb.0:
    successors: %bb.5(0x80000000), %bb.1(0x32000000)
    liveins: $r0, $r1, $r2, $r4, $r5, $r6, $lr

    frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $r5, killed $r6, killed $lr, implicit-def $sp, implicit $sp
    frame-setup CFI_INSTRUCTION def_cfa_offset 16
    frame-setup CFI_INSTRUCTION offset $lr, -4
    frame-setup CFI_INSTRUCTION offset $r6, -8
    frame-setup CFI_INSTRUCTION offset $r5, -12
    frame-setup CFI_INSTRUCTION offset $r4, -16
    renamable $r12 = t2LDRSHi12 renamable $r2, 2, 14 /* CC::al */, $noreg
    t2CMPri renamable $r12, 1, 14 /* CC::al */, $noreg, implicit-def $cpsr
    t2IT 10, 4, implicit-def $itstate
    renamable $r2 = t2LDRSHi12 killed renamable $r2, 0, 10 /* CC::ge */, $cpsr, implicit $r2, implicit $itstate
    tCMPi8 renamable $r2, 1, 10 /* CC::ge */, killed $cpsr, implicit-def $cpsr, implicit killed $itstate
    tBcc %bb.5, 11 /* CC::lt */, killed $cpsr

  bb.1:
    successors: %bb.2(0x80000000)
    liveins: $r0, $r1, $r2, $r12

    renamable $r3 = t2LDRHi12 $sp, 16, 14 /* CC::al */, $noreg
    renamable $r6, dead $cpsr = nsw tADDi3 renamable $r2, 7, 14 /* CC::al */, $noreg
    renamable $r5, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
    renamable $r1, dead $cpsr = nsw tLSLri killed renamable $r1, 1, 14 /* CC::al */, $noreg
    renamable $r3 = t2RSBri killed renamable $r3, 256, 14 /* CC::al */, $noreg, $noreg
    renamable $q0 = MVE_VDUP16 killed renamable $r3, 0, $noreg, $noreg, undef renamable $q0
    renamable $r3 = t2BICri killed renamable $r6, 7, 14 /* CC::al */, $noreg, $noreg
    renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 8, 14 /* CC::al */, $noreg
    renamable $r6 = nuw nsw t2ADDrs killed renamable $r5, killed renamable $r3, 27, 14 /* CC::al */, $noreg, $noreg
    renamable $r3, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg

  bb.2:
    successors: %bb.3(0x80000000)
    liveins: $q0, $r0, $r1, $r2, $r3, $r6, $r12

    $r4 = tMOVr $r0, 14 /* CC::al */, $noreg
    $r5 = tMOVr $r2, 14 /* CC::al */, $noreg
    renamable $lr = t2DoLoopStartTP renamable $r6, renamable $r2

  bb.3:
    successors: %bb.3(0x7c000000), %bb.4(0x04000000)
    liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r12

    renamable $vpr = MVE_VCTP16 renamable $r5, 0, $noreg, $noreg
    renamable $r5, dead $cpsr = tSUBi8 killed renamable $r5, 8, 14 /* CC::al */, $noreg
    MVE_VPST 8, implicit $vpr
    renamable $q1 = MVE_VLDRHU16 renamable $r4, 0, 1, renamable $vpr, renamable $lr
    renamable $q1 = MVE_VAND killed renamable $q1, renamable $q0, 0, $noreg, renamable $lr, undef renamable $q1
    MVE_VPST 8, implicit $vpr
    renamable $r4 = MVE_VSTRHU16_post killed renamable $q1, killed renamable $r4, 16, 1, killed renamable $vpr, renamable $lr
    renamable $lr = t2LoopEndDec killed renamable $lr, %bb.3, implicit-def dead $cpsr
    tB %bb.4, 14 /* CC::al */, $noreg

  bb.4:
    successors: %bb.5(0x04000000), %bb.2(0x7c000000)
    liveins: $q0, $r0, $r1, $r2, $r3, $r6, $r12

    renamable $r3, dead $cpsr = nuw nsw tADDi8 killed renamable $r3, 1, 14 /* CC::al */, $noreg
    renamable $r0 = tADDhirr killed renamable $r0, renamable $r1, 14 /* CC::al */, $noreg
    tCMPhir renamable $r3, renamable $r12, 14 /* CC::al */, $noreg, implicit-def $cpsr
    tBcc %bb.2, 1 /* CC::ne */, killed $cpsr

  bb.5:
    frame-destroy tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $pc

...
---
name:            copyin
tracksRegLiveness: true
registers:       []
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
  - { reg: '$r2', virtual-reg: '' }
body:             |
  ; CHECK-LABEL: name: copyin
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.5(0x5c0b8170), %bb.1(0x23f47e90)
  ; CHECK-NEXT:   liveins: $r0, $r1, $r2, $r4, $r5, $r6, $lr
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $r5, killed $r6, killed $lr, implicit-def $sp, implicit $sp
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION def_cfa_offset 16
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $lr, -4
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $r6, -8
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $r5, -12
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $r4, -16
  ; CHECK-NEXT:   renamable $r12 = t2LDRSHi12 renamable $r2, 2, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   t2CMPri renamable $r12, 1, 14 /* CC::al */, $noreg, implicit-def $cpsr
  ; CHECK-NEXT:   t2IT 10, 4, implicit-def $itstate
  ; CHECK-NEXT:   renamable $r2 = t2LDRSHi12 killed renamable $r2, 0, 10 /* CC::ge */, $cpsr, implicit $r2, implicit $itstate
  ; CHECK-NEXT:   tCMPi8 renamable $r2, 1, 10 /* CC::ge */, killed $cpsr, implicit-def $cpsr, implicit killed $itstate
  ; CHECK-NEXT:   tBcc %bb.5, 11 /* CC::lt */, killed $cpsr
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT:   liveins: $r0, $r1, $r2, $r12
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   renamable $r3 = t2LDRHi12 $sp, 16, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   renamable $r1, dead $cpsr = nsw tLSLri killed renamable $r1, 1, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   renamable $r3 = t2RSBri killed renamable $r3, 256, 14 /* CC::al */, $noreg, $noreg
  ; CHECK-NEXT:   renamable $q0 = MVE_VDUP16 killed renamable $r3, 0, $noreg, $noreg, undef renamable $q0
  ; CHECK-NEXT:   renamable $r3, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
  ; CHECK-NEXT:   liveins: $q0, $r0, $r1, $r2, $r3, $r6, $r12
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   $r4 = tMOVr $r0, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   $lr = MVE_DLSTP_16 renamable $r2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.3:
  ; CHECK-NEXT:   successors: %bb.3(0x7c000000), %bb.4(0x04000000)
  ; CHECK-NEXT:   liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r4, $r6, $r12
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   renamable $q1 = MVE_VLDRHU16 renamable $r4, 0, 0, $noreg, renamable $lr
  ; CHECK-NEXT:   $q2 = MVE_VORR $q0, $q0, 0, $noreg, $noreg, undef $q2
  ; CHECK-NEXT:   renamable $q1 = MVE_VAND killed renamable $q1, killed renamable $q2, 0, $noreg, renamable $lr, undef renamable $q1
  ; CHECK-NEXT:   renamable $r4 = MVE_VSTRHU16_post killed renamable $q1, killed renamable $r4, 16, 0, killed $noreg, renamable $lr
  ; CHECK-NEXT:   $lr = MVE_LETP killed renamable $lr, %bb.3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.4:
  ; CHECK-NEXT:   successors: %bb.5(0x04000000), %bb.2(0x7c000000)
  ; CHECK-NEXT:   liveins: $q0, $r0, $r1, $r2, $r3, $r6, $r12
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   renamable $r3, dead $cpsr = nuw nsw tADDi8 killed renamable $r3, 1, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   renamable $r0 = tADDhirr killed renamable $r0, renamable $r1, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   tCMPhir renamable $r3, renamable $r12, 14 /* CC::al */, $noreg, implicit-def $cpsr
  ; CHECK-NEXT:   tBcc %bb.2, 1 /* CC::ne */, killed $cpsr
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.5:
  ; CHECK-NEXT:   frame-destroy tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $pc
  bb.0:
    successors: %bb.5(0x80000000), %bb.1(0x32000000)
    liveins: $r0, $r1, $r2, $r4, $r5, $r6, $lr

    frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $r5, killed $r6, killed $lr, implicit-def $sp, implicit $sp
    frame-setup CFI_INSTRUCTION def_cfa_offset 16
    frame-setup CFI_INSTRUCTION offset $lr, -4
    frame-setup CFI_INSTRUCTION offset $r6, -8
    frame-setup CFI_INSTRUCTION offset $r5, -12
    frame-setup CFI_INSTRUCTION offset $r4, -16
    renamable $r12 = t2LDRSHi12 renamable $r2, 2, 14 /* CC::al */, $noreg
    t2CMPri renamable $r12, 1, 14 /* CC::al */, $noreg, implicit-def $cpsr
    t2IT 10, 4, implicit-def $itstate
    renamable $r2 = t2LDRSHi12 killed renamable $r2, 0, 10 /* CC::ge */, $cpsr, implicit $r2, implicit $itstate
    tCMPi8 renamable $r2, 1, 10 /* CC::ge */, killed $cpsr, implicit-def $cpsr, implicit killed $itstate
    tBcc %bb.5, 11 /* CC::lt */, killed $cpsr

  bb.1:
    successors: %bb.2(0x80000000)
    liveins: $r0, $r1, $r2, $r12

    renamable $r3 = t2LDRHi12 $sp, 16, 14 /* CC::al */, $noreg
    renamable $r6, dead $cpsr = nsw tADDi3 renamable $r2, 7, 14 /* CC::al */, $noreg
    renamable $r5, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
    renamable $r1, dead $cpsr = nsw tLSLri killed renamable $r1, 1, 14 /* CC::al */, $noreg
    renamable $r3 = t2RSBri killed renamable $r3, 256, 14 /* CC::al */, $noreg, $noreg
    renamable $q0 = MVE_VDUP16 killed renamable $r3, 0, $noreg, $noreg, undef renamable $q0
    renamable $r3 = t2BICri killed renamable $r6, 7, 14 /* CC::al */, $noreg, $noreg
    renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 8, 14 /* CC::al */, $noreg
    renamable $r6 = nuw nsw t2ADDrs killed renamable $r5, killed renamable $r3, 27, 14 /* CC::al */, $noreg, $noreg
    renamable $r3, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg

  bb.2:
    successors: %bb.3(0x80000000)
    liveins: $q0, $r0, $r1, $r2, $r3, $r6, $r12

    $r4 = tMOVr $r0, 14 /* CC::al */, $noreg
    $r5 = tMOVr $r2, 14 /* CC::al */, $noreg
    renamable $lr = t2DoLoopStartTP renamable $r6, renamable $r2

  bb.3:
    successors: %bb.3(0x7c000000), %bb.4(0x04000000)
    liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r12

    renamable $vpr = MVE_VCTP16 renamable $r5, 0, $noreg, $noreg
    renamable $r5, dead $cpsr = tSUBi8 killed renamable $r5, 8, 14 /* CC::al */, $noreg
    MVE_VPST 8, implicit $vpr
    renamable $q1 = MVE_VLDRHU16 renamable $r4, 0, 1, renamable $vpr, renamable $lr
    $q2 = MQPRCopy $q0
    renamable $q1 = MVE_VAND killed renamable $q1, renamable $q2, 0, $noreg, renamable $lr, undef renamable $q1
    MVE_VPST 8, implicit $vpr
    renamable $r4 = MVE_VSTRHU16_post killed renamable $q1, killed renamable $r4, 16, 1, killed renamable $vpr, renamable $lr
    renamable $lr = t2LoopEndDec killed renamable $lr, %bb.3, implicit-def dead $cpsr
    tB %bb.4, 14 /* CC::al */, $noreg

  bb.4:
    successors: %bb.5(0x04000000), %bb.2(0x7c000000)
    liveins: $q0, $r0, $r1, $r2, $r3, $r6, $r12

    renamable $r3, dead $cpsr = nuw nsw tADDi8 killed renamable $r3, 1, 14 /* CC::al */, $noreg
    renamable $r0 = tADDhirr killed renamable $r0, renamable $r1, 14 /* CC::al */, $noreg
    tCMPhir renamable $r3, renamable $r12, 14 /* CC::al */, $noreg, implicit-def $cpsr
    tBcc %bb.2, 1 /* CC::ne */, killed $cpsr

  bb.5:
    frame-destroy tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $pc

...
---
name:            copyout
tracksRegLiveness: true
registers:       []
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
  - { reg: '$r2', virtual-reg: '' }
body:             |
  ; CHECK-LABEL: name: copyout
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.5(0x5c0b8170), %bb.1(0x23f47e90)
  ; CHECK-NEXT:   liveins: $r0, $r1, $r2, $r4, $r5, $r6, $lr
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $r5, killed $r6, killed $lr, implicit-def $sp, implicit $sp
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION def_cfa_offset 16
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $lr, -4
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $r6, -8
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $r5, -12
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $r4, -16
  ; CHECK-NEXT:   renamable $r12 = t2LDRSHi12 renamable $r2, 2, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   t2CMPri renamable $r12, 1, 14 /* CC::al */, $noreg, implicit-def $cpsr
  ; CHECK-NEXT:   t2IT 10, 4, implicit-def $itstate
  ; CHECK-NEXT:   renamable $r2 = t2LDRSHi12 killed renamable $r2, 0, 10 /* CC::ge */, $cpsr, implicit $r2, implicit $itstate
  ; CHECK-NEXT:   tCMPi8 renamable $r2, 1, 10 /* CC::ge */, killed $cpsr, implicit-def $cpsr, implicit killed $itstate
  ; CHECK-NEXT:   tBcc %bb.5, 11 /* CC::lt */, killed $cpsr
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT:   liveins: $r0, $r1, $r2, $r12
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   renamable $r3 = t2LDRHi12 $sp, 16, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   renamable $r1, dead $cpsr = nsw tLSLri killed renamable $r1, 1, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   renamable $r3 = t2RSBri killed renamable $r3, 256, 14 /* CC::al */, $noreg, $noreg
  ; CHECK-NEXT:   renamable $q0 = MVE_VDUP16 killed renamable $r3, 0, $noreg, $noreg, undef renamable $q0
  ; CHECK-NEXT:   renamable $r3, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
  ; CHECK-NEXT:   liveins: $d0, $d1, $r0, $r1, $r2, $r3, $r6, $r12
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   $r4 = tMOVr $r0, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   $lr = MVE_DLSTP_16 renamable $r2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.3:
  ; CHECK-NEXT:   successors: %bb.3(0x7c000000), %bb.4(0x04000000)
  ; CHECK-NEXT:   liveins: $lr, $d0, $d1, $r0, $r1, $r2, $r3, $r4, $r6, $r12
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   renamable $q1 = MVE_VLDRHU16 renamable $r4, 0, 0, $noreg, renamable $lr
  ; CHECK-NEXT:   $d4 = VMOVD killed $d0, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   $d5 = VMOVD killed $d1, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   renamable $q1 = MVE_VAND killed renamable $q1, renamable $q2, 0, $noreg, renamable $lr, undef renamable $q1
  ; CHECK-NEXT:   $d0 = VMOVD killed $d4, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   $d1 = VMOVD killed $d5, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   renamable $r4 = MVE_VSTRHU16_post killed renamable $q1, killed renamable $r4, 16, 0, killed $noreg, renamable $lr
  ; CHECK-NEXT:   $lr = MVE_LETP killed renamable $lr, %bb.3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.4:
  ; CHECK-NEXT:   successors: %bb.5(0x04000000), %bb.2(0x7c000000)
  ; CHECK-NEXT:   liveins: $q0, $r0, $r1, $r2, $r3, $r6, $r12
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   renamable $r3, dead $cpsr = nuw nsw tADDi8 killed renamable $r3, 1, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   renamable $r0 = tADDhirr killed renamable $r0, renamable $r1, 14 /* CC::al */, $noreg
  ; CHECK-NEXT:   tCMPhir renamable $r3, renamable $r12, 14 /* CC::al */, $noreg, implicit-def $cpsr
  ; CHECK-NEXT:   tBcc %bb.2, 1 /* CC::ne */, killed $cpsr
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.5:
  ; CHECK-NEXT:   frame-destroy tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $pc
  bb.0:
    successors: %bb.5(0x80000000), %bb.1(0x32000000)
    liveins: $r0, $r1, $r2, $r4, $r5, $r6, $lr

    frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $r5, killed $r6, killed $lr, implicit-def $sp, implicit $sp
    frame-setup CFI_INSTRUCTION def_cfa_offset 16
    frame-setup CFI_INSTRUCTION offset $lr, -4
    frame-setup CFI_INSTRUCTION offset $r6, -8
    frame-setup CFI_INSTRUCTION offset $r5, -12
    frame-setup CFI_INSTRUCTION offset $r4, -16
    renamable $r12 = t2LDRSHi12 renamable $r2, 2, 14 /* CC::al */, $noreg
    t2CMPri renamable $r12, 1, 14 /* CC::al */, $noreg, implicit-def $cpsr
    t2IT 10, 4, implicit-def $itstate
    renamable $r2 = t2LDRSHi12 killed renamable $r2, 0, 10 /* CC::ge */, $cpsr, implicit $r2, implicit $itstate
    tCMPi8 renamable $r2, 1, 10 /* CC::ge */, killed $cpsr, implicit-def $cpsr, implicit killed $itstate
    tBcc %bb.5, 11 /* CC::lt */, killed $cpsr

  bb.1:
    successors: %bb.2(0x80000000)
    liveins: $r0, $r1, $r2, $r12

    renamable $r3 = t2LDRHi12 $sp, 16, 14 /* CC::al */, $noreg
    renamable $r6, dead $cpsr = nsw tADDi3 renamable $r2, 7, 14 /* CC::al */, $noreg
    renamable $r5, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
    renamable $r1, dead $cpsr = nsw tLSLri killed renamable $r1, 1, 14 /* CC::al */, $noreg
    renamable $r3 = t2RSBri killed renamable $r3, 256, 14 /* CC::al */, $noreg, $noreg
    renamable $q0 = MVE_VDUP16 killed renamable $r3, 0, $noreg, $noreg, undef renamable $q0
    renamable $r3 = t2BICri killed renamable $r6, 7, 14 /* CC::al */, $noreg, $noreg
    renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 8, 14 /* CC::al */, $noreg
    renamable $r6 = nuw nsw t2ADDrs killed renamable $r5, killed renamable $r3, 27, 14 /* CC::al */, $noreg, $noreg
    renamable $r3, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg

  bb.2:
    successors: %bb.3(0x80000000)
    liveins: $q0, $r0, $r1, $r2, $r3, $r6, $r12

    $r4 = tMOVr $r0, 14 /* CC::al */, $noreg
    $r5 = tMOVr $r2, 14 /* CC::al */, $noreg
    renamable $lr = t2DoLoopStartTP renamable $r6, renamable $r2

  bb.3:
    successors: %bb.3(0x7c000000), %bb.4(0x04000000)
    liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r12

    renamable $vpr = MVE_VCTP16 renamable $r5, 0, $noreg, $noreg
    renamable $r5, dead $cpsr = tSUBi8 killed renamable $r5, 8, 14 /* CC::al */, $noreg
    MVE_VPST 8, implicit $vpr
    renamable $q1 = MVE_VLDRHU16 renamable $r4, 0, 1, renamable $vpr, renamable $lr
    $q2 = MQPRCopy $q0
    renamable $q1 = MVE_VAND killed renamable $q1, renamable $q2, 0, $noreg, renamable $lr, undef renamable $q1
    $q0 = MQPRCopy $q2
    MVE_VPST 8, implicit $vpr
    renamable $r4 = MVE_VSTRHU16_post killed renamable $q1, killed renamable $r4, 16, 1, killed renamable $vpr, renamable $lr
    renamable $lr = t2LoopEndDec killed renamable $lr, %bb.3, implicit-def dead $cpsr
    tB %bb.4, 14 /* CC::al */, $noreg

  bb.4:
    successors: %bb.5(0x04000000), %bb.2(0x7c000000)
    liveins: $q0, $r0, $r1, $r2, $r3, $r6, $r12

    renamable $r3, dead $cpsr = nuw nsw tADDi8 killed renamable $r3, 1, 14 /* CC::al */, $noreg
    renamable $r0 = tADDhirr killed renamable $r0, renamable $r1, 14 /* CC::al */, $noreg
    tCMPhir renamable $r3, renamable $r12, 14 /* CC::al */, $noreg, implicit-def $cpsr
    tBcc %bb.2, 1 /* CC::ne */, killed $cpsr

  bb.5:
    frame-destroy tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $pc

...