| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py |
| ; RUN: opt -mtriple=thumbv7-unknown-linux-android -arm-parallel-dsp -S %s -o - | FileCheck %s |
| |
| define void @undef_no_return(i16* %a) { |
| ; CHECK-LABEL: @undef_no_return( |
| ; CHECK-NEXT: entry: |
| ; CHECK-NEXT: [[INCDEC_PTR21:%.*]] = getelementptr inbounds i16, i16* [[A:%.*]], i32 3 |
| ; CHECK-NEXT: [[INCDEC_PTR29:%.*]] = getelementptr inbounds i16, i16* [[A]], i32 4 |
| ; CHECK-NEXT: br label [[FOR_BODY:%.*]] |
| ; CHECK: for.body: |
| ; CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* [[INCDEC_PTR21]], align 2 |
| ; CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[INCDEC_PTR21]] to i32* |
| ; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 2 |
| ; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i16 |
| ; CHECK-NEXT: [[TMP4:%.*]] = sext i16 [[TMP3]] to i32 |
| ; CHECK-NEXT: [[TMP5:%.*]] = lshr i32 [[TMP2]], 16 |
| ; CHECK-NEXT: [[TMP6:%.*]] = trunc i32 [[TMP5]] to i16 |
| ; CHECK-NEXT: [[TMP7:%.*]] = sext i16 [[TMP6]] to i32 |
| ; CHECK-NEXT: [[CONV25:%.*]] = sext i16 [[TMP0]] to i32 |
| ; CHECK-NEXT: [[UGLYGEP15:%.*]] = getelementptr i8, i8* undef, i32 undef |
| ; CHECK-NEXT: [[UGLYGEP1516:%.*]] = bitcast i8* [[UGLYGEP15]] to i16* |
| ; CHECK-NEXT: [[SCEVGEP17:%.*]] = getelementptr i16, i16* [[UGLYGEP1516]], i32 7 |
| ; CHECK-NEXT: [[TMP8:%.*]] = load i16, i16* [[SCEVGEP17]], align 2 |
| ; CHECK-NEXT: [[UGLYGEP12:%.*]] = getelementptr i8, i8* undef, i32 undef |
| ; CHECK-NEXT: [[UGLYGEP1213:%.*]] = bitcast i8* [[UGLYGEP12]] to i16* |
| ; CHECK-NEXT: [[SCEVGEP14:%.*]] = getelementptr i16, i16* [[UGLYGEP1213]], i32 6 |
| ; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16* [[SCEVGEP14]] to i32* |
| ; CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 2 |
| ; CHECK-NEXT: [[TMP11:%.*]] = trunc i32 [[TMP10]] to i16 |
| ; CHECK-NEXT: [[TMP12:%.*]] = call i32 @llvm.arm.smladx(i32 [[TMP10]], i32 [[TMP2]], i32 undef) |
| ; CHECK-NEXT: [[TMP13:%.*]] = sext i16 [[TMP11]] to i32 |
| ; CHECK-NEXT: [[TMP14:%.*]] = lshr i32 [[TMP10]], 16 |
| ; CHECK-NEXT: [[TMP15:%.*]] = trunc i32 [[TMP14]] to i16 |
| ; CHECK-NEXT: [[TMP16:%.*]] = sext i16 [[TMP15]] to i32 |
| ; CHECK-NEXT: [[CONV31:%.*]] = sext i16 [[TMP8]] to i32 |
| ; CHECK-NEXT: [[TMP17:%.*]] = load i16, i16* [[INCDEC_PTR29]], align 2 |
| ; CHECK-NEXT: [[CONV33:%.*]] = sext i16 [[TMP17]] to i32 |
| ; CHECK-NEXT: [[TMP18:%.*]] = load i16, i16* [[SCEVGEP14]], align 2 |
| ; CHECK-NEXT: [[CONV39:%.*]] = sext i16 [[TMP18]] to i32 |
| ; CHECK-NEXT: [[MUL_I287_NEG_NEG:%.*]] = mul nsw i32 [[TMP16]], [[TMP4]] |
| ; CHECK-NEXT: [[MUL_I283_NEG_NEG:%.*]] = mul nsw i32 [[TMP13]], [[TMP7]] |
| ; CHECK-NEXT: [[REASS_ADD408:%.*]] = add i32 undef, [[MUL_I287_NEG_NEG]] |
| ; CHECK-NEXT: [[REASS_ADD409:%.*]] = add i32 [[REASS_ADD408]], [[MUL_I283_NEG_NEG]] |
| ; CHECK-NEXT: br label [[FOR_BODY]] |
| ; |
| entry: |
| %incdec.ptr21 = getelementptr inbounds i16, i16* %a, i32 3 |
| %incdec.ptr29 = getelementptr inbounds i16, i16* %a, i32 4 |
| br label %for.body |
| |
| for.body: |
| %0 = load i16, i16* %incdec.ptr21, align 2 |
| %conv25 = sext i16 %0 to i32 |
| %uglygep15 = getelementptr i8, i8* undef, i32 undef |
| %uglygep1516 = bitcast i8* %uglygep15 to i16* |
| %scevgep17 = getelementptr i16, i16* %uglygep1516, i32 7 |
| %1 = load i16, i16* %scevgep17, align 2 |
| %conv31 = sext i16 %1 to i32 |
| %2 = load i16, i16* %incdec.ptr29, align 2 |
| %conv33 = sext i16 %2 to i32 |
| %uglygep12 = getelementptr i8, i8* undef, i32 undef |
| %uglygep1213 = bitcast i8* %uglygep12 to i16* |
| %scevgep14 = getelementptr i16, i16* %uglygep1213, i32 6 |
| %3 = load i16, i16* %scevgep14, align 2 |
| %conv39 = sext i16 %3 to i32 |
| %mul.i287.neg.neg = mul nsw i32 %conv31, %conv25 |
| %mul.i283.neg.neg = mul nsw i32 %conv39, %conv33 |
| %reass.add408 = add i32 undef, %mul.i287.neg.neg |
| %reass.add409 = add i32 %reass.add408, %mul.i283.neg.neg |
| br label %for.body |
| } |
| |
| define i32 @return(i16* %a, i8* %b, i32 %N) { |
| ; CHECK-LABEL: @return( |
| ; CHECK-NEXT: entry: |
| ; CHECK-NEXT: [[INCDEC_PTR21:%.*]] = getelementptr inbounds i16, i16* [[A:%.*]], i32 3 |
| ; CHECK-NEXT: [[INCDEC_PTR29:%.*]] = getelementptr inbounds i16, i16* [[A]], i32 4 |
| ; CHECK-NEXT: br label [[FOR_BODY:%.*]] |
| ; CHECK: for.body: |
| ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[N:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY]] ] |
| ; CHECK-NEXT: [[ACC:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[TMP12:%.*]], [[FOR_BODY]] ] |
| ; CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* [[INCDEC_PTR21]], align 2 |
| ; CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[INCDEC_PTR21]] to i32* |
| ; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 2 |
| ; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i16 |
| ; CHECK-NEXT: [[TMP4:%.*]] = sext i16 [[TMP3]] to i32 |
| ; CHECK-NEXT: [[TMP5:%.*]] = lshr i32 [[TMP2]], 16 |
| ; CHECK-NEXT: [[TMP6:%.*]] = trunc i32 [[TMP5]] to i16 |
| ; CHECK-NEXT: [[TMP7:%.*]] = sext i16 [[TMP6]] to i32 |
| ; CHECK-NEXT: [[CONV25:%.*]] = sext i16 [[TMP0]] to i32 |
| ; CHECK-NEXT: [[UGLYGEP15:%.*]] = getelementptr i8, i8* [[B:%.*]], i32 0 |
| ; CHECK-NEXT: [[UGLYGEP1516:%.*]] = bitcast i8* [[UGLYGEP15]] to i16* |
| ; CHECK-NEXT: [[B_IDX:%.*]] = add nuw nsw i32 [[IV]], 1 |
| ; CHECK-NEXT: [[SCEVGEP17:%.*]] = getelementptr i16, i16* [[UGLYGEP1516]], i32 [[B_IDX]] |
| ; CHECK-NEXT: [[SCEVGEP14:%.*]] = getelementptr i16, i16* [[UGLYGEP1516]], i32 [[IV]] |
| ; CHECK-NEXT: [[TMP8:%.*]] = load i16, i16* [[SCEVGEP17]], align 2 |
| ; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16* [[SCEVGEP14]] to i32* |
| ; CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 2 |
| ; CHECK-NEXT: [[TMP11:%.*]] = trunc i32 [[TMP10]] to i16 |
| ; CHECK-NEXT: [[TMP12]] = call i32 @llvm.arm.smladx(i32 [[TMP10]], i32 [[TMP2]], i32 [[ACC]]) |
| ; CHECK-NEXT: [[TMP13:%.*]] = sext i16 [[TMP11]] to i32 |
| ; CHECK-NEXT: [[TMP14:%.*]] = lshr i32 [[TMP10]], 16 |
| ; CHECK-NEXT: [[TMP15:%.*]] = trunc i32 [[TMP14]] to i16 |
| ; CHECK-NEXT: [[TMP16:%.*]] = sext i16 [[TMP15]] to i32 |
| ; CHECK-NEXT: [[CONV31:%.*]] = sext i16 [[TMP8]] to i32 |
| ; CHECK-NEXT: [[TMP17:%.*]] = load i16, i16* [[INCDEC_PTR29]], align 2 |
| ; CHECK-NEXT: [[CONV33:%.*]] = sext i16 [[TMP17]] to i32 |
| ; CHECK-NEXT: [[TMP18:%.*]] = load i16, i16* [[SCEVGEP14]], align 2 |
| ; CHECK-NEXT: [[CONV39:%.*]] = sext i16 [[TMP18]] to i32 |
| ; CHECK-NEXT: [[MUL_I287_NEG_NEG:%.*]] = mul nsw i32 [[TMP16]], [[TMP4]] |
| ; CHECK-NEXT: [[MUL_I283_NEG_NEG:%.*]] = mul nsw i32 [[TMP13]], [[TMP7]] |
| ; CHECK-NEXT: [[REASS_ADD408:%.*]] = add i32 [[ACC]], [[MUL_I287_NEG_NEG]] |
| ; CHECK-NEXT: [[REASS_ADD409:%.*]] = add i32 [[REASS_ADD408]], [[MUL_I283_NEG_NEG]] |
| ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], -1 |
| ; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[IV_NEXT]], 0 |
| ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[EXIT:%.*]] |
| ; CHECK: exit: |
| ; CHECK-NEXT: ret i32 [[TMP12]] |
| ; |
| entry: |
| %incdec.ptr21 = getelementptr inbounds i16, i16* %a, i32 3 |
| %incdec.ptr29 = getelementptr inbounds i16, i16* %a, i32 4 |
| br label %for.body |
| |
| for.body: |
| %iv = phi i32 [ %N, %entry ], [ %iv.next, %for.body ] |
| %acc = phi i32 [ 0, %entry ], [ %reass.add409, %for.body ] |
| %0 = load i16, i16* %incdec.ptr21, align 2 |
| %conv25 = sext i16 %0 to i32 |
| %uglygep15 = getelementptr i8, i8* %b, i32 0 |
| %uglygep1516 = bitcast i8* %uglygep15 to i16* |
| %b.idx = add nuw nsw i32 %iv, 1 |
| %scevgep17 = getelementptr i16, i16* %uglygep1516, i32 %b.idx |
| %scevgep14 = getelementptr i16, i16* %uglygep1516, i32 %iv |
| %1 = load i16, i16* %scevgep17, align 2 |
| %conv31 = sext i16 %1 to i32 |
| %2 = load i16, i16* %incdec.ptr29, align 2 |
| %conv33 = sext i16 %2 to i32 |
| %3 = load i16, i16* %scevgep14, align 2 |
| %conv39 = sext i16 %3 to i32 |
| %mul.i287.neg.neg = mul nsw i32 %conv31, %conv25 |
| %mul.i283.neg.neg = mul nsw i32 %conv39, %conv33 |
| %reass.add408 = add i32 %acc, %mul.i287.neg.neg |
| %reass.add409 = add i32 %reass.add408, %mul.i283.neg.neg |
| %iv.next = add nuw nsw i32 %iv, -1 |
| %cmp = icmp ne i32 %iv.next, 0 |
| br i1 %cmp, label %for.body, label %exit |
| |
| exit: |
| ret i32 %reass.add409 |
| } |