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llvm / llvm-project / a619a2e53a9ba09ba18a047b8389bf4dd1912b72
commita619a2e53a9ba09ba18a047b8389bf4dd1912b72[log] [tgz]
authorOliver Stannard <oliver.stannard@arm.com>Tue Mar 04 08:10:22 2025 +0000
committerGitHub <noreply@github.com>Tue Mar 04 08:10:22 2025 +0000
tree82bee21412f26bf94ca5b8e3fb58eca6e146ad66
parentc61c88862805905dfa8a2c2f8c9f8ef7e1874720 [diff]
[ARM] Fix lane ordering for AdvSIMD intrinsics on big-endian targets (#127068)

In arm-neon.h, we insert shufflevectors around each intrinsic when the
target is big-endian, to compensate for the difference between the
ABI-defined memory format of vectors (with the whole vector stored as
one big-endian access) and LLVM's target-independent expectations (with
the lowest-numbered lane in the lowest address). However, this code was
written for the AArch64 ABI, and the AArch32 ABI differs slightly: it
requires that vectors are stored in memory as-if stored with VSTM, which
does a series of 64-bit accesses, instead of the AArch64 VSTR, which
does a single 128-bit access. This means that for AArch32 we need to
reverse the lanes in each 64-bit chunk of the vector, instead of in the
whole vector.

Since there are only a small number of different shufflevector orderings
needed, I've split them out into macros, so that this doesn't need
separate conditions in each intrinsic definition.
2 files changed
tree: 82bee21412f26bf94ca5b8e3fb58eca6e146ad66
  1. .ci/
  2. .github/
  3. bolt/
  4. clang/
  5. clang-tools-extra/
  6. cmake/
  7. compiler-rt/
  8. cross-project-tests/
  9. flang/
  10. flang-rt/
  11. libc/
  12. libclc/
  13. libcxx/
  14. libcxxabi/
  15. libunwind/
  16. lld/
  17. lldb/
  18. llvm/
  19. llvm-libgcc/
  20. mlir/
  21. offload/
  22. openmp/
  23. polly/
  24. pstl/
  25. runtimes/
  26. third-party/
  27. utils/
  28. .clang-format
  29. .clang-tidy
  30. .git-blame-ignore-revs
  31. .gitattributes
  32. .gitignore
  33. .mailmap
  34. CODE_OF_CONDUCT.md
  35. CONTRIBUTING.md
  36. LICENSE.TXT
  37. pyproject.toml
  38. README.md
  39. SECURITY.md
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