; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt < %s -passes=loop-interchange -verify-dom-info -verify-loop-info -S 2>&1 | FileCheck %s

@A = common global [100 x [100 x i64]] zeroinitializer
@N = dso_local local_unnamed_addr global i64 100, align 8

; Inner loop induction variable exit condition depends on
; an outer loop invariant, can do interchange.
;
define void @interchange_04(i64 %k) {
; CHECK-LABEL: define void @interchange_04(
; CHECK-SAME: i64 [[K:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @N, align 4
; CHECK-NEXT:    br label %[[FOR2_PREHEADER:.*]]
; CHECK:       [[FOR1_HEADER_PREHEADER:.*]]:
; CHECK-NEXT:    br label %[[FOR1_HEADER:.*]]
; CHECK:       [[FOR1_HEADER]]:
; CHECK-NEXT:    [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR1_INC10:.*]] ], [ 0, %[[FOR1_HEADER_PREHEADER]] ]
; CHECK-NEXT:    br label %[[FOR2_SPLIT1:.*]]
; CHECK:       [[FOR2_PREHEADER]]:
; CHECK-NEXT:    br label %[[FOR2:.*]]
; CHECK:       [[FOR2]]:
; CHECK-NEXT:    [[J:%.*]] = phi i64 [ [[TMP1:%.*]], %[[FOR2_SPLIT:.*]] ], [ 0, %[[FOR2_PREHEADER]] ]
; CHECK-NEXT:    br label %[[FOR1_HEADER_PREHEADER]]
; CHECK:       [[FOR2_SPLIT1]]:
; CHECK-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x [100 x i64]], ptr @A, i64 0, i64 [[J]], i64 [[I]]
; CHECK-NEXT:    [[LV:%.*]] = load i64, ptr [[ARRAYIDX5]], align 4
; CHECK-NEXT:    [[ADD:%.*]] = add nsw i64 [[LV]], [[K]]
; CHECK-NEXT:    store i64 [[ADD]], ptr [[ARRAYIDX5]], align 4
; CHECK-NEXT:    [[J_NEXT:%.*]] = add nuw nsw i64 [[J]], 1
; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp ne i64 [[TMP0]], [[J]]
; CHECK-NEXT:    br label %[[FOR1_INC10]]
; CHECK:       [[FOR2_SPLIT]]:
; CHECK-NEXT:    [[TMP1]] = add nuw nsw i64 [[J]], 1
; CHECK-NEXT:    [[TMP2:%.*]] = icmp ne i64 [[TMP0]], [[J]]
; CHECK-NEXT:    br i1 [[TMP2]], label %[[FOR2]], label %[[FOR_END12:.*]]
; CHECK:       [[FOR1_INC10]]:
; CHECK-NEXT:    [[I_NEXT]] = add nuw nsw i64 [[I]], 1
; CHECK-NEXT:    [[EXITCOND26:%.*]] = icmp eq i64 [[I]], 99
; CHECK-NEXT:    br i1 [[EXITCOND26]], label %[[FOR2_SPLIT]], label %[[FOR1_HEADER]]
; CHECK:       [[FOR_END12]]:
; CHECK-NEXT:    ret void
;
entry:
  %0 = load i64, ptr @N, align 4
  br label %for1.header

for1.header:
  %i = phi i64 [ 0, %entry ], [ %i.next, %for1.inc10 ]
  br label %for2

for2:
  %j = phi i64 [ %j.next, %for2 ], [ 0, %for1.header ]
  %arrayidx5 = getelementptr inbounds [100 x [100 x i64]], ptr @A, i64 0, i64 %j, i64 %i
  %lv = load i64, ptr %arrayidx5
  %add = add nsw i64 %lv, %k
  store i64 %add, ptr %arrayidx5
  %j.next = add nuw nsw i64 %j, 1
  %exitcond = icmp ne i64 %0, %j
  br i1 %exitcond, label %for2, label %for1.inc10

for1.inc10:
  %i.next = add nuw nsw i64 %i, 1
  %exitcond26 = icmp eq i64 %i, 99
  br i1 %exitcond26, label %for.end12, label %for1.header

for.end12:
  ret void
}