| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 |
| ; RUN: %if x86-registered-target %{ opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X86 %} |
| ; RUN: %if aarch64-registered-target %{ opt -S --passes=slp-vectorizer -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=AARCH64 %} |
| |
| define <2 x i32> @test(i32 %arg) { |
| ; X86-LABEL: define <2 x i32> @test( |
| ; X86-SAME: i32 [[ARG:%.*]]) { |
| ; X86-NEXT: bb: |
| ; X86-NEXT: [[OR:%.*]] = or i32 [[ARG]], 0 |
| ; X86-NEXT: [[MUL:%.*]] = mul i32 0, 1 |
| ; X86-NEXT: [[MUL1:%.*]] = mul i32 [[OR]], [[MUL]] |
| ; X86-NEXT: [[CMP:%.*]] = icmp ugt i32 0, [[MUL1]] |
| ; X86-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> poison, i32 [[OR]], i32 0 |
| ; X86-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> [[TMP0]], i32 [[MUL]], i32 1 |
| ; X86-NEXT: ret <2 x i32> [[TMP1]] |
| ; |
| ; AARCH64-LABEL: define <2 x i32> @test( |
| ; AARCH64-SAME: i32 [[ARG:%.*]]) { |
| ; AARCH64-NEXT: bb: |
| ; AARCH64-NEXT: [[TMP2:%.*]] = or i32 [[ARG]], 0 |
| ; AARCH64-NEXT: [[TMP3:%.*]] = mul i32 0, 1 |
| ; AARCH64-NEXT: [[MUL1:%.*]] = mul i32 [[TMP2]], [[TMP3]] |
| ; AARCH64-NEXT: [[CMP:%.*]] = icmp ugt i32 0, [[MUL1]] |
| ; AARCH64-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> poison, i32 [[TMP2]], i32 0 |
| ; AARCH64-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> [[TMP0]], i32 [[TMP3]], i32 1 |
| ; AARCH64-NEXT: ret <2 x i32> [[TMP1]] |
| ; |
| bb: |
| %or = or i32 %arg, 0 |
| %mul = mul i32 0, 1 |
| %mul1 = mul i32 %or, %mul |
| %cmp = icmp ugt i32 0, %mul1 |
| %0 = insertelement <2 x i32> poison, i32 %or, i32 0 |
| %1 = insertelement <2 x i32> %0, i32 %mul, i32 1 |
| ret <2 x i32> %1 |
| } |
| |
