Sign in
llvm
/
llvm-project
/
9e3e1aad3161f4ce5301c3a59c7313ad83240a6d
/
.
/
llvm
/
lib
/
Target
/
AMDGPU
tree: 4f41c75dff9d5c15506da30b537b3d7f8b6458f2 [
path history
]
[
tgz
]
AsmParser/
Disassembler/
MCA/
MCTargetDesc/
TargetInfo/
Utils/
AMDGPU.h
AMDGPU.td
AMDGPUAliasAnalysis.cpp
AMDGPUAliasAnalysis.h
AMDGPUAlwaysInlinePass.cpp
AMDGPUAnnotateKernelFeatures.cpp
AMDGPUAnnotateUniformValues.cpp
AMDGPUArgumentUsageInfo.cpp
AMDGPUArgumentUsageInfo.h
AMDGPUAsmPrinter.cpp
AMDGPUAsmPrinter.h
AMDGPUAtomicOptimizer.cpp
AMDGPUAttributor.cpp
AMDGPUCallingConv.td
AMDGPUCallLowering.cpp
AMDGPUCallLowering.h
AMDGPUCodeGenPrepare.cpp
AMDGPUCombine.td
AMDGPUCombinerHelper.cpp
AMDGPUCombinerHelper.h
AMDGPUCtorDtorLowering.cpp
AMDGPUExportClustering.cpp
AMDGPUExportClustering.h
AMDGPUFeatures.td
AMDGPUFixFunctionBitcasts.cpp
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUGenRegisterBankInfo.def
AMDGPUGISel.td
AMDGPUGlobalISelUtils.cpp
AMDGPUGlobalISelUtils.h
AMDGPUHSAMetadataStreamer.cpp
AMDGPUHSAMetadataStreamer.h
AMDGPUInstCombineIntrinsic.cpp
AMDGPUInstrInfo.cpp
AMDGPUInstrInfo.h
AMDGPUInstrInfo.td
AMDGPUInstructions.td
AMDGPUInstructionSelector.cpp
AMDGPUInstructionSelector.h
AMDGPUISelDAGToDAG.cpp
AMDGPUISelDAGToDAG.h
AMDGPUISelLowering.cpp
AMDGPUISelLowering.h
AMDGPULateCodeGenPrepare.cpp
AMDGPULegalizerInfo.cpp
AMDGPULegalizerInfo.h
AMDGPULibCalls.cpp
AMDGPULibFunc.cpp
AMDGPULibFunc.h
AMDGPULowerIntrinsics.cpp
AMDGPULowerKernelArguments.cpp
AMDGPULowerKernelAttributes.cpp
AMDGPULowerModuleLDSPass.cpp
AMDGPUMachineCFGStructurizer.cpp
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMachineModuleInfo.cpp
AMDGPUMachineModuleInfo.h
AMDGPUMacroFusion.cpp
AMDGPUMacroFusion.h
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h
AMDGPUMIRFormatter.cpp
AMDGPUMIRFormatter.h
AMDGPUOpenCLEnqueuedBlockLowering.cpp
AMDGPUPerfHintAnalysis.cpp
AMDGPUPerfHintAnalysis.h
AMDGPUPostLegalizerCombiner.cpp
AMDGPUPreLegalizerCombiner.cpp
AMDGPUPrintfRuntimeBinding.cpp
AMDGPUPromoteAlloca.cpp
AMDGPUPromoteKernelArguments.cpp
AMDGPUPropagateAttributes.cpp
AMDGPUPTNote.h
AMDGPURegBankCombiner.cpp
AMDGPURegisterBankInfo.cpp
AMDGPURegisterBankInfo.h
AMDGPURegisterBanks.td
AMDGPUReplaceLDSUseWithPointer.cpp
AMDGPUResourceUsageAnalysis.cpp
AMDGPUResourceUsageAnalysis.h
AMDGPURewriteOutArguments.cpp
AMDGPUSearchableTables.td
AMDGPUSubtarget.cpp
AMDGPUSubtarget.h
AMDGPUTargetMachine.cpp
AMDGPUTargetMachine.h
AMDGPUTargetObjectFile.cpp
AMDGPUTargetObjectFile.h
AMDGPUTargetTransformInfo.cpp
AMDGPUTargetTransformInfo.h
AMDGPUUnifyDivergentExitNodes.cpp
AMDGPUUnifyMetadata.cpp
AMDILCFGStructurizer.cpp
AMDKernelCodeT.h
BUFInstructions.td
CaymanInstructions.td
CMakeLists.txt
DSInstructions.td
EvergreenInstructions.td
EXPInstructions.td
FLATInstructions.td
GCNDPPCombine.cpp
GCNHazardRecognizer.cpp
GCNHazardRecognizer.h
GCNILPSched.cpp
GCNIterativeScheduler.cpp
GCNIterativeScheduler.h
GCNMinRegStrategy.cpp
GCNNSAReassign.cpp
GCNPreRAOptimizations.cpp
GCNProcessors.td
GCNRegPressure.cpp
GCNRegPressure.h
GCNSchedStrategy.cpp
GCNSchedStrategy.h
GCNSubtarget.h
InstCombineTables.td
MIMGInstructions.td
R600.h
R600.td
R600AsmPrinter.cpp
R600AsmPrinter.h
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600FrameLowering.cpp
R600FrameLowering.h
R600InstrFormats.td
R600InstrInfo.cpp
R600InstrInfo.h
R600InstrInfo.td
R600Instructions.td
R600ISelDAGToDAG.cpp
R600ISelLowering.cpp
R600ISelLowering.h
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h
R600MCInstLower.cpp
R600OpenCLImageTypeLoweringPass.cpp
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp
R600Processors.td
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R600Subtarget.cpp
R600Subtarget.h
R600TargetMachine.cpp
R600TargetMachine.h
R600TargetTransformInfo.cpp
R600TargetTransformInfo.h
R700Instructions.td
SIAnnotateControlFlow.cpp
SIDefines.h
SIFixSGPRCopies.cpp
SIFixVGPRCopies.cpp
SIFoldOperands.cpp
SIFormMemoryClauses.cpp
SIFrameLowering.cpp
SIFrameLowering.h
SIInsertHardClauses.cpp
SIInsertWaitcnts.cpp
SIInstrFormats.td
SIInstrInfo.cpp
SIInstrInfo.h
SIInstrInfo.td
SIInstructions.td
SIISelLowering.cpp
SIISelLowering.h
SILateBranchLowering.cpp
SILoadStoreOptimizer.cpp
SILowerControlFlow.cpp
SILowerI1Copies.cpp
SILowerSGPRSpills.cpp
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIMachineScheduler.cpp
SIMachineScheduler.h
SIMemoryLegalizer.cpp
SIModeRegister.cpp
SIOptimizeExecMasking.cpp
SIOptimizeExecMaskingPreRA.cpp
SIOptimizeVGPRLiveRange.cpp
SIPeepholeSDWA.cpp
SIPostRABundler.cpp
SIPreAllocateWWMRegs.cpp
SIPreEmitPeephole.cpp
SIProgramInfo.cpp
SIProgramInfo.h
SIRegisterInfo.cpp
SIRegisterInfo.h
SIRegisterInfo.td
SISchedule.td
SIShrinkInstructions.cpp
SIWholeQuadMode.cpp
SMInstructions.td
SOPInstructions.td
VIInstrFormats.td
VOP1Instructions.td
VOP2Instructions.td
VOP3Instructions.td
VOP3PInstructions.td
VOPCInstructions.td
VOPInstructions.td