[MLIR][XeGPU] Support partial subgroup lane distribution  (#201667)

for convert_layout

Add lowering support in XeGPUSgToLaneDistribute for values that are
distributed across only a fraction of the subgroup.

- SgToLaneConvertLayout now lowers a rank-2 xegpu.convert_layout that
  shrinks the lane layout along the outer (distributed) dimension while
  keeping lane_data unchanged (e.g. [16, 1] -> [8, 1]). The partial-subgroup
  case is detected directly in the pattern: equal order, rank 2, unit inner
  lane layout, and a genuinely distributed outer lane layout (> 1, which also
  rules out the degenerate [1, 1] layout). Because the data is no longer
  replicated in every lane, it is gathered across lanes and the distributed
  outer dimension is doubled when the lane count is halved.

- The cross-lane gather is factored into a dedicated helper,
  shuffleDataAsLaneLayoutChange(): it bitcasts the source to i32, issues
  gpu.shuffle up to fetch the values from the dropped lanes, and concatenates
  the lane-local and gathered data with vector.shuffle. Only halving the lane
  count (factor of two), rank-2 vectors, and bit widths that are a multiple
  of 32 are supported; other cases fail the match.

- SgToLaneVectorExtractStridedSlice now adjusts the effective subgroup size
  when the source lane layout along the distributed dimension is smaller than
  the hardware subgroup size, so slice offsets/sizes are scaled correctly
  (e.g. a subgroup-space offset of 8 maps to a distributed offset of 1).

Add a unit test exercising the dpas_mx scale operand path.