commit 901a95f7292852873e605881351d98412012c68f
author Matt Arsenault <Matthew.Arsenault@amd.com> Tue Oct 30 01:11:31 2018 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Tue Oct 30 01:11:31 2018 +0000
tree 507f743ff2a698e2e653857194e68440cb9db23e
parent 02882b93ad93e265dcb9fc22c3ca17dc0b254d01

Pass TRI to printReg

llvm-svn: 345553

llvm/lib/CodeGen/LiveRangeCalc.cpp

diff --git a/llvm/lib/CodeGen/LiveRangeCalc.cpp b/llvm/lib/CodeGen/LiveRangeCalc.cpp
index 0432494..70e135ab 100644
--- a/llvm/lib/CodeGen/LiveRangeCalc.cpp
+++ b/llvm/lib/CodeGen/LiveRangeCalc.cpp
@@ -364,7 +364,7 @@
 #ifndef NDEBUG
     if (MBB->pred_empty()) {
       MBB->getParent()->verify();
-      errs() << "Use of " << printReg(PhysReg)
+      errs() << "Use of " << printReg(PhysReg, MRI->getTargetRegisterInfo())
              << " does not have a corresponding definition on every path:\n";
       const MachineInstr *MI = Indexes->getInstructionFromIndex(Use);
       if (MI != nullptr)