)]}'
{
  "id": "e272bd3480383187da8853b2bb4dfa7d5dd7fffd",
  "repo": "llvm-project",
  "revision": "8fcb1263f42657ecbc355beff12500dfbcddee17",
  "path": "llvm/test/CodeGen/AMDGPU/issue48473.mir"
}
