tree ed14e31288af369a6fb045ef7eb9d8ad55740a12
parent 5b6fc610919cc2e88fe3d9bfcc23637c75a636c9
author Paul Walker <paul.walker@arm.com> 1746015706 +0100
committer GitHub <noreply@github.com> 1746015706 +0100
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[LLVM][InstCombine] Enable constant folding for SVE asr,lsl and lsr intrinsics. (#137350)

The SVE intrinsics support shift amounts greater-than-or-equal to the
element type's bit-length, essentially saturating the shift amount to
the bit-length. However, the IR instructions consider this undefined
behaviour that results in poison. To account for this we now ignore the
result of the simplifications that result in poison. This allows
existing code to be used to simplify the shifts but does mean:

1) We don't simplify cases like "svlsl_s32(x, splat(32)) => 0".
2) We no longer constant fold cases like "svadd(poison, X) => poison"

For (1) we'd need dedicated target specific combines anyway and the
result of (2) is not specified by the ACLE and replicating LLVM IR
behaviour might be confusing to ACLE writers.