[CIR][AArch64] Added vector intrinsics for shift left (#187516) Added vector intrinsics for vshlq_n_s8 vshlq_n_s16 vshlq_n_s32 vshlq_n_s64 vshlq_n_u8 vshlq_n_u16 vshlq_n_u32 vshlq_n_u64 vshl_n_s8 vshl_n_s16 vshl_n_s32 vshl_n_s64 vshl_n_u8 vshl_n_u16 vshl_n_u32 vshl_n_u64 these cover all the vector intrinsics for constant shift the method followed 1) the vectors for quad words are of the form `64x2`, `32x4`, `16x8`, `8x16` and the shift is a constant value but for shift left we need both of them to be vectors so we take the constant shift and convert it into a vector of respective form, for `64x2` we convert the constant to `64x2`, I have learnt that this process is also called **splat** 2) After splat we have that the lhs and rhs are of the same size hence the shift left can be applied 3) There is one issue though, the ops[0] is not of the right size, for quad words it falls back to the default int8*16 in the function, so I am converting it to the required size using bit casting, `8x16` = `64x2` so we can bitcast and get the vector array in the right form. Wrote the test cases for all the intrinsics listed above #185382
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