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llvm / llvm-project / 890c4bece26e005cd9fa5511fe0efa7307794de5 / . / llvm / test / Transforms / LoopVectorize / RISCV
tree: f8299558bac616617906d0f9c5304e240e2a08f4 [path history] [tgz]
  1. blend-any-of-reduction-cost.ll
  2. blocks-with-dead-instructions.ll
  3. dead-ops-cost.ll
  4. defaults.ll
  5. divrem.ll
  6. evl-compatible-loops.ll
  7. first-order-recurrence-scalable-vf1.ll
  8. force-vect-msg.ll
  9. illegal-type.ll
  10. induction-costs.ll
  11. inloop-reduction.ll
  12. interleaved-accesses-zve32x.ll
  13. interleaved-accesses.ll
  14. interleaved-cost.ll
  15. lit.local.cfg
  16. lmul.ll
  17. low-trip-count.ll
  18. mask-index-type.ll
  19. masked_gather_scatter.ll
  20. only-compute-cost-for-vplan-vfs.ll
  21. ordered-reduction.ll
  22. pr87378-vpinstruction-or-drop-poison-generating-flags.ll
  23. pr88802.ll
  24. reg-usage-bf16.ll
  25. reg-usage-f16.ll
  26. reg-usage.ll
  27. riscv-interleaved.ll
  28. riscv-unroll.ll
  29. riscv-vector-reverse.ll
  30. safe-dep-distance.ll
  31. scalable-basics.ll
  32. scalable-reductions.ll
  33. scalable-tailfold.ll
  34. scalable-vf-hint.ll
  35. select-cmp-reduction.ll
  36. short-trip-count.ll
  37. strided-accesses.ll
  38. truncate-to-minimal-bitwidth-cost.ll
  39. uniform-load-store.ll
  40. unroll-in-loop-vectorizer.ll
  41. vectorize-force-tail-with-evl-bin-unary-ops-args.ll
  42. vectorize-force-tail-with-evl-cond-reduction.ll
  43. vectorize-force-tail-with-evl-gather-scatter.ll
  44. vectorize-force-tail-with-evl-inloop-reduction.ll
  45. vectorize-force-tail-with-evl-interleave.ll
  46. vectorize-force-tail-with-evl-intermediate-store.ll
  47. vectorize-force-tail-with-evl-iv32.ll
  48. vectorize-force-tail-with-evl-masked-loadstore.ll
  49. vectorize-force-tail-with-evl-no-masking.ll
  50. vectorize-force-tail-with-evl-ordered-reduction.ll
  51. vectorize-force-tail-with-evl-reduction.ll
  52. vectorize-force-tail-with-evl-reverse-load-store.ll
  53. vectorize-force-tail-with-evl-safe-dep-distance.ll
  54. vectorize-force-tail-with-evl-uniform-store.ll
  55. vectorize-vp-intrinsics.ll
  56. vf-will-not-generate-any-vector-insts.ll
  57. vplan-vp-intrinsics-reduction.ll
  58. vplan-vp-intrinsics.ll
  59. vplan-vp-select-intrinsics.ll
  60. zvl32b.ll