[RISCV][MCA] Consolidate inputs for different SchedModel tests (#173926)

For a long time, we have been copying existing llvm-mca test files as a
mean to test new scheduling model changes. This approach doesn't scale
well primarily because we eventually have too many duplicated input
assembly lines spread across multiple files. Also, the files you copied
from might not have the best coverage.

To address this issue, I propose to consolidate the inputs for all
RISC-V scheduling model tests into a single place. More specifically,
all assembly input code will now be put in
`test/tools/llvm-mca/RISCV/Inputs`. Take
`test/tools/llvm-mca/RISCV/Inputs/zba.s` as an example, it contains --
and only contains -- Zba instructions. To use it as an input to test
`sifive-p470`'s scheduling model, we only need to create a
`test/tools/llvm-mca/RISCV/SiFiveP400/zba.test` with the following `RUN`
line:
```
# RUN: llvm-mca -mtriple=riscv64 -mcpu=sifive-p470 -iterations=1 -instruction-tables=full %p/../Inputs/zba.s | FileCheck %s
```
Before auto-generating its contents with the UTC script. The files in
`test/tools/llvm-mca/RISCV/Inputs` are roughly organized by extensions,
so scheduling models can take only the extensions they support.

This PR is a demonstration of such idea that applies it onto SiFiveP400
and SpacemitX60. If everyone thinks it's a good idea, we can do it to
more scheduling models.