| commit | 84b7bcfcac02ca32c2211655627c352dd99ce296 | [log] [tgz] |
|---|---|---|
| author | Petar Avramovic <Petar.Avramovic@amd.com> | Wed Oct 30 14:15:42 2024 +0100 |
| committer | GitHub <noreply@github.com> | Wed Oct 30 14:15:42 2024 +0100 |
| tree | b88e9db8414bfa08bcae99a005cb2b98555d2126 | |
| parent | 6f973fd4ab18ff58689e83383190ed4767c2a7dd [diff] |
GlobalISel/MachineIRBuilder: Construct DstOp with VRegAttrs (#113581) Allow construction of DstOp with VRegAttrs. Also allow construction with register class or bank and LLT. Intended to be used in lowering code for reg-bank-select where new registers need to have both register bank and LLT. Add support for new type of DstOp in CSEMIRBuilder.
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