[AMDGPU][Scheduler] Fix inconsistent MI slots after rematerialization revert (#180646) This fixes an issue in the scheduler's rematerialization stage wherein slot indices could end up being inconsistent with respect to MI order following a scheduling revert coupled with rematerialization rollbacks. When a region's schedule is reverted, instructions are re-ordered into the region's original instruction order. Furthermore, non-debug instructions have their slot moved if necessary to maintain consistency between MI and slot order. Importantly, the rematerialization stage marks rematerialized MIs as debug during re-scheduling. When reverting the schedule of regions that have had some of their MIs rematerialized, the latter are still marked debug, and therefore maintain their pre-re-scheduling slot even if it no longer is consistent with MI order. This fixes the issue by restoring the original state of rematerialized MIs before reverting region schedules, ensuring they are moved if necessary. An EXPENSIVE_CHECK is added to check that slot order makes sense with respect to MI order in re-scheduled regions. Fixes SWDEV-579187.
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