| commit | 7b0d56be1d002e9cf0d8dda8ecaee99c5dbc88cf | [log] [tgz] |
|---|---|---|
| author | Petar Avramovic <Petar.Avramovic@amd.com> | Fri Oct 11 11:40:27 2024 +0200 |
| committer | GitHub <noreply@github.com> | Fri Oct 11 11:40:27 2024 +0200 |
| tree | 787f0cb2eda98c9d0c5e8b8afb1f02d5f331fbb4 | |
| parent | 42ec740d0347a89b656c9be5ac4a7e4d8bcd30d5 [diff] |
AMDGPU/GlobalISel: Fix inst-selection of ballot (#109986) Both input and output of ballot are lane-masks: result is lane-mask with 'S32/S64 LLT and SGPR bank' input is lane-mask with 'S1 LLT and VCC reg bank'. Ballot copies bits from input lane-mask for all active lanes and puts 0 for inactive lanes. GlobalISel did not set 0 in result for inactive lanes for non-constant input.
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