blob: 0932dab2bdb9d6d73719e7b8de737b77b2e2559d [file] [log] [blame]
//===-- floatunssidfvfp.S - Implement floatunssidfvfp ---------------------===//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
#include "../assembly.h"
// extern double __floatunssidfvfp(unsigned int a);
// Converts a 32-bit int to a double precision float.
// Uses Darwin calling convention where a double precision result is
// return in GPR register pair.
.syntax unified
.p2align 2
vmov s0, r0
vcvt.f64.u32 d0, s0
vmov s15, r0 // move int to float register s15
vcvt.f64.u32 d7, s15 // convert 32-bit int in s15 to double in d7
vmov r0, r1, d7 // move d7 to result register pair r0/r1
bx lr