)]}'
{
  "id": "12f0a684a8e8241df9cb2c0d0737b79db48f0c12",
  "repo": "llvm-project",
  "revision": "792bf8ef030d7c2aa12abbab7662ffbcbe2d8b21",
  "path": "llvm/test/CodeGen/AMDGPU/dpp_combine_rev_opcode.mir"
}