)]}'
{
  "commit": "72c69aefbae8bfb087622e642acbd0cba7578747",
  "tree": "d41d863113026a28f712172dadac9d6370ade2f5",
  "parents": [
    "3890c97fc028535b67910f35eb8920112697c9f1"
  ],
  "author": {
    "name": "Jay Foad",
    "email": "jay.foad@amd.com",
    "time": "Fri Nov 14 11:00:57 2025 +0000"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Fri Nov 14 11:00:57 2025 +0000"
  },
  "message": "[AMDGPU] Make use of getFunction and getMF. NFC. (#167872)\n\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "c28c25fe5ac9e765c33c86cd4b66c9aeabf7cf26",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp",
      "new_id": "2bdaddaa1176136d36aa749afee33d0f63986503",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp"
    },
    {
      "type": "modify",
      "old_id": "5700468e2420ebceed668dc806e058a912c350f6",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp",
      "new_id": "ddc675bbb8fb723930ca29a7da01969dd6cafaa0",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp"
    },
    {
      "type": "modify",
      "old_id": "f5081a9d2dd5695ebabe07daa20ebfd00345e1f4",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp",
      "new_id": "3fbdab7ec4ed2eb534a90c087271ebd98302ae71",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp"
    },
    {
      "type": "modify",
      "old_id": "15ed60b46a9c076f8ccd7a3555db0134d6041f29",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp",
      "new_id": "650df2a87506ad3945cc7b360724082ed4d28dd7",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp"
    },
    {
      "type": "modify",
      "old_id": "aa755344d33254d805292e06622f64716a9026ad",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp",
      "new_id": "821d7f38fcb41bca6902ece200a5a6613a9eeaed",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp"
    },
    {
      "type": "modify",
      "old_id": "dec781d71c54e75a8391c34a4a4f8799d822ca96",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp",
      "new_id": "755b44c0ca93a7c361eb0b701d748e43346db665",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp"
    },
    {
      "type": "modify",
      "old_id": "fed7a13a69bc4c6e51d018911ebc3f4b6f0f2a98",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp",
      "new_id": "248d7dcc9ec3eaaae91a30ed53f15071d6cd7c7b",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp"
    },
    {
      "type": "modify",
      "old_id": "844649ebb9ae680c2f878bd7b0bb59ff91e0f9a3",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp",
      "new_id": "dee3dff3bf57573ede3d1f5ba3ea7c3a6e0618fd",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp"
    },
    {
      "type": "modify",
      "old_id": "6e54737065d2035d26e5550dea2d23de9c1c55e9",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp",
      "new_id": "4a70c5d6e78f64fd1aded9dcaf1ce84fb98c35de",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp"
    },
    {
      "type": "modify",
      "old_id": "ffbbf639694279ccc9d85ee2a2d730dd00335070",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/AMDGPUPreloadKernelArguments.cpp",
      "new_id": "7d6e3edc75e1ffcd029b139d412914163834938f",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/AMDGPUPreloadKernelArguments.cpp"
    },
    {
      "type": "modify",
      "old_id": "f5e14c71b02d95c99f1a01fd087b5030aabe5b69",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp",
      "new_id": "416de901ef19b0f33779310d2e71b4d322e1b0a1",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp"
    },
    {
      "type": "modify",
      "old_id": "ddabd25894414ab705f3dc710747521be790dc46",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp",
      "new_id": "bb95265a794a0373d4c8e8e2b08755e413d42b3f",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp"
    },
    {
      "type": "modify",
      "old_id": "90d319f578f447e6feab4eb6c826e75d3dd8a000",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp",
      "new_id": "7ed026ee5f69e8d1cd0a5cf622e8e9e857e8424e",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp"
    },
    {
      "type": "modify",
      "old_id": "4b1f80c777827569d3ca5335d83e51c4120d8548",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp",
      "new_id": "a2e16c7f873f70c2cc1f863b02f7de510dcdbda9",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp"
    },
    {
      "type": "modify",
      "old_id": "26e0b3dfc2e8aedaf13dec6fe6072c853e5defdf",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp",
      "new_id": "c7528f993da1eab53e15f06898b19210d91f877e",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp"
    },
    {
      "type": "modify",
      "old_id": "4a9437b37aa39ad366702ed694fecd5a9b2cd8de",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp",
      "new_id": "8695a25b10227664714d571074aae8b7b76eb25f",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp"
    },
    {
      "type": "modify",
      "old_id": "0c5e3d08378006ffe121ddcd9db4e07bc4fbea14",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/GCNRegPressure.cpp",
      "new_id": "ee5f9b0019db6cda58c940d56a63c728bf504101",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/GCNRegPressure.cpp"
    },
    {
      "type": "modify",
      "old_id": "4b22c68ef01c592998e48cb56071076be019ecb7",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/GCNRegPressure.h",
      "new_id": "f54874d2a5b408b903be20c806255f8ddb0983f5",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/GCNRegPressure.h"
    },
    {
      "type": "modify",
      "old_id": "01040854e1577318c96844cc010a462e57400f5a",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/R600InstrInfo.cpp",
      "new_id": "7f805e67c62ecb9dde7d7fb66fab468f35724550",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/R600InstrInfo.cpp"
    },
    {
      "type": "modify",
      "old_id": "48b4e7f0d07befe363d41dcd5af9731e73a244f6",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/R600MCInstLower.cpp",
      "new_id": "ac6508c2322ceeb8300c36411f304471f0075405",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/R600MCInstLower.cpp"
    },
    {
      "type": "modify",
      "old_id": "7793907c032d219e37369fedcaa908d4488ccac1",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp",
      "new_id": "9a8710becba3902bf23fd3c6624938c15ba0df56",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp"
    },
    {
      "type": "modify",
      "old_id": "2c00e23d113cbba0924bcd05012b06d14967c1ca",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/SIFoldOperands.cpp",
      "new_id": "f4d38c0c3d8c3f2cfced02d5b1a166eb8991a16a",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/SIFoldOperands.cpp"
    },
    {
      "type": "modify",
      "old_id": "86e31e702f9b02d2c62a38246a9c1f6918feae3c",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/SIISelLowering.cpp",
      "new_id": "56f2abba12a016dbf1a33bfb01fe48d320b5b629",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/SIISelLowering.cpp"
    },
    {
      "type": "modify",
      "old_id": "eafb579b1a2eef4edb886b605c628cfe1f43ada9",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/SIInstrInfo.cpp",
      "new_id": "3bf820a0024e7dc3851ee87aecab81892b98620d",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/SIInstrInfo.cpp"
    },
    {
      "type": "modify",
      "old_id": "d24dfd657ddcc5ff925785e6440a5bd089322da9",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/SIInstrInfo.h",
      "new_id": "b12d9525a7605782e0019c42f53cfc900fa1d5c6",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/SIInstrInfo.h"
    },
    {
      "type": "modify",
      "old_id": "6ab8d5521ebdbbd3ab0c31f2079909d317f69fbb",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp",
      "new_id": "0dac6d2d7ee4b56851a9e4278d469c4664633a13",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp"
    },
    {
      "type": "modify",
      "old_id": "86ca22cfeffd8cff658297dd40e742110b637d0a",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp",
      "new_id": "acc4b3f0a68b4f99a5ec3300817fe417d920c40d",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp"
    },
    {
      "type": "modify",
      "old_id": "aaf7a921c29818c0dcc538a4bf5ffbfd6c070274",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp",
      "new_id": "5484fab3efdcc6cc15d329f752655b08fe3c9faf",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp"
    }
  ]
}