)]}'
{
  "commit": "71b87d12678cbdb900c3a8fb673dcaf14d0433be",
  "tree": "19f7196e05e3b7b498ffebdb47a7c8a0578dda71",
  "parents": [
    "b17f6077036296cb0f475f16adcdce4af6aea3e9"
  ],
  "author": {
    "name": "Paul Walker",
    "email": "paul.walker@arm.com",
    "time": "Wed Nov 20 13:54:50 2024 +0000"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Wed Nov 20 13:54:50 2024 +0000"
  },
  "message": "[LLVM][SVE] Ensure all fixed length mask bits are defined. (#116819)\n\nconvertFixedMaskToScalableVector expects the mask input to honour the\r\nBoolContents scheme employed by the target. For AArch64 this means a\r\nmask should be zero or all ones, and thus when promoting a mask we must\r\nuse a sign extend.",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "961a90e51571d10a6ffe88b1ceb6bde842aaf462",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AArch64/AArch64ISelLowering.cpp",
      "new_id": "7ab3fc06715ec8c5baf59b781c632a0059e56378",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AArch64/AArch64ISelLowering.cpp"
    },
    {
      "type": "modify",
      "old_id": "9055b2efba3282b24aa1149a69aae9d6d92f6db4",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-load.ll",
      "new_id": "48a642c908bfe6ee8c51d1640e99221dd7b84521",
      "new_mode": 33188,
      "new_path": "llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-load.ll"
    }
  ]
}