; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals
; RUN: opt -S -passes=dfa-jump-threading -verify-dom-info=1 %s | FileCheck %s

; These tests check that the DFA jump threading transformation is applied
; properly to two CFGs. It checks that blocks are cloned, branches are updated,
; and SSA form is restored.
define i32 @test1(i32 %num) {
; CHECK-LABEL: @test1(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
; CHECK:       for.body:
; CHECK-NEXT:    [[COUNT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_INC:%.*]] ]
; CHECK-NEXT:    [[STATE:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[STATE_NEXT:%.*]], [[FOR_INC]] ]
; CHECK-NEXT:    switch i32 [[STATE]], label [[FOR_INC_JT1:%.*]] [
; CHECK-NEXT:      i32 1, label [[CASE1:%.*]]
; CHECK-NEXT:      i32 2, label [[CASE2:%.*]]
; CHECK-NEXT:    ]
; CHECK:       for.body.jt2:
; CHECK-NEXT:    [[COUNT_JT2:%.*]] = phi i32 [ [[INC_JT2:%.*]], [[FOR_INC_JT2:%.*]] ]
; CHECK-NEXT:    [[STATE_JT2:%.*]] = phi i32 [ [[STATE_NEXT_JT2:%.*]], [[FOR_INC_JT2]] ]
; CHECK-NEXT:    br label [[CASE2]]
; CHECK:       for.body.jt1:
; CHECK-NEXT:    [[COUNT_JT1:%.*]] = phi i32 [ [[INC_JT1:%.*]], [[FOR_INC_JT1]] ]
; CHECK-NEXT:    [[STATE_JT1:%.*]] = phi i32 [ [[STATE_NEXT_JT1:%.*]], [[FOR_INC_JT1]] ]
; CHECK-NEXT:    br label [[CASE1]]
; CHECK:       case1:
; CHECK-NEXT:    [[COUNT2:%.*]] = phi i32 [ [[COUNT_JT1]], [[FOR_BODY_JT1:%.*]] ], [ [[COUNT]], [[FOR_BODY]] ]
; CHECK-NEXT:    br label [[FOR_INC_JT2]]
; CHECK:       case2:
; CHECK-NEXT:    [[COUNT1:%.*]] = phi i32 [ [[COUNT_JT2]], [[FOR_BODY_JT2:%.*]] ], [ [[COUNT]], [[FOR_BODY]] ]
; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[COUNT1]], 50
; CHECK-NEXT:    br i1 [[CMP]], label [[FOR_INC_JT1]], label [[SEL_SI_UNFOLD_FALSE_JT2:%.*]]
; CHECK:       sel.si.unfold.false:
; CHECK-NEXT:    br label [[FOR_INC]]
; CHECK:       sel.si.unfold.false.jt2:
; CHECK-NEXT:    [[DOTSI_UNFOLD_PHI_JT2:%.*]] = phi i32 [ 2, [[CASE2]] ]
; CHECK-NEXT:    br label [[FOR_INC_JT2]]
; CHECK:       for.inc:
; CHECK-NEXT:    [[STATE_NEXT]] = phi i32 [ poison, [[SEL_SI_UNFOLD_FALSE:%.*]] ]
; CHECK-NEXT:    [[INC]] = add nsw i32 undef, 1
; CHECK-NEXT:    [[CMP_EXIT:%.*]] = icmp slt i32 [[INC]], [[NUM:%.*]]
; CHECK-NEXT:    br i1 [[CMP_EXIT]], label [[FOR_BODY]], label [[FOR_END:%.*]]
; CHECK:       for.inc.jt2:
; CHECK-NEXT:    [[COUNT4:%.*]] = phi i32 [ [[COUNT1]], [[SEL_SI_UNFOLD_FALSE_JT2]] ], [ [[COUNT2]], [[CASE1]] ]
; CHECK-NEXT:    [[STATE_NEXT_JT2]] = phi i32 [ [[DOTSI_UNFOLD_PHI_JT2]], [[SEL_SI_UNFOLD_FALSE_JT2]] ], [ 2, [[CASE1]] ]
; CHECK-NEXT:    [[INC_JT2]] = add nsw i32 [[COUNT4]], 1
; CHECK-NEXT:    [[CMP_EXIT_JT2:%.*]] = icmp slt i32 [[INC_JT2]], [[NUM]]
; CHECK-NEXT:    br i1 [[CMP_EXIT_JT2]], label [[FOR_BODY_JT2]], label [[FOR_END]]
; CHECK:       for.inc.jt1:
; CHECK-NEXT:    [[COUNT3:%.*]] = phi i32 [ [[COUNT]], [[FOR_BODY]] ], [ [[COUNT1]], [[CASE2]] ]
; CHECK-NEXT:    [[STATE_NEXT_JT1]] = phi i32 [ 1, [[CASE2]] ], [ 1, [[FOR_BODY]] ]
; CHECK-NEXT:    [[INC_JT1]] = add nsw i32 [[COUNT3]], 1
; CHECK-NEXT:    [[CMP_EXIT_JT1:%.*]] = icmp slt i32 [[INC_JT1]], [[NUM]]
; CHECK-NEXT:    br i1 [[CMP_EXIT_JT1]], label [[FOR_BODY_JT1]], label [[FOR_END]]
; CHECK:       for.end:
; CHECK-NEXT:    ret i32 0
;
entry:
  br label %for.body

for.body:
  %count = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
  %state = phi i32 [ 1, %entry ], [ %state.next, %for.inc ]
  switch i32 %state, label %for.inc [
  i32 1, label %case1
  i32 2, label %case2
  ]

case1:
  br label %for.inc

case2:
  %cmp = icmp eq i32 %count, 50
  %sel = select i1 %cmp, i32 1, i32 2
  br label %for.inc

for.inc:
  %state.next = phi i32 [ %sel, %case2 ], [ 1, %for.body ], [ 2, %case1 ]
  %inc = add nsw i32 %count, 1
  %cmp.exit = icmp slt i32 %inc, %num
  br i1 %cmp.exit, label %for.body, label %for.end

for.end:
  ret i32 0
}


define i32 @test2(i32 %init) {
; CHECK-LABEL: @test2(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[INIT:%.*]], 0
; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP_1:%.*]], label [[SEL_SI_UNFOLD_FALSE:%.*]]
; CHECK:       state.1.be2.si.unfold.false:
; CHECK-NEXT:    [[STATE_1_BE_SI_UNFOLD_PHI:%.*]] = phi i32 [ poison, [[LOOP_1_BACKEDGE:%.*]] ]
; CHECK-NEXT:    br label [[LOOP_1]]
; CHECK:       state.1.be2.si.unfold.false.jt4:
; CHECK-NEXT:    [[STATE_1_BE_SI_UNFOLD_PHI_JT4:%.*]] = phi i32 [ [[STATE_1_BE_JT4:%.*]], [[LOOP_1_BACKEDGE_JT4:%.*]] ]
; CHECK-NEXT:    br label [[LOOP_1_JT4:%.*]]
; CHECK:       state.1.be2.si.unfold.false.jt2:
; CHECK-NEXT:    [[STATE_1_BE_SI_UNFOLD_PHI_JT2:%.*]] = phi i32 [ [[STATE_1_BE_JT2:%.*]], [[LOOP_1_BACKEDGE_JT2:%.*]] ]
; CHECK-NEXT:    br label [[LOOP_1_JT2:%.*]]
; CHECK:       sel.si.unfold.false:
; CHECK-NEXT:    [[DOTSI_UNFOLD_PHI:%.*]] = phi i32 [ 2, [[ENTRY:%.*]] ]
; CHECK-NEXT:    br label [[LOOP_1]]
; CHECK:       loop.1:
; CHECK-NEXT:    [[STATE_1:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[DOTSI_UNFOLD_PHI]], [[SEL_SI_UNFOLD_FALSE]] ], [ [[STATE_1_BE_SI_UNFOLD_PHI]], [[STATE_1_BE2_SI_UNFOLD_FALSE:%.*]] ]
; CHECK-NEXT:    br label [[LOOP_2:%.*]]
; CHECK:       loop.1.jt4:
; CHECK-NEXT:    [[STATE_1_JT4:%.*]] = phi i32 [ [[STATE_1_BE_SI_UNFOLD_PHI_JT4]], [[STATE_1_BE2_SI_UNFOLD_FALSE_JT4:%.*]] ]
; CHECK-NEXT:    br label [[LOOP_2_JT4:%.*]]
; CHECK:       loop.1.jt2:
; CHECK-NEXT:    [[STATE_1_JT2:%.*]] = phi i32 [ [[STATE_1_BE_SI_UNFOLD_PHI_JT2]], [[STATE_1_BE2_SI_UNFOLD_FALSE_JT2:%.*]] ]
; CHECK-NEXT:    br label [[LOOP_2_JT2:%.*]]
; CHECK:       loop.1.jt1:
; CHECK-NEXT:    [[STATE_1_JT1:%.*]] = phi i32 [ 1, [[LOOP_1_BACKEDGE_JT4]] ], [ 1, [[LOOP_1_BACKEDGE]] ], [ 1, [[LOOP_1_BACKEDGE_JT2]] ]
; CHECK-NEXT:    br label [[LOOP_2_JT1:%.*]]
; CHECK:       loop.2:
; CHECK-NEXT:    [[STATE_2:%.*]] = phi i32 [ [[STATE_1]], [[LOOP_1]] ], [ poison, [[LOOP_2_BACKEDGE:%.*]] ]
; CHECK-NEXT:    br label [[LOOP_3:%.*]]
; CHECK:       loop.2.jt0:
; CHECK-NEXT:    [[STATE_2_JT0:%.*]] = phi i32 [ [[STATE_2_BE_JT0:%.*]], [[LOOP_2_BACKEDGE_JT0:%.*]] ]
; CHECK-NEXT:    br label [[LOOP_3_JT0:%.*]]
; CHECK:       loop.2.jt3:
; CHECK-NEXT:    [[STATE_2_JT3:%.*]] = phi i32 [ [[STATE_2_BE_JT3:%.*]], [[LOOP_2_BACKEDGE_JT3:%.*]] ]
; CHECK-NEXT:    br label [[LOOP_3_JT3:%.*]]
; CHECK:       loop.2.jt4:
; CHECK-NEXT:    [[STATE_2_JT4:%.*]] = phi i32 [ [[STATE_1_JT4]], [[LOOP_1_JT4]] ]
; CHECK-NEXT:    br label [[LOOP_3_JT4:%.*]]
; CHECK:       loop.2.jt2:
; CHECK-NEXT:    [[STATE_2_JT2:%.*]] = phi i32 [ [[STATE_1_JT2]], [[LOOP_1_JT2]] ]
; CHECK-NEXT:    br label [[LOOP_3_JT2:%.*]]
; CHECK:       loop.2.jt1:
; CHECK-NEXT:    [[STATE_2_JT1:%.*]] = phi i32 [ [[STATE_1_JT1]], [[LOOP_1_JT1:%.*]] ]
; CHECK-NEXT:    br label [[LOOP_3_JT1:%.*]]
; CHECK:       loop.3:
; CHECK-NEXT:    [[STATE:%.*]] = phi i32 [ [[STATE_2]], [[LOOP_2]] ]
; CHECK-NEXT:    switch i32 [[STATE]], label [[INFLOOP_I:%.*]] [
; CHECK-NEXT:      i32 2, label [[CASE2:%.*]]
; CHECK-NEXT:      i32 3, label [[CASE3:%.*]]
; CHECK-NEXT:      i32 4, label [[CASE4:%.*]]
; CHECK-NEXT:      i32 0, label [[CASE0:%.*]]
; CHECK-NEXT:      i32 1, label [[CASE1:%.*]]
; CHECK-NEXT:    ]
; CHECK:       loop.3.jt0:
; CHECK-NEXT:    [[STATE_JT0:%.*]] = phi i32 [ [[STATE_2_JT0]], [[LOOP_2_JT0:%.*]] ]
; CHECK-NEXT:    br label [[CASE0]]
; CHECK:       loop.3.jt3:
; CHECK-NEXT:    [[STATE_JT3:%.*]] = phi i32 [ [[STATE_2_JT3]], [[LOOP_2_JT3:%.*]] ], [ 3, [[CASE2]] ]
; CHECK-NEXT:    br label [[CASE3]]
; CHECK:       loop.3.jt4:
; CHECK-NEXT:    [[STATE_JT4:%.*]] = phi i32 [ [[STATE_2_JT4]], [[LOOP_2_JT4]] ]
; CHECK-NEXT:    br label [[CASE4]]
; CHECK:       loop.3.jt2:
; CHECK-NEXT:    [[STATE_JT2:%.*]] = phi i32 [ [[STATE_2_JT2]], [[LOOP_2_JT2]] ]
; CHECK-NEXT:    br label [[CASE2]]
; CHECK:       loop.3.jt1:
; CHECK-NEXT:    [[STATE_JT1:%.*]] = phi i32 [ [[STATE_2_JT1]], [[LOOP_2_JT1]] ]
; CHECK-NEXT:    br label [[CASE1]]
; CHECK:       case2:
; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP_3_JT3]], label [[LOOP_1_BACKEDGE_JT4]]
; CHECK:       case3:
; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP_2_BACKEDGE_JT0]], label [[CASE4]]
; CHECK:       case4:
; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP_2_BACKEDGE_JT3]], label [[LOOP_1_BACKEDGE_JT2]]
; CHECK:       loop.1.backedge:
; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP_1_JT1]], label [[STATE_1_BE2_SI_UNFOLD_FALSE]]
; CHECK:       loop.1.backedge.jt4:
; CHECK-NEXT:    [[STATE_1_BE_JT4]] = phi i32 [ 4, [[CASE2]] ]
; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP_1_JT1]], label [[STATE_1_BE2_SI_UNFOLD_FALSE_JT4]]
; CHECK:       loop.1.backedge.jt2:
; CHECK-NEXT:    [[STATE_1_BE_JT2]] = phi i32 [ 2, [[CASE4]] ]
; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP_1_JT1]], label [[STATE_1_BE2_SI_UNFOLD_FALSE_JT2]]
; CHECK:       loop.2.backedge:
; CHECK-NEXT:    br label [[LOOP_2]]
; CHECK:       loop.2.backedge.jt0:
; CHECK-NEXT:    [[STATE_2_BE_JT0]] = phi i32 [ 0, [[CASE3]] ]
; CHECK-NEXT:    br label [[LOOP_2_JT0]]
; CHECK:       loop.2.backedge.jt3:
; CHECK-NEXT:    [[STATE_2_BE_JT3]] = phi i32 [ 3, [[CASE4]] ]
; CHECK-NEXT:    br label [[LOOP_2_JT3]]
; CHECK:       case0:
; CHECK-NEXT:    br label [[EXIT:%.*]]
; CHECK:       case1:
; CHECK-NEXT:    br label [[EXIT]]
; CHECK:       infloop.i:
; CHECK-NEXT:    br label [[INFLOOP_I]]
; CHECK:       exit:
; CHECK-NEXT:    ret i32 0
;
entry:
  %cmp = icmp eq i32 %init, 0
  %sel = select i1 %cmp, i32 0, i32 2
  br label %loop.1

loop.1:
  %state.1 = phi i32 [ %sel, %entry ], [ %state.1.be2, %loop.1.backedge ]
  br label %loop.2

loop.2:
  %state.2 = phi i32 [ %state.1, %loop.1 ], [ %state.2.be, %loop.2.backedge ]
  br label %loop.3

loop.3:
  %state = phi i32 [ %state.2, %loop.2 ], [ 3, %case2 ]
  switch i32 %state, label %infloop.i [
  i32 2, label %case2
  i32 3, label %case3
  i32 4, label %case4
  i32 0, label %case0
  i32 1, label %case1
  ]

case2:
  br i1 %cmp, label %loop.3, label %loop.1.backedge

case3:
  br i1 %cmp, label %loop.2.backedge, label %case4

case4:
  br i1 %cmp, label %loop.2.backedge, label %loop.1.backedge

loop.1.backedge:
  %state.1.be = phi i32 [ 2, %case4 ], [ 4, %case2 ]
  %state.1.be2 = select i1 %cmp, i32 1, i32 %state.1.be
  br label %loop.1

loop.2.backedge:
  %state.2.be = phi i32 [ 3, %case4 ], [ 0, %case3 ]
  br label %loop.2

case0:
  br label %exit

case1:
  br label %exit

infloop.i:
  br label %infloop.i

exit:
  ret i32 0
}

define void @pr78059_bitwidth() {
; CHECK-LABEL: @pr78059_bitwidth(
; CHECK-NEXT:  .split.preheader:
; CHECK-NEXT:    br label [[DOTSPLIT:%.*]]
; CHECK:       .split:
; CHECK-NEXT:    [[TMP0:%.*]] = phi i128 [ 0, [[DOTSPLIT_PREHEADER:%.*]] ]
; CHECK-NEXT:    switch i128 [[TMP0]], label [[END:%.*]] [
; CHECK-NEXT:      i128 -1, label [[END]]
; CHECK-NEXT:      i128 0, label [[DOTSPLIT_JT18446744073709551615:%.*]]
; CHECK-NEXT:    ]
; CHECK:       .split.jt18446744073709551615:
; CHECK-NEXT:    [[TMP1:%.*]] = phi i128 [ -1, [[DOTSPLIT]] ]
; CHECK-NEXT:    br label [[END]]
; CHECK:       end:
; CHECK-NEXT:    ret void
;
.split.preheader:
  br label %.split

.split:
  %0 = phi i128 [ 0, %.split.preheader ], [ -1, %.split ]
  switch i128 %0, label %end [
  i128 -1, label %end
  i128 0, label %.split
  ]

end:
  ret void
}

define void @self-reference() {
; CHECK-LABEL: @self-reference(
; CHECK-NEXT:  .split.preheader:
; CHECK-NEXT:    br label [[DOTSPLIT:%.*]]
; CHECK:       .split:
; CHECK-NEXT:    [[TMP0:%.*]] = phi i32 [ 0, [[DOTSPLIT_PREHEADER:%.*]] ]
; CHECK-NEXT:    switch i32 [[TMP0]], label [[END:%.*]] [
; CHECK-NEXT:      i32 -1, label [[END]]
; CHECK-NEXT:      i32 0, label [[DOTSPLIT_JT4294967295:%.*]]
; CHECK-NEXT:    ]
; CHECK:       .split.jt4294967295:
; CHECK-NEXT:    [[TMP1:%.*]] = phi i32 [ -1, [[DOTSPLIT]] ]
; CHECK-NEXT:    br label [[END]]
; CHECK:       end:
; CHECK-NEXT:    ret void
;
.split.preheader:
  br label %.split

.split:
  %0 = phi i32 [ 0, %.split.preheader ], [ -1, %.split ]
  switch i32 %0, label %end [
  i32 -1, label %end
  i32 0, label %.split
  ]

end:
  ret void
}

define void @pr106083_invalidBBarg_fold(i1 %cmp1, i1 %cmp2, i1 %not, ptr %d) !prof !0 {
; CHECK-LABEL: @pr106083_invalidBBarg_fold(
; CHECK-NEXT:  bb:
; CHECK-NEXT:    br label [[BB1:%.*]]
; CHECK:       BB1:
; CHECK-NEXT:    [[I:%.*]] = phi i16 [ 0, [[BB1_BACKEDGE:%.*]] ], [ 0, [[BB:%.*]] ], [ 1, [[BB9:%.*]] ], [ 1, [[BB7_JT0:%.*]] ]
; CHECK-NEXT:    br i1 [[NOT:%.*]], label [[BB7_JT0]], label [[BB2:%.*]]
; CHECK:       BB2:
; CHECK-NEXT:    store i16 0, ptr [[D:%.*]], align 2
; CHECK-NEXT:    br i1 [[CMP2:%.*]], label [[BB7:%.*]], label [[SPEC_SELECT_SI_UNFOLD_FALSE_JT0:%.*]], !prof [[PROF1:![0-9]+]]
; CHECK:       spec.select.si.unfold.false:
; CHECK-NEXT:    br label [[BB9]]
; CHECK:       spec.select.si.unfold.false.jt0:
; CHECK-NEXT:    [[DOTSI_UNFOLD_PHI_JT0:%.*]] = phi i32 [ 0, [[BB2]] ]
; CHECK-NEXT:    br label [[BB7_JT0]]
; CHECK:       sel.si.unfold.true:
; CHECK-NEXT:    br i1 [[CMP1:%.*]], label [[BB9]], label [[SEL_SI_UNFOLD_FALSE_JT1:%.*]]
; CHECK:       sel.si.unfold.true.jt0:
; CHECK-NEXT:    [[DOTSI_UNFOLD_PHI1:%.*]] = phi i32 [ 0, [[BB2]] ]
; CHECK-NEXT:    br i1 [[CMP1]], label [[BB7_JT0]], label [[SEL_SI_UNFOLD_FALSE_JT1]]
; CHECK:       sel.si.unfold.false:
; CHECK-NEXT:    br label [[BB9]]
; CHECK:       sel.si.unfold.false.jt1:
; CHECK-NEXT:    [[DOTSI_UNFOLD_PHI2_JT1:%.*]] = phi i32 [ 1, [[SPEC_SELECT_SI_UNFOLD_FALSE:%.*]] ], [ 1, [[BB7]] ]
; CHECK-NEXT:    br label [[BB7_JT1:%.*]]
; CHECK:       BB7:
; CHECK-NEXT:    [[D_PROMOTED4:%.*]] = phi i16 [ 1, [[SPEC_SELECT_SI_UNFOLD_FALSE]] ], [ 1, [[SEL_SI_UNFOLD_TRUE:%.*]] ], [ 1, [[SEL_SI_UNFOLD_FALSE:%.*]] ]
; CHECK-NEXT:    [[_3:%.*]] = phi i32 [ poison, [[SPEC_SELECT_SI_UNFOLD_FALSE]] ], [ poison, [[SEL_SI_UNFOLD_TRUE]] ], [ poison, [[SEL_SI_UNFOLD_FALSE]] ]
; CHECK-NEXT:    switch i32 [[_3]], label [[BB1_BACKEDGE]] [
; CHECK-NEXT:      i32 0, label [[BB1]]
; CHECK-NEXT:      i32 1, label [[BB8:%.*]]
; CHECK-NEXT:    ]
; CHECK:       BB7.jt1:
; CHECK-NEXT:    [[D_PROMOTED4_JT1:%.*]] = phi i16 [ 1, [[SEL_SI_UNFOLD_FALSE_JT1]] ]
; CHECK-NEXT:    [[_3_JT1:%.*]] = phi i32 [ [[DOTSI_UNFOLD_PHI2_JT1]], [[SEL_SI_UNFOLD_FALSE_JT1]] ]
; CHECK-NEXT:    br label [[BB8]]
; CHECK:       BB7.jt0:
; CHECK-NEXT:    [[D_PROMOTED4_JT0:%.*]] = phi i16 [ 0, [[BB1]] ], [ 1, [[BB7]] ], [ 1, [[SPEC_SELECT_SI_UNFOLD_FALSE_JT0]] ]
; CHECK-NEXT:    [[_3_JT0:%.*]] = phi i32 [ 0, [[BB1]] ], [ [[DOTSI_UNFOLD_PHI1]], [[BB7]] ], [ [[DOTSI_UNFOLD_PHI_JT0]], [[SPEC_SELECT_SI_UNFOLD_FALSE_JT0]] ]
; CHECK-NEXT:    br label [[BB1]]
; CHECK:       BB1.backedge:
; CHECK-NEXT:    br label [[BB1]]
; CHECK:       BB8:
; CHECK-NEXT:    ret void
;
bb:
  %sel = select i1 %cmp1, i32 0, i32 1
  br label %BB1

BB1:                                              ; preds = %BB1.backedge, %BB7, %bb
  %i = phi i16 [ 0, %BB1.backedge ], [ 0, %bb ], [ 1, %BB7 ]
  br i1 %not, label %BB7, label %BB2

BB2:                                              ; preds = %BB1
  store i16 0, ptr %d, align 2
  %spec.select = select i1 %cmp2, i32 %sel, i32 0, !prof !1
  br label %BB7

BB7:                                              ; preds = %BB2, %BB1
  %d.promoted4 = phi i16 [ 0, %BB1 ], [ 1, %BB2 ]
  %_3 = phi i32 [ 0, %BB1 ], [ %spec.select, %BB2 ]
  switch i32 %_3, label %BB1.backedge [
  i32 0, label %BB1
  i32 1, label %BB8
  ]

BB1.backedge:                                     ; preds = %BB7
  br label %BB1

BB8:                                              ; preds = %BB7
  ret void
}

define void @pr106083_select_dead_uses(i1 %cmp1, i1 %not, ptr %p) {
; CHECK-LABEL: @pr106083_select_dead_uses(
; CHECK-NEXT:  bb:
; CHECK-NEXT:    br label [[DOTLOOPEXIT6:%.*]]
; CHECK:       .loopexit6:
; CHECK-NEXT:    br i1 [[NOT:%.*]], label [[SELECT_UNFOLD_JT0:%.*]], label [[BB1:%.*]]
; CHECK:       bb1:
; CHECK-NEXT:    [[I:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT:    [[NOT2:%.*]] = icmp eq i32 0, 0
; CHECK-NEXT:    br i1 [[NOT2]], label [[SELECT_UNFOLD:%.*]], label [[SPEC_SELECT7_SI_UNFOLD_FALSE_JT0:%.*]]
; CHECK:       spec.select7.si.unfold.false:
; CHECK-NEXT:    br label [[SELECT_UNFOLD1:%.*]]
; CHECK:       spec.select7.si.unfold.false.jt0:
; CHECK-NEXT:    [[DOTSI_UNFOLD_PHI_JT0:%.*]] = phi i32 [ 0, [[BB1]] ]
; CHECK-NEXT:    br label [[SELECT_UNFOLD_JT0]]
; CHECK:       spec.select.si.unfold.true:
; CHECK-NEXT:    br i1 [[CMP1:%.*]], label [[SELECT_UNFOLD1]], label [[SPEC_SELECT_SI_UNFOLD_FALSE_JT1:%.*]]
; CHECK:       spec.select.si.unfold.true.jt0:
; CHECK-NEXT:    [[DOTSI_UNFOLD_PHI1:%.*]] = phi i32 [ 0, [[BB1]] ]
; CHECK-NEXT:    br i1 [[CMP1]], label [[SELECT_UNFOLD_JT0]], label [[SPEC_SELECT_SI_UNFOLD_FALSE_JT1]]
; CHECK:       spec.select.si.unfold.false:
; CHECK-NEXT:    br label [[SELECT_UNFOLD1]]
; CHECK:       spec.select.si.unfold.false.jt1:
; CHECK-NEXT:    [[DOTSI_UNFOLD_PHI2_JT1:%.*]] = phi i32 [ 1, [[SPEC_SELECT_SI_UNFOLD_TRUE:%.*]] ], [ 1, [[SELECT_UNFOLD]] ]
; CHECK-NEXT:    br label [[SELECT_UNFOLD_JT1:%.*]]
; CHECK:       select.unfold:
; CHECK-NEXT:    [[_2:%.*]] = phi i32 [ poison, [[SPEC_SELECT_SI_UNFOLD_TRUE]] ], [ poison, [[SPEC_SELECT_SI_UNFOLD_FALSE:%.*]] ], [ poison, [[SPEC_SELECT7_SI_UNFOLD_FALSE:%.*]] ]
; CHECK-NEXT:    switch i32 [[_2]], label [[BB2:%.*]] [
; CHECK-NEXT:      i32 0, label [[DOTPREHEADER_PREHEADER:%.*]]
; CHECK-NEXT:      i32 1, label [[DOTLOOPEXIT6]]
; CHECK-NEXT:    ]
; CHECK:       select.unfold.jt1:
; CHECK-NEXT:    [[_2_JT1:%.*]] = phi i32 [ [[DOTSI_UNFOLD_PHI2_JT1]], [[SPEC_SELECT_SI_UNFOLD_FALSE_JT1]] ]
; CHECK-NEXT:    br label [[DOTLOOPEXIT6]]
; CHECK:       select.unfold.jt0:
; CHECK-NEXT:    [[_2_JT0:%.*]] = phi i32 [ 0, [[DOTLOOPEXIT6]] ], [ [[DOTSI_UNFOLD_PHI1]], [[SELECT_UNFOLD]] ], [ [[DOTSI_UNFOLD_PHI_JT0]], [[SPEC_SELECT7_SI_UNFOLD_FALSE_JT0]] ]
; CHECK-NEXT:    br label [[DOTPREHEADER_PREHEADER]]
; CHECK:       .preheader.preheader:
; CHECK-NEXT:    ret void
; CHECK:       bb2:
; CHECK-NEXT:    unreachable
;
bb:
  %spec.select = select i1 %cmp1, i32 0, i32 1
  br label %.loopexit6

.loopexit6:                                       ; preds = %select.unfold, %bb
  br i1 %not, label %select.unfold, label %bb1

bb1:                                              ; preds = %.loopexit6
  %i = load i32, ptr %p, align 4
  %not2 = icmp eq i32 0, 0
  %spec.select7 = select i1 %not2, i32 %spec.select, i32 0
  br label %select.unfold

select.unfold:                                    ; preds = %bb1, %.loopexit6
  %_2 = phi i32 [ 0, %.loopexit6 ], [ %spec.select7, %bb1 ]
  switch i32 %_2, label %bb2 [
  i32 0, label %.preheader.preheader
  i32 1, label %.loopexit6
  ]

.preheader.preheader:                             ; preds = %select.unfold
  ret void

bb2:                                              ; preds = %select.unfold
  unreachable
}


define i16 @DTU_update_crash() {
; CHECK-LABEL: @DTU_update_crash(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    br label [[FOR_BODY_SELECTBLOCK:%.*]]
; CHECK:       for.body.selectblock:
; CHECK-NEXT:    br i1 false, label [[SWITCHBLOCK_JT0:%.*]], label [[SEL_SI_UNFOLD_FALSE_JT0:%.*]]
; CHECK:       sel.si.unfold.false:
; CHECK-NEXT:    br label [[SWITCHBLOCK:%.*]]
; CHECK:       sel.si.unfold.false.jt0:
; CHECK-NEXT:    [[DOTSI_UNFOLD_PHI_JT0:%.*]] = phi i32 [ 0, [[FOR_BODY_SELECTBLOCK]] ]
; CHECK-NEXT:    br label [[SWITCHBLOCK_JT0]]
; CHECK:       switchblock:
; CHECK-NEXT:    [[SWITCHBLOCK_PHI:%.*]] = phi i32 [ poison, [[SEL_SI_UNFOLD_FALSE:%.*]] ]
; CHECK-NEXT:    [[P_24_ADDR_3:%.*]] = phi i32 [ 0, [[SEL_SI_UNFOLD_FALSE]] ]
; CHECK-NEXT:    switch i32 [[SWITCHBLOCK_PHI]], label [[CLEANUP:%.*]] [
; CHECK-NEXT:      i32 0, label [[FOR_INC:%.*]]
; CHECK-NEXT:      i32 1, label [[CLEANUP]]
; CHECK-NEXT:      i32 5, label [[FOR_BODY_SELECTBLOCK]]
; CHECK-NEXT:    ]
; CHECK:       switchblock.jt0:
; CHECK-NEXT:    [[SWITCHBLOCK_PHI_JT0:%.*]] = phi i32 [ 0, [[FOR_BODY_SELECTBLOCK]] ], [ [[DOTSI_UNFOLD_PHI_JT0]], [[SEL_SI_UNFOLD_FALSE_JT0]] ]
; CHECK-NEXT:    [[P_24_ADDR_3_JT0:%.*]] = phi i32 [ 0, [[FOR_BODY_SELECTBLOCK]] ], [ 0, [[SEL_SI_UNFOLD_FALSE_JT0]] ]
; CHECK-NEXT:    br label [[FOR_INC]]
; CHECK:       for.inc:
; CHECK-NEXT:    br i1 false, label [[FOR_BODY_SELECTBLOCK]], label [[CLEANUP]]
; CHECK:       cleanup:
; CHECK-NEXT:    call void (...) @llvm.fake.use(i32 [[P_24_ADDR_3_JT0]])
; CHECK-NEXT:    ret i16 0
;
entry:
  br label %for.body.selectblock

for.body.selectblock:                                        ; preds = %for.inc, %switchblock, %entry
  %sel = select i1 false, i32 0, i32 0
  br label %switchblock

switchblock:                                       ; preds = %for.body.selectblock
  %switchblock.phi = phi i32 [ %sel, %for.body.selectblock ]
  %p_24.addr.3 = phi i32 [ 0, %for.body.selectblock ]
  switch i32 %switchblock.phi, label %cleanup [
  i32 0, label %for.inc
  i32 1, label %cleanup
  i32 5, label %for.body.selectblock
  ]

for.inc:                                       ; preds = %switchblock
  br i1 false, label %for.body.selectblock, label %cleanup

cleanup:                                       ; preds = %for.inc, %switchblock, %switchblock
  call void (...) @llvm.fake.use(i32 %p_24.addr.3)
  ret i16 0
}

define i8 @cyclesInPaths1(i1 %call12, i1 %cmp18) {
; CHECK-LABEL: @cyclesInPaths1(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    br label [[SWITCHPHIDEF_FOR_BODY:%.*]]
; CHECK:       switchPhiDef.for.body:
; CHECK-NEXT:    [[SWITCHPHI_CURSTATE:%.*]] = phi i32 [ [[CURSTATE_1:%.*]], [[DETBB2:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; CHECK-NEXT:    br i1 [[CALL12:%.*]], label [[DETBB1:%.*]], label [[IF_ELSE:%.*]]
; CHECK:       if.else:
; CHECK-NEXT:    br label [[DETBB1]]
; CHECK:       detBB1:
; CHECK-NEXT:    [[NEWSTATE_02:%.*]] = phi i32 [ 2, [[SWITCHPHIDEF_FOR_BODY]] ], [ 4, [[IF_ELSE]] ]
; CHECK-NEXT:    br i1 [[CMP18:%.*]], label [[DETBB2]], label [[IF_END20:%.*]]
; CHECK:       if.end20:
; CHECK-NEXT:    br i1 [[CALL12]], label [[IF_END23:%.*]], label [[SWITCHBB:%.*]]
; CHECK:       switchBB:
; CHECK-NEXT:    switch i32 [[SWITCHPHI_CURSTATE]], label [[IF_END23]] [
; CHECK-NEXT:      i32 4, label [[RET1:%.*]]
; CHECK-NEXT:      i32 0, label [[RET2:%.*]]
; CHECK-NEXT:    ]
; CHECK:       ret1:
; CHECK-NEXT:    ret i8 1
; CHECK:       ret2:
; CHECK-NEXT:    ret i8 2
; CHECK:       if.end23:
; CHECK-NEXT:    br label [[DETBB2]]
; CHECK:       detBB2:
; CHECK-NEXT:    [[CURSTATE_1]] = phi i32 [ [[NEWSTATE_02]], [[IF_END23]] ], [ 0, [[DETBB1]] ]
; CHECK-NEXT:    br label [[SWITCHPHIDEF_FOR_BODY]]
;
entry:
  br label %switchPhiDef.for.body

switchPhiDef.for.body:                                         ; preds = %detBB2, %entry
  %switchPhi.curState = phi i32 [ %curState.1, %detBB2 ], [ 0, %entry ]
  br i1 %call12, label %detBB1, label %if.else

if.else:                                          ; preds = %switchPhiDef.for.body
  br label %detBB1

detBB1:                                         ; preds = %if.else, %switchPhiDef.for.body
  %newState.02 = phi i32 [ 2, %switchPhiDef.for.body ], [ 4, %if.else ]
  br i1 %cmp18, label %detBB2, label %if.end20

if.end20:                                         ; preds = %detBB1
  br i1 %call12, label %if.end23, label %switchBB

switchBB:                                        ; preds = %if.end20
  switch i32 %switchPhi.curState, label %if.end23 [
  i32 4, label %ret1
  i32 0, label %ret2
  ]

ret1:                                       ; preds = %switchBB
  ret i8 1

ret2:                                       ; preds = %switchBB
  ret i8 2

if.end23:                                         ; preds = %switchBB, %if.end20
  br label %detBB2

detBB2:                                          ; preds = %if.end23, %detBB1
  %curState.1 = phi i32 [ %newState.02, %if.end23 ], [ 0, %detBB1 ]
  br label %switchPhiDef.for.body
}

define void @cyclesInPaths2(i1 %tobool) {
; CHECK-LABEL: @cyclesInPaths2(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    br label [[IF_END5:%.*]]
; CHECK:       if.end5:
; CHECK-NEXT:    [[P_SROA_8_051:%.*]] = phi i16 [ [[RETVAL_SROA_6_0_I:%.*]], [[BB_EXIT:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; CHECK-NEXT:    call void (...) @llvm.fake.use(i32 3)
; CHECK-NEXT:    br i1 [[TOBOOL:%.*]], label [[IF_END_I:%.*]], label [[BB_EXIT]]
; CHECK:       if.end5.jt0:
; CHECK-NEXT:    [[P_SROA_8_051_JT0:%.*]] = phi i16 [ [[RETVAL_SROA_6_0_I_JT0:%.*]], [[BB_EXIT_JT0:%.*]] ]
; CHECK-NEXT:    call void (...) @llvm.fake.use(i32 3)
; CHECK-NEXT:    br i1 [[TOBOOL]], label [[IF_END_I_JT0:%.*]], label [[BB_EXIT]]
; CHECK:       if.end5.jt1:
; CHECK-NEXT:    [[P_SROA_8_051_JT1:%.*]] = phi i16 [ [[RETVAL_SROA_6_0_I_JT1:%.*]], [[BB_EXIT_JT1:%.*]] ]
; CHECK-NEXT:    call void (...) @llvm.fake.use(i32 3)
; CHECK-NEXT:    br i1 [[TOBOOL]], label [[IF_END_I_JT1:%.*]], label [[BB_EXIT]]
; CHECK:       if.end.i:
; CHECK-NEXT:    switch i16 [[P_SROA_8_051]], label [[SW_DEFAULT_I:%.*]] [
; CHECK-NEXT:      i16 1, label [[SW_BB_I:%.*]]
; CHECK-NEXT:      i16 0, label [[BB_EXIT_JT0]]
; CHECK-NEXT:    ]
; CHECK:       if.end.i.jt0:
; CHECK-NEXT:    br label [[BB_EXIT_JT0]]
; CHECK:       if.end.i.jt1:
; CHECK-NEXT:    br label [[SW_BB_I]]
; CHECK:       sw.bb.i:
; CHECK-NEXT:    call void (...) @llvm.fake.use(i32 1)
; CHECK-NEXT:    br label [[BB_EXIT_JT1]]
; CHECK:       sw.default.i:
; CHECK-NEXT:    unreachable
; CHECK:       bb.exit:
; CHECK-NEXT:    [[RETVAL_SROA_6_0_I]] = phi i16 [ 0, [[IF_END5_JT1:%.*]] ], [ 0, [[IF_END5]] ], [ 0, [[IF_END5_JT0:%.*]] ]
; CHECK-NEXT:    call void (...) @llvm.fake.use(i32 2)
; CHECK-NEXT:    br label [[IF_END5]]
; CHECK:       bb.exit.jt0:
; CHECK-NEXT:    [[RETVAL_SROA_6_0_I_JT0]] = phi i16 [ 0, [[IF_END_I]] ], [ 0, [[IF_END_I_JT0]] ]
; CHECK-NEXT:    call void (...) @llvm.fake.use(i32 2)
; CHECK-NEXT:    br label [[IF_END5_JT0]]
; CHECK:       bb.exit.jt1:
; CHECK-NEXT:    [[RETVAL_SROA_6_0_I_JT1]] = phi i16 [ 1, [[SW_BB_I]] ]
; CHECK-NEXT:    call void (...) @llvm.fake.use(i32 2)
; CHECK-NEXT:    br label [[IF_END5_JT1]]
;
entry:
  br label %if.end5

if.end5:                                          ; preds = %bb.exit, %entry
  %P.sroa.8.051 = phi i16 [ %retval.sroa.6.0.i, %bb.exit ], [ 0, %entry ]
  call void (...) @llvm.fake.use(i32 3)
  br i1 %tobool, label %if.end.i, label %bb.exit

if.end.i:                                         ; preds = %if.end5
  switch i16 %P.sroa.8.051, label %sw.default.i [
  i16 1, label %sw.bb.i
  i16 0, label %bb.exit
  ]

sw.bb.i:                                          ; preds = %if.end.i
  call void (...) @llvm.fake.use(i32 1)
  br label %bb.exit

sw.default.i:                                     ; preds = %if.end.i
  unreachable

bb.exit: ; preds = %sw.bb.i, %if.end.i, %if.end5
  %retval.sroa.6.0.i = phi i16 [ 1, %sw.bb.i ], [ 0, %if.end5 ], [ 0, %if.end.i ]
  call void (...) @llvm.fake.use(i32 2)
  br label %if.end5
}

declare void @llvm.fake.use(...)

!0 = !{!"function_entry_count", i32 10}
!1 = !{!"branch_weights", i32 3, i32 5}
;.
; CHECK: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) }
;.
; CHECK: [[META0:![0-9]+]] = !{!"function_entry_count", i32 10}
; CHECK: [[PROF1]] = !{!"branch_weights", i32 3, i32 5}
;.