| // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ |
| // expected-no-diagnostics |
| #ifndef HEADER |
| #define HEADER |
| |
| // Test host codegen. |
| // RUN: %clang_cc1 -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 |
| // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK2 |
| // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s |
| // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 |
| |
| // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s |
| // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 |
| // RUN: %clang_cc1 -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 |
| // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK6 |
| |
| // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s |
| // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7 |
| // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s |
| // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8 |
| |
| // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 |
| // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s |
| // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 |
| // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 |
| // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s |
| // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 |
| #ifdef CK1 |
| |
| template <typename T, int X, long long Y> |
| struct SS{ |
| T a[X]; |
| float b; |
| int foo(void) { |
| |
| #pragma omp target |
| #pragma omp teams distribute parallel for simd |
| for(int i = 0; i < X; i++) { |
| a[i] = (T)0; |
| } |
| #pragma omp target |
| #pragma omp teams distribute parallel for simd schedule(static) |
| for(int i = 0; i < X; i++) { |
| a[i] = (T)0; |
| } |
| #pragma omp target |
| #pragma omp teams distribute parallel for simd schedule(static, X/2) |
| for(int i = 0; i < X; i++) { |
| a[i] = (T)0; |
| } |
| |
| #pragma omp target |
| #pragma omp teams distribute parallel for simd schedule(dynamic) |
| for(int i = 0; i < X; i++) { |
| a[i] = (T)0; |
| } |
| |
| #pragma omp target |
| #pragma omp teams distribute parallel for simd schedule(dynamic, X/2) |
| for(int i = 0; i < X; i++) { |
| a[i] = (T)0; |
| } |
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| return a[0]; |
| } |
| }; |
| |
| int teams_template_struct(void) { |
| SS<int, 123, 456> V; |
| return V.foo(); |
| |
| } |
| #endif // CK1 |
| |
| // Test host codegen. |
| // RUN: %clang_cc1 -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 |
| |
| // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK14 |
| |
| // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s |
| // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 |
| // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s |
| // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16 |
| |
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| // RUN: %clang_cc1 -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17 |
| // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s |
| // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK18 |
| |
| // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19 |
| // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s |
| // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK20 |
| |
| // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK21 |
| // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s |
| // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK22 |
| // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK23 |
| // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s |
| // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK24 |
| #ifdef CK2 |
| |
| template <typename T, int n> |
| int tmain(T argc) { |
| T a[n]; |
| int m = 10; |
| #pragma omp target |
| #pragma omp teams distribute parallel for simd |
| for(int i = 0; i < n; i++) { |
| a[i] = (T)0; |
| } |
| #pragma omp target |
| #pragma omp teams distribute parallel for simd schedule(static) |
| for(int i = 0; i < n; i++) { |
| a[i] = (T)0; |
| } |
| #pragma omp target |
| #pragma omp teams distribute parallel for simd schedule(static, m) |
| for(int i = 0; i < n; i++) { |
| a[i] = (T)0; |
| } |
| #pragma omp target |
| #pragma omp teams distribute parallel for simd schedule(dynamic) |
| for(int i = 0; i < n; i++) { |
| a[i] = (T)0; |
| } |
| #pragma omp target |
| #pragma omp teams distribute parallel for simd schedule(dynamic, m) |
| for(int i = 0; i < n; i++) { |
| a[i] = (T)0; |
| } |
| return 0; |
| } |
| |
| int main (int argc, char **argv) { |
| int n = 100; |
| int a[n]; |
| int m = 10; |
| #pragma omp target |
| #pragma omp teams distribute parallel for simd |
| for(int i = 0; i < n; i++) { |
| a[i] = 0; |
| } |
| #pragma omp target |
| #pragma omp teams distribute parallel for simd dist_schedule(static) |
| for(int i = 0; i < n; i++) { |
| a[i] = 0; |
| } |
| #pragma omp target |
| #pragma omp teams distribute parallel for simd dist_schedule(static, m) |
| for(int i = 0; i < n; i++) { |
| a[i] = 0; |
| } |
| #pragma omp target |
| #pragma omp teams distribute parallel for simd schedule(dynamic) |
| for(int i = 0; i < n; i++) { |
| a[i] = 0; |
| } |
| #pragma omp target |
| #pragma omp teams distribute parallel for simd schedule(dynamic, m) |
| for(int i = 0; i < n; i++) { |
| a[i] = 0; |
| } |
| return tmain<int, 10>(argc); |
| } |
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| #endif // CK2 |
| #endif // #ifndef HEADER |
| // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 |
| // CHECK1-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) |
| // CHECK1-NEXT: ret i32 [[CALL]] |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv |
| // CHECK1-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK1-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK1-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK1-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK1-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK1-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK1-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** |
| // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 |
| // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** |
| // CHECK1-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 |
| // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 |
| // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 |
| // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) |
| // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] |
| // CHECK1: omp_offload.failed: |
| // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] |
| // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] |
| // CHECK1: omp_offload.cont: |
| // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** |
| // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 |
| // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** |
| // CHECK1-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 |
| // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 |
| // CHECK1-NEXT: store i8* null, i8** [[TMP13]], align 8 |
| // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 |
| // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 |
| // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] |
| // CHECK1: omp_offload.failed7: |
| // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]] |
| // CHECK1: omp_offload.cont8: |
| // CHECK1-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** |
| // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 |
| // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** |
| // CHECK1-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 |
| // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 |
| // CHECK1-NEXT: store i8* null, i8** [[TMP22]], align 8 |
| // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 |
| // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK1-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 |
| // CHECK1-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] |
| // CHECK1: omp_offload.failed14: |
| // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT15]] |
| // CHECK1: omp_offload.cont15: |
| // CHECK1-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** |
| // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8 |
| // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** |
| // CHECK1-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8 |
| // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0 |
| // CHECK1-NEXT: store i8* null, i8** [[TMP31]], align 8 |
| // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 |
| // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK1-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK1-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 |
| // CHECK1-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] |
| // CHECK1: omp_offload.failed21: |
| // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT22]] |
| // CHECK1: omp_offload.cont22: |
| // CHECK1-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** |
| // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8 |
| // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** |
| // CHECK1-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8 |
| // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0 |
| // CHECK1-NEXT: store i8* null, i8** [[TMP40]], align 8 |
| // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 |
| // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK1-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK1-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 |
| // CHECK1-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] |
| // CHECK1: omp_offload.failed28: |
| // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT29]] |
| // CHECK1: omp_offload.cont29: |
| // CHECK1-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0 |
| // CHECK1-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 |
| // CHECK1-NEXT: ret i32 [[TMP45]] |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 |
| // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. |
| // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK1: cond.true: |
| // CHECK1-NEXT: br label [[COND_END:%.*]] |
| // CHECK1: cond.false: |
| // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK1-NEXT: br label [[COND_END]] |
| // CHECK1: cond.end: |
| // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK1: omp.inner.for.cond: |
| // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 |
| // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !8 |
| // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK1: omp.inner.for.body: |
| // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !8 |
| // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !8 |
| // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !8 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK1: omp.inner.for.inc: |
| // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 |
| // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !8 |
| // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] |
| // CHECK1: omp.inner.for.end: |
| // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK1: omp.loop.exit: |
| // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK1: .omp.final.then: |
| // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK1: .omp.final.done: |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 |
| // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 |
| // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK1: cond.true: |
| // CHECK1-NEXT: br label [[COND_END:%.*]] |
| // CHECK1: cond.false: |
| // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: br label [[COND_END]] |
| // CHECK1: cond.end: |
| // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK1: omp.inner.for.cond: |
| // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 |
| // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 |
| // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK1: omp.inner.for.body: |
| // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 |
| // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 |
| // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 |
| // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 |
| // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 |
| // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK1: omp.body.continue: |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK1: omp.inner.for.inc: |
| // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 |
| // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] |
| // CHECK1: omp.inner.for.end: |
| // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK1: omp.loop.exit: |
| // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK1: .omp.final.then: |
| // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK1: .omp.final.done: |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41 |
| // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 |
| // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK1: cond.true: |
| // CHECK1-NEXT: br label [[COND_END:%.*]] |
| // CHECK1: cond.false: |
| // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK1-NEXT: br label [[COND_END]] |
| // CHECK1: cond.end: |
| // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK1: omp.inner.for.cond: |
| // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !17 |
| // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK1: omp.inner.for.body: |
| // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !17 |
| // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !17 |
| // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !17 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK1: omp.inner.for.inc: |
| // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !17 |
| // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] |
| // CHECK1: omp.inner.for.end: |
| // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK1: omp.loop.exit: |
| // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK1: .omp.final.then: |
| // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK1: .omp.final.done: |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 |
| // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 |
| // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK1: cond.true: |
| // CHECK1-NEXT: br label [[COND_END:%.*]] |
| // CHECK1: cond.false: |
| // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: br label [[COND_END]] |
| // CHECK1: cond.end: |
| // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK1: omp.inner.for.cond: |
| // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 |
| // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20 |
| // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK1: omp.inner.for.body: |
| // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 |
| // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !20 |
| // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !20 |
| // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 |
| // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !20 |
| // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK1: omp.body.continue: |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK1: omp.inner.for.inc: |
| // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 |
| // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]] |
| // CHECK1: omp.inner.for.end: |
| // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK1: omp.loop.exit: |
| // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK1: .omp.final.then: |
| // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK1: .omp.final.done: |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46 |
| // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 |
| // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK1: cond.true: |
| // CHECK1-NEXT: br label [[COND_END:%.*]] |
| // CHECK1: cond.false: |
| // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK1-NEXT: br label [[COND_END]] |
| // CHECK1: cond.end: |
| // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK1: omp.inner.for.cond: |
| // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 |
| // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23 |
| // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK1: omp.inner.for.body: |
| // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !23 |
| // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23 |
| // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !23 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK1: omp.inner.for.inc: |
| // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 |
| // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !23 |
| // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] |
| // CHECK1: omp.inner.for.end: |
| // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK1: omp.loop.exit: |
| // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK1: .omp.final.then: |
| // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK1: .omp.final.done: |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 |
| // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) |
| // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK1: omp.dispatch.cond: |
| // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 |
| // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] |
| // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK1: cond.true: |
| // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK1-NEXT: br label [[COND_END:%.*]] |
| // CHECK1: cond.false: |
| // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: br label [[COND_END]] |
| // CHECK1: cond.end: |
| // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] |
| // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 |
| // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] |
| // CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK1: omp.dispatch.body: |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK1: omp.inner.for.cond: |
| // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 |
| // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26 |
| // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] |
| // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK1: omp.inner.for.body: |
| // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 |
| // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 |
| // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !26 |
| // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !26 |
| // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 |
| // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !26 |
| // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK1: omp.body.continue: |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK1: omp.inner.for.inc: |
| // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 |
| // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 |
| // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] |
| // CHECK1: omp.inner.for.end: |
| // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK1: omp.dispatch.inc: |
| // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] |
| // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] |
| // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK1: omp.dispatch.end: |
| // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK1-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 |
| // CHECK1-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK1: .omp.final.then: |
| // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK1: .omp.final.done: |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52 |
| // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 |
| // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK1: cond.true: |
| // CHECK1-NEXT: br label [[COND_END:%.*]] |
| // CHECK1: cond.false: |
| // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK1-NEXT: br label [[COND_END]] |
| // CHECK1: cond.end: |
| // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK1: omp.inner.for.cond: |
| // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 |
| // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29 |
| // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK1: omp.inner.for.body: |
| // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29 |
| // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29 |
| // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !29 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK1: omp.inner.for.inc: |
| // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 |
| // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29 |
| // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]] |
| // CHECK1: omp.inner.for.end: |
| // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK1: omp.loop.exit: |
| // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK1: .omp.final.then: |
| // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK1: .omp.final.done: |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 |
| // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 |
| // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) |
| // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK1: omp.dispatch.cond: |
| // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK1: omp.dispatch.body: |
| // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK1: omp.inner.for.cond: |
| // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32 |
| // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !32 |
| // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] |
| // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK1: omp.inner.for.body: |
| // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32 |
| // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 |
| // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !32 |
| // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !32 |
| // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 |
| // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !32 |
| // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK1: omp.body.continue: |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK1: omp.inner.for.inc: |
| // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32 |
| // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 |
| // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]] |
| // CHECK1: omp.inner.for.end: |
| // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK1: omp.dispatch.inc: |
| // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK1: omp.dispatch.end: |
| // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK1: .omp.final.then: |
| // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK1: .omp.final.done: |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58 |
| // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14 |
| // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK1: cond.true: |
| // CHECK1-NEXT: br label [[COND_END:%.*]] |
| // CHECK1: cond.false: |
| // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK1-NEXT: br label [[COND_END]] |
| // CHECK1: cond.end: |
| // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK1: omp.inner.for.cond: |
| // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35 |
| // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35 |
| // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK1: omp.inner.for.body: |
| // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !35 |
| // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35 |
| // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !35 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK1: omp.inner.for.inc: |
| // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35 |
| // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !35 |
| // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]] |
| // CHECK1: omp.inner.for.end: |
| // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK1: omp.loop.exit: |
| // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK1: .omp.final.then: |
| // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK1: .omp.final.done: |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15 |
| // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 |
| // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) |
| // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK1: omp.dispatch.cond: |
| // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK1: omp.dispatch.body: |
| // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK1: omp.inner.for.cond: |
| // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38 |
| // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !38 |
| // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] |
| // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK1: omp.inner.for.body: |
| // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38 |
| // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 |
| // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !38 |
| // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !38 |
| // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 |
| // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !38 |
| // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK1: omp.body.continue: |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK1: omp.inner.for.inc: |
| // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38 |
| // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 |
| // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38 |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]] |
| // CHECK1: omp.inner.for.end: |
| // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK1: omp.dispatch.inc: |
| // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK1: omp.dispatch.end: |
| // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK1: .omp.final.then: |
| // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK1: .omp.final.done: |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg |
| // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_template_structv |
| // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 |
| // CHECK2-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) |
| // CHECK2-NEXT: ret i32 [[CALL]] |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv |
| // CHECK2-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK2-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK2-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK2-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK2-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK2-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK2-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK2-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK2-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** |
| // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 |
| // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** |
| // CHECK2-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 |
| // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 |
| // CHECK2-NEXT: store i8* null, i8** [[TMP4]], align 8 |
| // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) |
| // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK2-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK2-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] |
| // CHECK2: omp_offload.failed: |
| // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] |
| // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] |
| // CHECK2: omp_offload.cont: |
| // CHECK2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** |
| // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 |
| // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** |
| // CHECK2-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 |
| // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 |
| // CHECK2-NEXT: store i8* null, i8** [[TMP13]], align 8 |
| // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 |
| // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK2-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK2-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 |
| // CHECK2-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] |
| // CHECK2: omp_offload.failed7: |
| // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT8]] |
| // CHECK2: omp_offload.cont8: |
| // CHECK2-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** |
| // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 |
| // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** |
| // CHECK2-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 |
| // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 |
| // CHECK2-NEXT: store i8* null, i8** [[TMP22]], align 8 |
| // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 |
| // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK2-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK2-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 |
| // CHECK2-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] |
| // CHECK2: omp_offload.failed14: |
| // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT15]] |
| // CHECK2: omp_offload.cont15: |
| // CHECK2-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** |
| // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8 |
| // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** |
| // CHECK2-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8 |
| // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0 |
| // CHECK2-NEXT: store i8* null, i8** [[TMP31]], align 8 |
| // CHECK2-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 |
| // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK2-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK2-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 |
| // CHECK2-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] |
| // CHECK2: omp_offload.failed21: |
| // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT22]] |
| // CHECK2: omp_offload.cont22: |
| // CHECK2-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** |
| // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8 |
| // CHECK2-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** |
| // CHECK2-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8 |
| // CHECK2-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0 |
| // CHECK2-NEXT: store i8* null, i8** [[TMP40]], align 8 |
| // CHECK2-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 |
| // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK2-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK2-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 |
| // CHECK2-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] |
| // CHECK2: omp_offload.failed28: |
| // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT29]] |
| // CHECK2: omp_offload.cont29: |
| // CHECK2-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0 |
| // CHECK2-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 |
| // CHECK2-NEXT: ret i32 [[TMP45]] |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 |
| // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. |
| // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK2: cond.true: |
| // CHECK2-NEXT: br label [[COND_END:%.*]] |
| // CHECK2: cond.false: |
| // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK2-NEXT: br label [[COND_END]] |
| // CHECK2: cond.end: |
| // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK2: omp.inner.for.cond: |
| // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 |
| // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !8 |
| // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK2: omp.inner.for.body: |
| // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !8 |
| // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !8 |
| // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !8 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK2: omp.inner.for.inc: |
| // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 |
| // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !8 |
| // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] |
| // CHECK2: omp.inner.for.end: |
| // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK2: omp.loop.exit: |
| // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK2: .omp.final.then: |
| // CHECK2-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK2: .omp.final.done: |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 |
| // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 |
| // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK2: cond.true: |
| // CHECK2-NEXT: br label [[COND_END:%.*]] |
| // CHECK2: cond.false: |
| // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: br label [[COND_END]] |
| // CHECK2: cond.end: |
| // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK2: omp.inner.for.cond: |
| // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 |
| // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 |
| // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK2: omp.inner.for.body: |
| // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 |
| // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 |
| // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 |
| // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 |
| // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 |
| // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK2: omp.body.continue: |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK2: omp.inner.for.inc: |
| // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 |
| // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] |
| // CHECK2: omp.inner.for.end: |
| // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK2: omp.loop.exit: |
| // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK2-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK2: .omp.final.then: |
| // CHECK2-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK2: .omp.final.done: |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41 |
| // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2 |
| // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK2: cond.true: |
| // CHECK2-NEXT: br label [[COND_END:%.*]] |
| // CHECK2: cond.false: |
| // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK2-NEXT: br label [[COND_END]] |
| // CHECK2: cond.end: |
| // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK2: omp.inner.for.cond: |
| // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !17 |
| // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK2: omp.inner.for.body: |
| // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !17 |
| // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !17 |
| // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !17 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK2: omp.inner.for.inc: |
| // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !17 |
| // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] |
| // CHECK2: omp.inner.for.end: |
| // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK2: omp.loop.exit: |
| // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK2: .omp.final.then: |
| // CHECK2-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK2: .omp.final.done: |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3 |
| // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 |
| // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK2: cond.true: |
| // CHECK2-NEXT: br label [[COND_END:%.*]] |
| // CHECK2: cond.false: |
| // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: br label [[COND_END]] |
| // CHECK2: cond.end: |
| // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK2: omp.inner.for.cond: |
| // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 |
| // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20 |
| // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK2: omp.inner.for.body: |
| // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 |
| // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !20 |
| // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !20 |
| // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 |
| // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !20 |
| // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK2: omp.body.continue: |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK2: omp.inner.for.inc: |
| // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 |
| // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]] |
| // CHECK2: omp.inner.for.end: |
| // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK2: omp.loop.exit: |
| // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK2-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK2: .omp.final.then: |
| // CHECK2-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK2: .omp.final.done: |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46 |
| // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6 |
| // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK2: cond.true: |
| // CHECK2-NEXT: br label [[COND_END:%.*]] |
| // CHECK2: cond.false: |
| // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK2-NEXT: br label [[COND_END]] |
| // CHECK2: cond.end: |
| // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK2: omp.inner.for.cond: |
| // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 |
| // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23 |
| // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK2: omp.inner.for.body: |
| // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !23 |
| // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23 |
| // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !23 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK2: omp.inner.for.inc: |
| // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 |
| // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !23 |
| // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] |
| // CHECK2: omp.inner.for.end: |
| // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK2: omp.loop.exit: |
| // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK2: .omp.final.then: |
| // CHECK2-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK2: .omp.final.done: |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..7 |
| // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) |
| // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK2: omp.dispatch.cond: |
| // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK2-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 |
| // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] |
| // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK2: cond.true: |
| // CHECK2-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK2-NEXT: br label [[COND_END:%.*]] |
| // CHECK2: cond.false: |
| // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: br label [[COND_END]] |
| // CHECK2: cond.end: |
| // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] |
| // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 |
| // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] |
| // CHECK2-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK2: omp.dispatch.body: |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK2: omp.inner.for.cond: |
| // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 |
| // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26 |
| // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] |
| // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK2: omp.inner.for.body: |
| // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 |
| // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 |
| // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !26 |
| // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !26 |
| // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 |
| // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !26 |
| // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK2: omp.body.continue: |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK2: omp.inner.for.inc: |
| // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 |
| // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 |
| // CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] |
| // CHECK2: omp.inner.for.end: |
| // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK2: omp.dispatch.inc: |
| // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] |
| // CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] |
| // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK2: omp.dispatch.end: |
| // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK2-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 |
| // CHECK2-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK2: .omp.final.then: |
| // CHECK2-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK2: .omp.final.done: |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52 |
| // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..10 |
| // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK2: cond.true: |
| // CHECK2-NEXT: br label [[COND_END:%.*]] |
| // CHECK2: cond.false: |
| // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK2-NEXT: br label [[COND_END]] |
| // CHECK2: cond.end: |
| // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK2: omp.inner.for.cond: |
| // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 |
| // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29 |
| // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK2: omp.inner.for.body: |
| // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29 |
| // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29 |
| // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !29 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK2: omp.inner.for.inc: |
| // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 |
| // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29 |
| // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]] |
| // CHECK2: omp.inner.for.end: |
| // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK2: omp.loop.exit: |
| // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK2: .omp.final.then: |
| // CHECK2-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK2: .omp.final.done: |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..11 |
| // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 |
| // CHECK2-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) |
| // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK2: omp.dispatch.cond: |
| // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK2: omp.dispatch.body: |
| // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK2: omp.inner.for.cond: |
| // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32 |
| // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !32 |
| // CHECK2-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] |
| // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK2: omp.inner.for.body: |
| // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32 |
| // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 |
| // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !32 |
| // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !32 |
| // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 |
| // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !32 |
| // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK2: omp.body.continue: |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK2: omp.inner.for.inc: |
| // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32 |
| // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 |
| // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]] |
| // CHECK2: omp.inner.for.end: |
| // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK2: omp.dispatch.inc: |
| // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK2: omp.dispatch.end: |
| // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK2: .omp.final.then: |
| // CHECK2-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK2: .omp.final.done: |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58 |
| // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..14 |
| // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK2: cond.true: |
| // CHECK2-NEXT: br label [[COND_END:%.*]] |
| // CHECK2: cond.false: |
| // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK2-NEXT: br label [[COND_END]] |
| // CHECK2: cond.end: |
| // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK2: omp.inner.for.cond: |
| // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35 |
| // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35 |
| // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK2: omp.inner.for.body: |
| // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !35 |
| // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35 |
| // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !35 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK2: omp.inner.for.inc: |
| // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35 |
| // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !35 |
| // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]] |
| // CHECK2: omp.inner.for.end: |
| // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK2: omp.loop.exit: |
| // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK2: .omp.final.then: |
| // CHECK2-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK2: .omp.final.done: |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..15 |
| // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 |
| // CHECK2-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) |
| // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK2: omp.dispatch.cond: |
| // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK2: omp.dispatch.body: |
| // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK2: omp.inner.for.cond: |
| // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38 |
| // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !38 |
| // CHECK2-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] |
| // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK2: omp.inner.for.body: |
| // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38 |
| // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 |
| // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !38 |
| // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !38 |
| // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 |
| // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !38 |
| // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK2: omp.body.continue: |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK2: omp.inner.for.inc: |
| // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38 |
| // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 |
| // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38 |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]] |
| // CHECK2: omp.inner.for.end: |
| // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK2: omp.dispatch.inc: |
| // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK2: omp.dispatch.end: |
| // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK2: .omp.final.then: |
| // CHECK2-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK2: .omp.final.done: |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg |
| // CHECK2-SAME: () #[[ATTR3:[0-9]+]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv |
| // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 |
| // CHECK3-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) |
| // CHECK3-NEXT: ret i32 [[CALL]] |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv |
| // CHECK3-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK3-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK3-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK3-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK3-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK3-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK3-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** |
| // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 |
| // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** |
| // CHECK3-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 |
| // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 |
| // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 8 |
| // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) |
| // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] |
| // CHECK3: omp_offload.failed: |
| // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] |
| // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] |
| // CHECK3: omp_offload.cont: |
| // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** |
| // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 |
| // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** |
| // CHECK3-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 |
| // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 |
| // CHECK3-NEXT: store i8* null, i8** [[TMP13]], align 8 |
| // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 |
| // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 |
| // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] |
| // CHECK3: omp_offload.failed7: |
| // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]] |
| // CHECK3: omp_offload.cont8: |
| // CHECK3-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** |
| // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 |
| // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** |
| // CHECK3-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 |
| // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 |
| // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 8 |
| // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 |
| // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK3-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK3-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 |
| // CHECK3-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] |
| // CHECK3: omp_offload.failed14: |
| // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT15]] |
| // CHECK3: omp_offload.cont15: |
| // CHECK3-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** |
| // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8 |
| // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** |
| // CHECK3-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8 |
| // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0 |
| // CHECK3-NEXT: store i8* null, i8** [[TMP31]], align 8 |
| // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 |
| // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK3-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK3-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 |
| // CHECK3-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] |
| // CHECK3: omp_offload.failed21: |
| // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT22]] |
| // CHECK3: omp_offload.cont22: |
| // CHECK3-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** |
| // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8 |
| // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** |
| // CHECK3-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8 |
| // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0 |
| // CHECK3-NEXT: store i8* null, i8** [[TMP40]], align 8 |
| // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 |
| // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK3-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK3-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 |
| // CHECK3-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] |
| // CHECK3: omp_offload.failed28: |
| // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT29]] |
| // CHECK3: omp_offload.cont29: |
| // CHECK3-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0 |
| // CHECK3-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 |
| // CHECK3-NEXT: ret i32 [[TMP45]] |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 |
| // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. |
| // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK3: cond.true: |
| // CHECK3-NEXT: br label [[COND_END:%.*]] |
| // CHECK3: cond.false: |
| // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK3-NEXT: br label [[COND_END]] |
| // CHECK3: cond.end: |
| // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK3: omp.inner.for.cond: |
| // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 |
| // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !8 |
| // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK3: omp.inner.for.body: |
| // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !8 |
| // CHECK3-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !8 |
| // CHECK3-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !8 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK3: omp.inner.for.inc: |
| // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 |
| // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !8 |
| // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] |
| // CHECK3: omp.inner.for.end: |
| // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK3: omp.loop.exit: |
| // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK3: .omp.final.then: |
| // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK3: .omp.final.done: |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 |
| // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK3-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 |
| // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK3: cond.true: |
| // CHECK3-NEXT: br label [[COND_END:%.*]] |
| // CHECK3: cond.false: |
| // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: br label [[COND_END]] |
| // CHECK3: cond.end: |
| // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK3: omp.inner.for.cond: |
| // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 |
| // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 |
| // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK3: omp.inner.for.body: |
| // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 |
| // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 |
| // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 |
| // CHECK3-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 |
| // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 |
| // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK3: omp.body.continue: |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK3: omp.inner.for.inc: |
| // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 |
| // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] |
| // CHECK3: omp.inner.for.end: |
| // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK3: omp.loop.exit: |
| // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK3: .omp.final.then: |
| // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK3: .omp.final.done: |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41 |
| // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 |
| // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK3: cond.true: |
| // CHECK3-NEXT: br label [[COND_END:%.*]] |
| // CHECK3: cond.false: |
| // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK3-NEXT: br label [[COND_END]] |
| // CHECK3: cond.end: |
| // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK3: omp.inner.for.cond: |
| // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !17 |
| // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK3: omp.inner.for.body: |
| // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !17 |
| // CHECK3-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !17 |
| // CHECK3-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !17 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK3: omp.inner.for.inc: |
| // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !17 |
| // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] |
| // CHECK3: omp.inner.for.end: |
| // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK3: omp.loop.exit: |
| // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK3: .omp.final.then: |
| // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK3: .omp.final.done: |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 |
| // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK3-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 |
| // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK3: cond.true: |
| // CHECK3-NEXT: br label [[COND_END:%.*]] |
| // CHECK3: cond.false: |
| // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: br label [[COND_END]] |
| // CHECK3: cond.end: |
| // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK3: omp.inner.for.cond: |
| // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 |
| // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20 |
| // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK3: omp.inner.for.body: |
| // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 |
| // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !20 |
| // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !20 |
| // CHECK3-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 |
| // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !20 |
| // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK3: omp.body.continue: |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK3: omp.inner.for.inc: |
| // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 |
| // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]] |
| // CHECK3: omp.inner.for.end: |
| // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK3: omp.loop.exit: |
| // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK3: .omp.final.then: |
| // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK3: .omp.final.done: |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46 |
| // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6 |
| // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK3: cond.true: |
| // CHECK3-NEXT: br label [[COND_END:%.*]] |
| // CHECK3: cond.false: |
| // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK3-NEXT: br label [[COND_END]] |
| // CHECK3: cond.end: |
| // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK3: omp.inner.for.cond: |
| // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 |
| // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23 |
| // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK3: omp.inner.for.body: |
| // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !23 |
| // CHECK3-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23 |
| // CHECK3-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !23 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK3: omp.inner.for.inc: |
| // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 |
| // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !23 |
| // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] |
| // CHECK3: omp.inner.for.end: |
| // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK3: omp.loop.exit: |
| // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK3: .omp.final.then: |
| // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK3: .omp.final.done: |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7 |
| // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK3-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) |
| // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK3: omp.dispatch.cond: |
| // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK3-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 |
| // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] |
| // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK3: cond.true: |
| // CHECK3-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK3-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK3-NEXT: br label [[COND_END:%.*]] |
| // CHECK3: cond.false: |
| // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: br label [[COND_END]] |
| // CHECK3: cond.end: |
| // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] |
| // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 |
| // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] |
| // CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK3: omp.dispatch.body: |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK3: omp.inner.for.cond: |
| // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 |
| // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26 |
| // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] |
| // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK3: omp.inner.for.body: |
| // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 |
| // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 |
| // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !26 |
| // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !26 |
| // CHECK3-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 |
| // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !26 |
| // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK3: omp.body.continue: |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK3: omp.inner.for.inc: |
| // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 |
| // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 |
| // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] |
| // CHECK3: omp.inner.for.end: |
| // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK3: omp.dispatch.inc: |
| // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] |
| // CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] |
| // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK3: omp.dispatch.end: |
| // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 |
| // CHECK3-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK3: .omp.final.then: |
| // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK3: .omp.final.done: |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52 |
| // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10 |
| // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK3: cond.true: |
| // CHECK3-NEXT: br label [[COND_END:%.*]] |
| // CHECK3: cond.false: |
| // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK3-NEXT: br label [[COND_END]] |
| // CHECK3: cond.end: |
| // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK3: omp.inner.for.cond: |
| // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 |
| // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29 |
| // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK3: omp.inner.for.body: |
| // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29 |
| // CHECK3-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29 |
| // CHECK3-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !29 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK3: omp.inner.for.inc: |
| // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 |
| // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29 |
| // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]] |
| // CHECK3: omp.inner.for.end: |
| // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK3: omp.loop.exit: |
| // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK3: .omp.final.then: |
| // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK3: .omp.final.done: |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11 |
| // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK3-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 |
| // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) |
| // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK3: omp.dispatch.cond: |
| // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK3: omp.dispatch.body: |
| // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK3: omp.inner.for.cond: |
| // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32 |
| // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !32 |
| // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] |
| // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK3: omp.inner.for.body: |
| // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32 |
| // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 |
| // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !32 |
| // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !32 |
| // CHECK3-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 |
| // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !32 |
| // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK3: omp.body.continue: |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK3: omp.inner.for.inc: |
| // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32 |
| // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 |
| // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]] |
| // CHECK3: omp.inner.for.end: |
| // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK3: omp.dispatch.inc: |
| // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK3: omp.dispatch.end: |
| // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK3: .omp.final.then: |
| // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK3: .omp.final.done: |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58 |
| // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14 |
| // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK3: cond.true: |
| // CHECK3-NEXT: br label [[COND_END:%.*]] |
| // CHECK3: cond.false: |
| // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK3-NEXT: br label [[COND_END]] |
| // CHECK3: cond.end: |
| // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK3: omp.inner.for.cond: |
| // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35 |
| // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35 |
| // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK3: omp.inner.for.body: |
| // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !35 |
| // CHECK3-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35 |
| // CHECK3-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !35 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK3: omp.inner.for.inc: |
| // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35 |
| // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !35 |
| // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]] |
| // CHECK3: omp.inner.for.end: |
| // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK3: omp.loop.exit: |
| // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK3: .omp.final.then: |
| // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK3: .omp.final.done: |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15 |
| // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK3-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 |
| // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) |
| // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK3: omp.dispatch.cond: |
| // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK3: omp.dispatch.body: |
| // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK3: omp.inner.for.cond: |
| // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38 |
| // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !38 |
| // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] |
| // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK3: omp.inner.for.body: |
| // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38 |
| // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 |
| // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !38 |
| // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !38 |
| // CHECK3-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 |
| // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !38 |
| // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK3: omp.body.continue: |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK3: omp.inner.for.inc: |
| // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38 |
| // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 |
| // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38 |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]] |
| // CHECK3: omp.inner.for.end: |
| // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK3: omp.dispatch.inc: |
| // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK3: omp.dispatch.end: |
| // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK3: .omp.final.then: |
| // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK3: .omp.final.done: |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg |
| // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_template_structv |
| // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { |
| // CHECK4-NEXT: entry: |
| // CHECK4-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 |
| // CHECK4-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) |
| // CHECK4-NEXT: ret i32 [[CALL]] |
| // |
| // |
| // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv |
| // CHECK4-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { |
| // CHECK4-NEXT: entry: |
| // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK4-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK4-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK4-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK4-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK4-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK4-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK4-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK4-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** |
| // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 |
| // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** |
| // CHECK4-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 |
| // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 |
| // CHECK4-NEXT: store i8* null, i8** [[TMP4]], align 8 |
| // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) |
| // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK4-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK4-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] |
| // CHECK4: omp_offload.failed: |
| // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] |
| // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] |
| // CHECK4: omp_offload.cont: |
| // CHECK4-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** |
| // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 |
| // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** |
| // CHECK4-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 |
| // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 |
| // CHECK4-NEXT: store i8* null, i8** [[TMP13]], align 8 |
| // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 |
| // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK4-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK4-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 |
| // CHECK4-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] |
| // CHECK4: omp_offload.failed7: |
| // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT8]] |
| // CHECK4: omp_offload.cont8: |
| // CHECK4-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** |
| // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 |
| // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** |
| // CHECK4-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 |
| // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 |
| // CHECK4-NEXT: store i8* null, i8** [[TMP22]], align 8 |
| // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 |
| // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK4-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK4-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 |
| // CHECK4-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] |
| // CHECK4: omp_offload.failed14: |
| // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT15]] |
| // CHECK4: omp_offload.cont15: |
| // CHECK4-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** |
| // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8 |
| // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** |
| // CHECK4-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8 |
| // CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0 |
| // CHECK4-NEXT: store i8* null, i8** [[TMP31]], align 8 |
| // CHECK4-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 |
| // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK4-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK4-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 |
| // CHECK4-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] |
| // CHECK4: omp_offload.failed21: |
| // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT22]] |
| // CHECK4: omp_offload.cont22: |
| // CHECK4-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** |
| // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8 |
| // CHECK4-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** |
| // CHECK4-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8 |
| // CHECK4-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0 |
| // CHECK4-NEXT: store i8* null, i8** [[TMP40]], align 8 |
| // CHECK4-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 |
| // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK4-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK4-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 |
| // CHECK4-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] |
| // CHECK4: omp_offload.failed28: |
| // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT29]] |
| // CHECK4: omp_offload.cont29: |
| // CHECK4-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0 |
| // CHECK4-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 |
| // CHECK4-NEXT: ret i32 [[TMP45]] |
| // |
| // |
| // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 |
| // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { |
| // CHECK4-NEXT: entry: |
| // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK4-NEXT: ret void |
| // |
| // |
| // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. |
| // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK4-NEXT: entry: |
| // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK4: cond.true: |
| // CHECK4-NEXT: br label [[COND_END:%.*]] |
| // CHECK4: cond.false: |
| // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK4-NEXT: br label [[COND_END]] |
| // CHECK4: cond.end: |
| // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK4: omp.inner.for.cond: |
| // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 |
| // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !8 |
| // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK4: omp.inner.for.body: |
| // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !8 |
| // CHECK4-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !8 |
| // CHECK4-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !8 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK4: omp.inner.for.inc: |
| // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 |
| // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !8 |
| // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] |
| // CHECK4: omp.inner.for.end: |
| // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK4: omp.loop.exit: |
| // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK4: .omp.final.then: |
| // CHECK4-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK4: .omp.final.done: |
| // CHECK4-NEXT: ret void |
| // |
| // |
| // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 |
| // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK4-NEXT: entry: |
| // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK4-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK4-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK4-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK4-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK4-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK4-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK4-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 |
| // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK4: cond.true: |
| // CHECK4-NEXT: br label [[COND_END:%.*]] |
| // CHECK4: cond.false: |
| // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: br label [[COND_END]] |
| // CHECK4: cond.end: |
| // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK4: omp.inner.for.cond: |
| // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 |
| // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 |
| // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK4: omp.inner.for.body: |
| // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 |
| // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 |
| // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 |
| // CHECK4-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 |
| // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 |
| // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK4: omp.body.continue: |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK4: omp.inner.for.inc: |
| // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 |
| // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] |
| // CHECK4: omp.inner.for.end: |
| // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK4: omp.loop.exit: |
| // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK4-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK4-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK4: .omp.final.then: |
| // CHECK4-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK4: .omp.final.done: |
| // CHECK4-NEXT: ret void |
| // |
| // |
| // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41 |
| // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK4-NEXT: entry: |
| // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK4-NEXT: ret void |
| // |
| // |
| // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2 |
| // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK4-NEXT: entry: |
| // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK4: cond.true: |
| // CHECK4-NEXT: br label [[COND_END:%.*]] |
| // CHECK4: cond.false: |
| // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK4-NEXT: br label [[COND_END]] |
| // CHECK4: cond.end: |
| // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK4: omp.inner.for.cond: |
| // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !17 |
| // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK4: omp.inner.for.body: |
| // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !17 |
| // CHECK4-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !17 |
| // CHECK4-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !17 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK4: omp.inner.for.inc: |
| // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !17 |
| // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] |
| // CHECK4: omp.inner.for.end: |
| // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK4: omp.loop.exit: |
| // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK4: .omp.final.then: |
| // CHECK4-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK4: .omp.final.done: |
| // CHECK4-NEXT: ret void |
| // |
| // |
| // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3 |
| // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK4-NEXT: entry: |
| // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK4-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK4-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK4-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK4-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK4-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK4-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK4-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 |
| // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK4: cond.true: |
| // CHECK4-NEXT: br label [[COND_END:%.*]] |
| // CHECK4: cond.false: |
| // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: br label [[COND_END]] |
| // CHECK4: cond.end: |
| // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK4: omp.inner.for.cond: |
| // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 |
| // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20 |
| // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK4: omp.inner.for.body: |
| // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 |
| // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !20 |
| // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !20 |
| // CHECK4-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 |
| // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !20 |
| // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK4: omp.body.continue: |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK4: omp.inner.for.inc: |
| // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 |
| // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]] |
| // CHECK4: omp.inner.for.end: |
| // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK4: omp.loop.exit: |
| // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK4-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK4-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK4: .omp.final.then: |
| // CHECK4-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK4: .omp.final.done: |
| // CHECK4-NEXT: ret void |
| // |
| // |
| // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46 |
| // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK4-NEXT: entry: |
| // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK4-NEXT: ret void |
| // |
| // |
| // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..6 |
| // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK4-NEXT: entry: |
| // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK4: cond.true: |
| // CHECK4-NEXT: br label [[COND_END:%.*]] |
| // CHECK4: cond.false: |
| // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK4-NEXT: br label [[COND_END]] |
| // CHECK4: cond.end: |
| // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK4: omp.inner.for.cond: |
| // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 |
| // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23 |
| // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK4: omp.inner.for.body: |
| // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !23 |
| // CHECK4-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23 |
| // CHECK4-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !23 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK4: omp.inner.for.inc: |
| // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 |
| // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !23 |
| // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] |
| // CHECK4: omp.inner.for.end: |
| // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK4: omp.loop.exit: |
| // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK4: .omp.final.then: |
| // CHECK4-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK4: .omp.final.done: |
| // CHECK4-NEXT: ret void |
| // |
| // |
| // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..7 |
| // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK4-NEXT: entry: |
| // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK4-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK4-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK4-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK4-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK4-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK4-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK4-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) |
| // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK4: omp.dispatch.cond: |
| // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK4-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 |
| // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] |
| // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK4: cond.true: |
| // CHECK4-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK4-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK4-NEXT: br label [[COND_END:%.*]] |
| // CHECK4: cond.false: |
| // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: br label [[COND_END]] |
| // CHECK4: cond.end: |
| // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] |
| // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 |
| // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] |
| // CHECK4-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK4: omp.dispatch.body: |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK4: omp.inner.for.cond: |
| // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 |
| // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26 |
| // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] |
| // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK4: omp.inner.for.body: |
| // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 |
| // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 |
| // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !26 |
| // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !26 |
| // CHECK4-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 |
| // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !26 |
| // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK4: omp.body.continue: |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK4: omp.inner.for.inc: |
| // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 |
| // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 |
| // CHECK4-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] |
| // CHECK4: omp.inner.for.end: |
| // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK4: omp.dispatch.inc: |
| // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] |
| // CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] |
| // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK4: omp.dispatch.end: |
| // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK4-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 |
| // CHECK4-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK4: .omp.final.then: |
| // CHECK4-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK4: .omp.final.done: |
| // CHECK4-NEXT: ret void |
| // |
| // |
| // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52 |
| // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK4-NEXT: entry: |
| // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK4-NEXT: ret void |
| // |
| // |
| // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..10 |
| // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK4-NEXT: entry: |
| // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK4: cond.true: |
| // CHECK4-NEXT: br label [[COND_END:%.*]] |
| // CHECK4: cond.false: |
| // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK4-NEXT: br label [[COND_END]] |
| // CHECK4: cond.end: |
| // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK4: omp.inner.for.cond: |
| // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 |
| // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29 |
| // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK4: omp.inner.for.body: |
| // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29 |
| // CHECK4-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29 |
| // CHECK4-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !29 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK4: omp.inner.for.inc: |
| // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 |
| // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29 |
| // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]] |
| // CHECK4: omp.inner.for.end: |
| // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK4: omp.loop.exit: |
| // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK4: .omp.final.then: |
| // CHECK4-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK4: .omp.final.done: |
| // CHECK4-NEXT: ret void |
| // |
| // |
| // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..11 |
| // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK4-NEXT: entry: |
| // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK4-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK4-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK4-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK4-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK4-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK4-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK4-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 |
| // CHECK4-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) |
| // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK4: omp.dispatch.cond: |
| // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK4-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK4: omp.dispatch.body: |
| // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK4: omp.inner.for.cond: |
| // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32 |
| // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !32 |
| // CHECK4-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] |
| // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK4: omp.inner.for.body: |
| // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32 |
| // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 |
| // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !32 |
| // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !32 |
| // CHECK4-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 |
| // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !32 |
| // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK4: omp.body.continue: |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK4: omp.inner.for.inc: |
| // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32 |
| // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 |
| // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]] |
| // CHECK4: omp.inner.for.end: |
| // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK4: omp.dispatch.inc: |
| // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK4: omp.dispatch.end: |
| // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK4: .omp.final.then: |
| // CHECK4-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK4: .omp.final.done: |
| // CHECK4-NEXT: ret void |
| // |
| // |
| // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58 |
| // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK4-NEXT: entry: |
| // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK4-NEXT: ret void |
| // |
| // |
| // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..14 |
| // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK4-NEXT: entry: |
| // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK4: cond.true: |
| // CHECK4-NEXT: br label [[COND_END:%.*]] |
| // CHECK4: cond.false: |
| // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK4-NEXT: br label [[COND_END]] |
| // CHECK4: cond.end: |
| // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK4: omp.inner.for.cond: |
| // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35 |
| // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35 |
| // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK4: omp.inner.for.body: |
| // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !35 |
| // CHECK4-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35 |
| // CHECK4-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !35 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK4: omp.inner.for.inc: |
| // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35 |
| // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !35 |
| // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]] |
| // CHECK4: omp.inner.for.end: |
| // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK4: omp.loop.exit: |
| // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK4: .omp.final.then: |
| // CHECK4-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK4: .omp.final.done: |
| // CHECK4-NEXT: ret void |
| // |
| // |
| // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..15 |
| // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK4-NEXT: entry: |
| // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK4-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK4-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK4-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK4-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK4-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK4-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK4-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 |
| // CHECK4-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) |
| // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK4: omp.dispatch.cond: |
| // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK4-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK4: omp.dispatch.body: |
| // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK4: omp.inner.for.cond: |
| // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38 |
| // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !38 |
| // CHECK4-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] |
| // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK4: omp.inner.for.body: |
| // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38 |
| // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 |
| // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !38 |
| // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !38 |
| // CHECK4-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 |
| // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !38 |
| // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK4: omp.body.continue: |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK4: omp.inner.for.inc: |
| // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38 |
| // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 |
| // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38 |
| // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]] |
| // CHECK4: omp.inner.for.end: |
| // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK4: omp.dispatch.inc: |
| // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK4: omp.dispatch.end: |
| // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK4: .omp.final.then: |
| // CHECK4-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK4: .omp.final.done: |
| // CHECK4-NEXT: ret void |
| // |
| // |
| // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg |
| // CHECK4-SAME: () #[[ATTR3:[0-9]+]] { |
| // CHECK4-NEXT: entry: |
| // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) |
| // CHECK4-NEXT: ret void |
| // |
| // |
| // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv |
| // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { |
| // CHECK5-NEXT: entry: |
| // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 |
| // CHECK5-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) |
| // CHECK5-NEXT: ret i32 [[CALL]] |
| // |
| // |
| // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv |
| // CHECK5-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { |
| // CHECK5-NEXT: entry: |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK5-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK5-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK5-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK5-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK5-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK5-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK5-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK5-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** |
| // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 |
| // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** |
| // CHECK5-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 |
| // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 |
| // CHECK5-NEXT: store i8* null, i8** [[TMP4]], align 4 |
| // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) |
| // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK5-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK5-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] |
| // CHECK5: omp_offload.failed: |
| // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] |
| // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]] |
| // CHECK5: omp_offload.cont: |
| // CHECK5-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** |
| // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 |
| // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** |
| // CHECK5-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 |
| // CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 |
| // CHECK5-NEXT: store i8* null, i8** [[TMP13]], align 4 |
| // CHECK5-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 |
| // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK5-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK5-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 |
| // CHECK5-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] |
| // CHECK5: omp_offload.failed7: |
| // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT8]] |
| // CHECK5: omp_offload.cont8: |
| // CHECK5-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** |
| // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 |
| // CHECK5-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** |
| // CHECK5-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 |
| // CHECK5-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 |
| // CHECK5-NEXT: store i8* null, i8** [[TMP22]], align 4 |
| // CHECK5-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 |
| // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK5-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK5-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 |
| // CHECK5-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] |
| // CHECK5: omp_offload.failed14: |
| // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT15]] |
| // CHECK5: omp_offload.cont15: |
| // CHECK5-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** |
| // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4 |
| // CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** |
| // CHECK5-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4 |
| // CHECK5-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0 |
| // CHECK5-NEXT: store i8* null, i8** [[TMP31]], align 4 |
| // CHECK5-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 |
| // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK5-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK5-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 |
| // CHECK5-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] |
| // CHECK5: omp_offload.failed21: |
| // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT22]] |
| // CHECK5: omp_offload.cont22: |
| // CHECK5-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** |
| // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4 |
| // CHECK5-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** |
| // CHECK5-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4 |
| // CHECK5-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0 |
| // CHECK5-NEXT: store i8* null, i8** [[TMP40]], align 4 |
| // CHECK5-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 |
| // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK5-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK5-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 |
| // CHECK5-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] |
| // CHECK5: omp_offload.failed28: |
| // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT29]] |
| // CHECK5: omp_offload.cont29: |
| // CHECK5-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 |
| // CHECK5-NEXT: ret i32 [[TMP45]] |
| // |
| // |
| // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 |
| // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { |
| // CHECK5-NEXT: entry: |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK5-NEXT: ret void |
| // |
| // |
| // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined. |
| // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK5-NEXT: entry: |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK5: cond.true: |
| // CHECK5-NEXT: br label [[COND_END:%.*]] |
| // CHECK5: cond.false: |
| // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK5-NEXT: br label [[COND_END]] |
| // CHECK5: cond.end: |
| // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK5: omp.inner.for.cond: |
| // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 |
| // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9 |
| // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK5: omp.inner.for.body: |
| // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !9 |
| // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9 |
| // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !9 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK5: omp.inner.for.inc: |
| // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 |
| // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !9 |
| // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] |
| // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] |
| // CHECK5: omp.inner.for.end: |
| // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK5: omp.loop.exit: |
| // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK5-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 |
| // CHECK5-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK5: .omp.final.then: |
| // CHECK5-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK5: .omp.final.done: |
| // CHECK5-NEXT: ret void |
| // |
| // |
| // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1 |
| // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK5-NEXT: entry: |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK5-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 |
| // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK5: cond.true: |
| // CHECK5-NEXT: br label [[COND_END:%.*]] |
| // CHECK5: cond.false: |
| // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: br label [[COND_END]] |
| // CHECK5: cond.end: |
| // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK5: omp.inner.for.cond: |
| // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 |
| // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK5: omp.inner.for.body: |
| // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 |
| // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 |
| // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] |
| // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 |
| // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK5: omp.body.continue: |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK5: omp.inner.for.inc: |
| // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] |
| // CHECK5: omp.inner.for.end: |
| // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK5: omp.loop.exit: |
| // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK5-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK5-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK5: .omp.final.then: |
| // CHECK5-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK5: .omp.final.done: |
| // CHECK5-NEXT: ret void |
| // |
| // |
| // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41 |
| // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK5-NEXT: entry: |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK5-NEXT: ret void |
| // |
| // |
| // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2 |
| // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK5-NEXT: entry: |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK5: cond.true: |
| // CHECK5-NEXT: br label [[COND_END:%.*]] |
| // CHECK5: cond.false: |
| // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK5-NEXT: br label [[COND_END]] |
| // CHECK5: cond.end: |
| // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK5: omp.inner.for.cond: |
| // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 |
| // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18 |
| // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK5: omp.inner.for.body: |
| // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !18 |
| // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18 |
| // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !18 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK5: omp.inner.for.inc: |
| // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 |
| // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !18 |
| // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] |
| // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] |
| // CHECK5: omp.inner.for.end: |
| // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK5: omp.loop.exit: |
| // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK5-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 |
| // CHECK5-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK5: .omp.final.then: |
| // CHECK5-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK5: .omp.final.done: |
| // CHECK5-NEXT: ret void |
| // |
| // |
| // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3 |
| // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK5-NEXT: entry: |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK5-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 |
| // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK5: cond.true: |
| // CHECK5-NEXT: br label [[COND_END:%.*]] |
| // CHECK5: cond.false: |
| // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: br label [[COND_END]] |
| // CHECK5: cond.end: |
| // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK5: omp.inner.for.cond: |
| // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 |
| // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21 |
| // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK5: omp.inner.for.body: |
| // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 |
| // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21 |
| // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21 |
| // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] |
| // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21 |
| // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK5: omp.body.continue: |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK5: omp.inner.for.inc: |
| // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 |
| // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] |
| // CHECK5: omp.inner.for.end: |
| // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK5: omp.loop.exit: |
| // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK5-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK5-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK5: .omp.final.then: |
| // CHECK5-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK5: .omp.final.done: |
| // CHECK5-NEXT: ret void |
| // |
| // |
| // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46 |
| // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK5-NEXT: entry: |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK5-NEXT: ret void |
| // |
| // |
| // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6 |
| // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK5-NEXT: entry: |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK5: cond.true: |
| // CHECK5-NEXT: br label [[COND_END:%.*]] |
| // CHECK5: cond.false: |
| // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK5-NEXT: br label [[COND_END]] |
| // CHECK5: cond.end: |
| // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK5: omp.inner.for.cond: |
| // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 |
| // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24 |
| // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK5: omp.inner.for.body: |
| // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !24 |
| // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24 |
| // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !24 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK5: omp.inner.for.inc: |
| // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 |
| // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !24 |
| // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] |
| // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] |
| // CHECK5: omp.inner.for.end: |
| // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK5: omp.loop.exit: |
| // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK5-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 |
| // CHECK5-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK5: .omp.final.then: |
| // CHECK5-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK5: .omp.final.done: |
| // CHECK5-NEXT: ret void |
| // |
| // |
| // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7 |
| // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK5-NEXT: entry: |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK5-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) |
| // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK5: omp.dispatch.cond: |
| // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] |
| // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK5: cond.true: |
| // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK5-NEXT: br label [[COND_END:%.*]] |
| // CHECK5: cond.false: |
| // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: br label [[COND_END]] |
| // CHECK5: cond.end: |
| // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] |
| // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 |
| // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] |
| // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK5: omp.dispatch.body: |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK5: omp.inner.for.cond: |
| // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 |
| // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27 |
| // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] |
| // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK5: omp.inner.for.body: |
| // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 |
| // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 |
| // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27 |
| // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !27 |
| // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]] |
| // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !27 |
| // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK5: omp.body.continue: |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK5: omp.inner.for.inc: |
| // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 |
| // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1 |
| // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] |
| // CHECK5: omp.inner.for.end: |
| // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK5: omp.dispatch.inc: |
| // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK5-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] |
| // CHECK5-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK5-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] |
| // CHECK5-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK5: omp.dispatch.end: |
| // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK5-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 |
| // CHECK5-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK5: .omp.final.then: |
| // CHECK5-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK5: .omp.final.done: |
| // CHECK5-NEXT: ret void |
| // |
| // |
| // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52 |
| // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK5-NEXT: entry: |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK5-NEXT: ret void |
| // |
| // |
| // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10 |
| // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK5-NEXT: entry: |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK5: cond.true: |
| // CHECK5-NEXT: br label [[COND_END:%.*]] |
| // CHECK5: cond.false: |
| // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK5-NEXT: br label [[COND_END]] |
| // CHECK5: cond.end: |
| // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK5: omp.inner.for.cond: |
| // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30 |
| // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30 |
| // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK5: omp.inner.for.body: |
| // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !30 |
| // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30 |
| // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !30 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK5: omp.inner.for.inc: |
| // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30 |
| // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !30 |
| // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] |
| // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]] |
| // CHECK5: omp.inner.for.end: |
| // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK5: omp.loop.exit: |
| // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK5-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 |
| // CHECK5-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK5: .omp.final.then: |
| // CHECK5-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK5: .omp.final.done: |
| // CHECK5-NEXT: ret void |
| // |
| // |
| // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11 |
| // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK5-NEXT: entry: |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK5-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 |
| // CHECK5-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) |
| // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK5: omp.dispatch.cond: |
| // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK5: omp.dispatch.body: |
| // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK5: omp.inner.for.cond: |
| // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33 |
| // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !33 |
| // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] |
| // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK5: omp.inner.for.body: |
| // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33 |
| // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 |
| // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !33 |
| // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !33 |
| // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] |
| // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !33 |
| // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK5: omp.body.continue: |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK5: omp.inner.for.inc: |
| // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33 |
| // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 |
| // CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]] |
| // CHECK5: omp.inner.for.end: |
| // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK5: omp.dispatch.inc: |
| // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK5: omp.dispatch.end: |
| // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK5-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK5: .omp.final.then: |
| // CHECK5-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK5: .omp.final.done: |
| // CHECK5-NEXT: ret void |
| // |
| // |
| // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58 |
| // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK5-NEXT: entry: |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK5-NEXT: ret void |
| // |
| // |
| // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..14 |
| // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK5-NEXT: entry: |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK5: cond.true: |
| // CHECK5-NEXT: br label [[COND_END:%.*]] |
| // CHECK5: cond.false: |
| // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK5-NEXT: br label [[COND_END]] |
| // CHECK5: cond.end: |
| // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK5: omp.inner.for.cond: |
| // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36 |
| // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36 |
| // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK5: omp.inner.for.body: |
| // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !36 |
| // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36 |
| // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !36 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK5: omp.inner.for.inc: |
| // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36 |
| // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !36 |
| // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] |
| // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]] |
| // CHECK5: omp.inner.for.end: |
| // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK5: omp.loop.exit: |
| // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK5-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 |
| // CHECK5-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK5: .omp.final.then: |
| // CHECK5-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK5: .omp.final.done: |
| // CHECK5-NEXT: ret void |
| // |
| // |
| // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..15 |
| // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK5-NEXT: entry: |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK5-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 |
| // CHECK5-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) |
| // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK5: omp.dispatch.cond: |
| // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK5: omp.dispatch.body: |
| // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK5: omp.inner.for.cond: |
| // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39 |
| // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !39 |
| // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] |
| // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK5: omp.inner.for.body: |
| // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39 |
| // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 |
| // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !39 |
| // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !39 |
| // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] |
| // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !39 |
| // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK5: omp.body.continue: |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK5: omp.inner.for.inc: |
| // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39 |
| // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 |
| // CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39 |
| // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]] |
| // CHECK5: omp.inner.for.end: |
| // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK5: omp.dispatch.inc: |
| // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK5: omp.dispatch.end: |
| // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK5-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK5: .omp.final.then: |
| // CHECK5-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK5: .omp.final.done: |
| // CHECK5-NEXT: ret void |
| // |
| // |
| // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg |
| // CHECK5-SAME: () #[[ATTR3:[0-9]+]] { |
| // CHECK5-NEXT: entry: |
| // CHECK5-NEXT: call void @__tgt_register_requires(i64 1) |
| // CHECK5-NEXT: ret void |
| // |
| // |
| // CHECK6-LABEL: define {{[^@]+}}@_Z21teams_template_structv |
| // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { |
| // CHECK6-NEXT: entry: |
| // CHECK6-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 |
| // CHECK6-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) |
| // CHECK6-NEXT: ret i32 [[CALL]] |
| // |
| // |
| // CHECK6-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv |
| // CHECK6-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { |
| // CHECK6-NEXT: entry: |
| // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK6-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK6-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK6-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK6-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK6-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK6-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK6-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK6-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK6-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** |
| // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 |
| // CHECK6-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** |
| // CHECK6-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 |
| // CHECK6-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 |
| // CHECK6-NEXT: store i8* null, i8** [[TMP4]], align 4 |
| // CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) |
| // CHECK6-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK6-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK6-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] |
| // CHECK6: omp_offload.failed: |
| // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] |
| // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT]] |
| // CHECK6: omp_offload.cont: |
| // CHECK6-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** |
| // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 |
| // CHECK6-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** |
| // CHECK6-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 |
| // CHECK6-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 |
| // CHECK6-NEXT: store i8* null, i8** [[TMP13]], align 4 |
| // CHECK6-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 |
| // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK6-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK6-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 |
| // CHECK6-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] |
| // CHECK6: omp_offload.failed7: |
| // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT8]] |
| // CHECK6: omp_offload.cont8: |
| // CHECK6-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** |
| // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 |
| // CHECK6-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** |
| // CHECK6-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 |
| // CHECK6-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 |
| // CHECK6-NEXT: store i8* null, i8** [[TMP22]], align 4 |
| // CHECK6-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 |
| // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK6-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK6-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 |
| // CHECK6-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] |
| // CHECK6: omp_offload.failed14: |
| // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT15]] |
| // CHECK6: omp_offload.cont15: |
| // CHECK6-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** |
| // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4 |
| // CHECK6-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** |
| // CHECK6-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4 |
| // CHECK6-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0 |
| // CHECK6-NEXT: store i8* null, i8** [[TMP31]], align 4 |
| // CHECK6-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 |
| // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK6-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK6-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 |
| // CHECK6-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] |
| // CHECK6: omp_offload.failed21: |
| // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT22]] |
| // CHECK6: omp_offload.cont22: |
| // CHECK6-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** |
| // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4 |
| // CHECK6-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** |
| // CHECK6-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4 |
| // CHECK6-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0 |
| // CHECK6-NEXT: store i8* null, i8** [[TMP40]], align 4 |
| // CHECK6-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 |
| // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK6-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK6-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 |
| // CHECK6-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] |
| // CHECK6: omp_offload.failed28: |
| // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT29]] |
| // CHECK6: omp_offload.cont29: |
| // CHECK6-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 |
| // CHECK6-NEXT: ret i32 [[TMP45]] |
| // |
| // |
| // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 |
| // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { |
| // CHECK6-NEXT: entry: |
| // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK6-NEXT: ret void |
| // |
| // |
| // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined. |
| // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK6-NEXT: entry: |
| // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK6: cond.true: |
| // CHECK6-NEXT: br label [[COND_END:%.*]] |
| // CHECK6: cond.false: |
| // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK6-NEXT: br label [[COND_END]] |
| // CHECK6: cond.end: |
| // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK6: omp.inner.for.cond: |
| // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 |
| // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9 |
| // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK6: omp.inner.for.body: |
| // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !9 |
| // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9 |
| // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !9 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK6: omp.inner.for.inc: |
| // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 |
| // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !9 |
| // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] |
| // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] |
| // CHECK6: omp.inner.for.end: |
| // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK6: omp.loop.exit: |
| // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK6-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 |
| // CHECK6-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK6: .omp.final.then: |
| // CHECK6-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK6: .omp.final.done: |
| // CHECK6-NEXT: ret void |
| // |
| // |
| // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..1 |
| // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK6-NEXT: entry: |
| // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK6-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK6-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 |
| // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK6: cond.true: |
| // CHECK6-NEXT: br label [[COND_END:%.*]] |
| // CHECK6: cond.false: |
| // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: br label [[COND_END]] |
| // CHECK6: cond.end: |
| // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK6-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK6: omp.inner.for.cond: |
| // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 |
| // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK6: omp.inner.for.body: |
| // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 |
| // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 |
| // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] |
| // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 |
| // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK6: omp.body.continue: |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK6: omp.inner.for.inc: |
| // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK6-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] |
| // CHECK6: omp.inner.for.end: |
| // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK6: omp.loop.exit: |
| // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK6-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK6-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK6: .omp.final.then: |
| // CHECK6-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK6: .omp.final.done: |
| // CHECK6-NEXT: ret void |
| // |
| // |
| // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41 |
| // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK6-NEXT: entry: |
| // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK6-NEXT: ret void |
| // |
| // |
| // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..2 |
| // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK6-NEXT: entry: |
| // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK6: cond.true: |
| // CHECK6-NEXT: br label [[COND_END:%.*]] |
| // CHECK6: cond.false: |
| // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK6-NEXT: br label [[COND_END]] |
| // CHECK6: cond.end: |
| // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK6: omp.inner.for.cond: |
| // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 |
| // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18 |
| // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK6: omp.inner.for.body: |
| // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !18 |
| // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18 |
| // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !18 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK6: omp.inner.for.inc: |
| // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 |
| // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !18 |
| // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] |
| // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] |
| // CHECK6: omp.inner.for.end: |
| // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK6: omp.loop.exit: |
| // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK6-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 |
| // CHECK6-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK6: .omp.final.then: |
| // CHECK6-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK6: .omp.final.done: |
| // CHECK6-NEXT: ret void |
| // |
| // |
| // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..3 |
| // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK6-NEXT: entry: |
| // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK6-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK6-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 |
| // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK6: cond.true: |
| // CHECK6-NEXT: br label [[COND_END:%.*]] |
| // CHECK6: cond.false: |
| // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: br label [[COND_END]] |
| // CHECK6: cond.end: |
| // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK6-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK6: omp.inner.for.cond: |
| // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 |
| // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21 |
| // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK6: omp.inner.for.body: |
| // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 |
| // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21 |
| // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21 |
| // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] |
| // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21 |
| // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK6: omp.body.continue: |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK6: omp.inner.for.inc: |
| // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 |
| // CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK6-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] |
| // CHECK6: omp.inner.for.end: |
| // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK6: omp.loop.exit: |
| // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK6-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK6-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK6: .omp.final.then: |
| // CHECK6-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK6: .omp.final.done: |
| // CHECK6-NEXT: ret void |
| // |
| // |
| // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46 |
| // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK6-NEXT: entry: |
| // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK6-NEXT: ret void |
| // |
| // |
| // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..6 |
| // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK6-NEXT: entry: |
| // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK6: cond.true: |
| // CHECK6-NEXT: br label [[COND_END:%.*]] |
| // CHECK6: cond.false: |
| // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK6-NEXT: br label [[COND_END]] |
| // CHECK6: cond.end: |
| // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK6: omp.inner.for.cond: |
| // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 |
| // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24 |
| // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK6: omp.inner.for.body: |
| // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !24 |
| // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24 |
| // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !24 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK6: omp.inner.for.inc: |
| // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 |
| // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !24 |
| // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] |
| // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] |
| // CHECK6: omp.inner.for.end: |
| // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK6: omp.loop.exit: |
| // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK6-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 |
| // CHECK6-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK6: .omp.final.then: |
| // CHECK6-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK6: .omp.final.done: |
| // CHECK6-NEXT: ret void |
| // |
| // |
| // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..7 |
| // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK6-NEXT: entry: |
| // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK6-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK6-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) |
| // CHECK6-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK6: omp.dispatch.cond: |
| // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] |
| // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK6: cond.true: |
| // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK6-NEXT: br label [[COND_END:%.*]] |
| // CHECK6: cond.false: |
| // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: br label [[COND_END]] |
| // CHECK6: cond.end: |
| // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] |
| // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK6-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 |
| // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] |
| // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK6: omp.dispatch.body: |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK6: omp.inner.for.cond: |
| // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 |
| // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27 |
| // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] |
| // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK6: omp.inner.for.body: |
| // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 |
| // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 |
| // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27 |
| // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !27 |
| // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]] |
| // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !27 |
| // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK6: omp.body.continue: |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK6: omp.inner.for.inc: |
| // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 |
| // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1 |
| // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] |
| // CHECK6: omp.inner.for.end: |
| // CHECK6-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK6: omp.dispatch.inc: |
| // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK6-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] |
| // CHECK6-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK6-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] |
| // CHECK6-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK6: omp.dispatch.end: |
| // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK6-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 |
| // CHECK6-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK6: .omp.final.then: |
| // CHECK6-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK6: .omp.final.done: |
| // CHECK6-NEXT: ret void |
| // |
| // |
| // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52 |
| // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK6-NEXT: entry: |
| // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK6-NEXT: ret void |
| // |
| // |
| // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..10 |
| // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK6-NEXT: entry: |
| // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK6: cond.true: |
| // CHECK6-NEXT: br label [[COND_END:%.*]] |
| // CHECK6: cond.false: |
| // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK6-NEXT: br label [[COND_END]] |
| // CHECK6: cond.end: |
| // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK6: omp.inner.for.cond: |
| // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30 |
| // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30 |
| // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK6: omp.inner.for.body: |
| // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !30 |
| // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30 |
| // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !30 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK6: omp.inner.for.inc: |
| // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30 |
| // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !30 |
| // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] |
| // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]] |
| // CHECK6: omp.inner.for.end: |
| // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK6: omp.loop.exit: |
| // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK6-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 |
| // CHECK6-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK6: .omp.final.then: |
| // CHECK6-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK6: .omp.final.done: |
| // CHECK6-NEXT: ret void |
| // |
| // |
| // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..11 |
| // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK6-NEXT: entry: |
| // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK6-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 |
| // CHECK6-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) |
| // CHECK6-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK6: omp.dispatch.cond: |
| // CHECK6-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK6-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK6: omp.dispatch.body: |
| // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK6-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK6: omp.inner.for.cond: |
| // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33 |
| // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !33 |
| // CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] |
| // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK6: omp.inner.for.body: |
| // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33 |
| // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 |
| // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !33 |
| // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !33 |
| // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] |
| // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !33 |
| // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK6: omp.body.continue: |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK6: omp.inner.for.inc: |
| // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33 |
| // CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 |
| // CHECK6-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]] |
| // CHECK6: omp.inner.for.end: |
| // CHECK6-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK6: omp.dispatch.inc: |
| // CHECK6-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK6: omp.dispatch.end: |
| // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK6-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK6-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK6: .omp.final.then: |
| // CHECK6-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK6: .omp.final.done: |
| // CHECK6-NEXT: ret void |
| // |
| // |
| // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58 |
| // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK6-NEXT: entry: |
| // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK6-NEXT: ret void |
| // |
| // |
| // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..14 |
| // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK6-NEXT: entry: |
| // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK6: cond.true: |
| // CHECK6-NEXT: br label [[COND_END:%.*]] |
| // CHECK6: cond.false: |
| // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK6-NEXT: br label [[COND_END]] |
| // CHECK6: cond.end: |
| // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK6: omp.inner.for.cond: |
| // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36 |
| // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36 |
| // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK6: omp.inner.for.body: |
| // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !36 |
| // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36 |
| // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !36 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK6: omp.inner.for.inc: |
| // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36 |
| // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !36 |
| // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] |
| // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]] |
| // CHECK6: omp.inner.for.end: |
| // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK6: omp.loop.exit: |
| // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK6-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 |
| // CHECK6-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK6: .omp.final.then: |
| // CHECK6-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK6: .omp.final.done: |
| // CHECK6-NEXT: ret void |
| // |
| // |
| // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..15 |
| // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK6-NEXT: entry: |
| // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK6-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK6-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 |
| // CHECK6-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) |
| // CHECK6-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK6: omp.dispatch.cond: |
| // CHECK6-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK6-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK6: omp.dispatch.body: |
| // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK6-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK6: omp.inner.for.cond: |
| // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39 |
| // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !39 |
| // CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] |
| // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK6: omp.inner.for.body: |
| // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39 |
| // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 |
| // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !39 |
| // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !39 |
| // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] |
| // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !39 |
| // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK6: omp.body.continue: |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK6: omp.inner.for.inc: |
| // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39 |
| // CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 |
| // CHECK6-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39 |
| // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]] |
| // CHECK6: omp.inner.for.end: |
| // CHECK6-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK6: omp.dispatch.inc: |
| // CHECK6-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK6: omp.dispatch.end: |
| // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK6-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK6-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK6: .omp.final.then: |
| // CHECK6-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK6: .omp.final.done: |
| // CHECK6-NEXT: ret void |
| // |
| // |
| // CHECK6-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg |
| // CHECK6-SAME: () #[[ATTR3:[0-9]+]] { |
| // CHECK6-NEXT: entry: |
| // CHECK6-NEXT: call void @__tgt_register_requires(i64 1) |
| // CHECK6-NEXT: ret void |
| // |
| // |
| // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv |
| // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { |
| // CHECK7-NEXT: entry: |
| // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 |
| // CHECK7-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) |
| // CHECK7-NEXT: ret i32 [[CALL]] |
| // |
| // |
| // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv |
| // CHECK7-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { |
| // CHECK7-NEXT: entry: |
| // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK7-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK7-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK7-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK7-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK7-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK7-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK7-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK7-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK7-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** |
| // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 |
| // CHECK7-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** |
| // CHECK7-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 |
| // CHECK7-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 |
| // CHECK7-NEXT: store i8* null, i8** [[TMP4]], align 4 |
| // CHECK7-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) |
| // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK7-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK7-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] |
| // CHECK7: omp_offload.failed: |
| // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] |
| // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT]] |
| // CHECK7: omp_offload.cont: |
| // CHECK7-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** |
| // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 |
| // CHECK7-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** |
| // CHECK7-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 |
| // CHECK7-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 |
| // CHECK7-NEXT: store i8* null, i8** [[TMP13]], align 4 |
| // CHECK7-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 |
| // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK7-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK7-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 |
| // CHECK7-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] |
| // CHECK7: omp_offload.failed7: |
| // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT8]] |
| // CHECK7: omp_offload.cont8: |
| // CHECK7-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** |
| // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 |
| // CHECK7-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** |
| // CHECK7-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 |
| // CHECK7-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 |
| // CHECK7-NEXT: store i8* null, i8** [[TMP22]], align 4 |
| // CHECK7-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 |
| // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK7-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK7-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 |
| // CHECK7-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] |
| // CHECK7: omp_offload.failed14: |
| // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT15]] |
| // CHECK7: omp_offload.cont15: |
| // CHECK7-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** |
| // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4 |
| // CHECK7-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** |
| // CHECK7-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4 |
| // CHECK7-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0 |
| // CHECK7-NEXT: store i8* null, i8** [[TMP31]], align 4 |
| // CHECK7-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 |
| // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK7-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK7-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 |
| // CHECK7-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] |
| // CHECK7: omp_offload.failed21: |
| // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT22]] |
| // CHECK7: omp_offload.cont22: |
| // CHECK7-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** |
| // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4 |
| // CHECK7-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** |
| // CHECK7-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4 |
| // CHECK7-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0 |
| // CHECK7-NEXT: store i8* null, i8** [[TMP40]], align 4 |
| // CHECK7-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 |
| // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK7-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK7-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 |
| // CHECK7-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] |
| // CHECK7: omp_offload.failed28: |
| // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT29]] |
| // CHECK7: omp_offload.cont29: |
| // CHECK7-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 |
| // CHECK7-NEXT: ret i32 [[TMP45]] |
| // |
| // |
| // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 |
| // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { |
| // CHECK7-NEXT: entry: |
| // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK7-NEXT: ret void |
| // |
| // |
| // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined. |
| // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK7-NEXT: entry: |
| // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK7: cond.true: |
| // CHECK7-NEXT: br label [[COND_END:%.*]] |
| // CHECK7: cond.false: |
| // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK7-NEXT: br label [[COND_END]] |
| // CHECK7: cond.end: |
| // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK7: omp.inner.for.cond: |
| // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 |
| // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9 |
| // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK7: omp.inner.for.body: |
| // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !9 |
| // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9 |
| // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !9 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK7: omp.inner.for.inc: |
| // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 |
| // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !9 |
| // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] |
| // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] |
| // CHECK7: omp.inner.for.end: |
| // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK7: omp.loop.exit: |
| // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK7-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 |
| // CHECK7-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK7: .omp.final.then: |
| // CHECK7-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK7: .omp.final.done: |
| // CHECK7-NEXT: ret void |
| // |
| // |
| // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..1 |
| // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK7-NEXT: entry: |
| // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 |
| // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK7: cond.true: |
| // CHECK7-NEXT: br label [[COND_END:%.*]] |
| // CHECK7: cond.false: |
| // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: br label [[COND_END]] |
| // CHECK7: cond.end: |
| // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK7-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK7: omp.inner.for.cond: |
| // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 |
| // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK7: omp.inner.for.body: |
| // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 |
| // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 |
| // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] |
| // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 |
| // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK7: omp.body.continue: |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK7: omp.inner.for.inc: |
| // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] |
| // CHECK7: omp.inner.for.end: |
| // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK7: omp.loop.exit: |
| // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK7-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK7-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK7: .omp.final.then: |
| // CHECK7-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK7: .omp.final.done: |
| // CHECK7-NEXT: ret void |
| // |
| // |
| // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41 |
| // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK7-NEXT: entry: |
| // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK7-NEXT: ret void |
| // |
| // |
| // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..2 |
| // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK7-NEXT: entry: |
| // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK7: cond.true: |
| // CHECK7-NEXT: br label [[COND_END:%.*]] |
| // CHECK7: cond.false: |
| // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK7-NEXT: br label [[COND_END]] |
| // CHECK7: cond.end: |
| // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK7: omp.inner.for.cond: |
| // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 |
| // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18 |
| // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK7: omp.inner.for.body: |
| // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !18 |
| // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18 |
| // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !18 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK7: omp.inner.for.inc: |
| // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 |
| // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !18 |
| // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] |
| // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] |
| // CHECK7: omp.inner.for.end: |
| // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK7: omp.loop.exit: |
| // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK7-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 |
| // CHECK7-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK7: .omp.final.then: |
| // CHECK7-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK7: .omp.final.done: |
| // CHECK7-NEXT: ret void |
| // |
| // |
| // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..3 |
| // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK7-NEXT: entry: |
| // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 |
| // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK7: cond.true: |
| // CHECK7-NEXT: br label [[COND_END:%.*]] |
| // CHECK7: cond.false: |
| // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: br label [[COND_END]] |
| // CHECK7: cond.end: |
| // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK7-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK7: omp.inner.for.cond: |
| // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 |
| // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21 |
| // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK7: omp.inner.for.body: |
| // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 |
| // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21 |
| // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21 |
| // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] |
| // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21 |
| // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK7: omp.body.continue: |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK7: omp.inner.for.inc: |
| // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 |
| // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] |
| // CHECK7: omp.inner.for.end: |
| // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK7: omp.loop.exit: |
| // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK7-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK7-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK7: .omp.final.then: |
| // CHECK7-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK7: .omp.final.done: |
| // CHECK7-NEXT: ret void |
| // |
| // |
| // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46 |
| // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK7-NEXT: entry: |
| // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK7-NEXT: ret void |
| // |
| // |
| // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..6 |
| // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK7-NEXT: entry: |
| // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK7: cond.true: |
| // CHECK7-NEXT: br label [[COND_END:%.*]] |
| // CHECK7: cond.false: |
| // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK7-NEXT: br label [[COND_END]] |
| // CHECK7: cond.end: |
| // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK7: omp.inner.for.cond: |
| // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 |
| // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24 |
| // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK7: omp.inner.for.body: |
| // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !24 |
| // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24 |
| // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !24 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK7: omp.inner.for.inc: |
| // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 |
| // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !24 |
| // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] |
| // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] |
| // CHECK7: omp.inner.for.end: |
| // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK7: omp.loop.exit: |
| // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK7-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 |
| // CHECK7-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK7: .omp.final.then: |
| // CHECK7-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK7: .omp.final.done: |
| // CHECK7-NEXT: ret void |
| // |
| // |
| // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..7 |
| // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK7-NEXT: entry: |
| // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) |
| // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK7: omp.dispatch.cond: |
| // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] |
| // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK7: cond.true: |
| // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK7-NEXT: br label [[COND_END:%.*]] |
| // CHECK7: cond.false: |
| // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: br label [[COND_END]] |
| // CHECK7: cond.end: |
| // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] |
| // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK7-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 |
| // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] |
| // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK7: omp.dispatch.body: |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK7: omp.inner.for.cond: |
| // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 |
| // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27 |
| // CHECK7-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] |
| // CHECK7-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK7: omp.inner.for.body: |
| // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 |
| // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 |
| // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27 |
| // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !27 |
| // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]] |
| // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !27 |
| // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK7: omp.body.continue: |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK7: omp.inner.for.inc: |
| // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 |
| // CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1 |
| // CHECK7-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] |
| // CHECK7: omp.inner.for.end: |
| // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK7: omp.dispatch.inc: |
| // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK7-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] |
| // CHECK7-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK7-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] |
| // CHECK7-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK7: omp.dispatch.end: |
| // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK7-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 |
| // CHECK7-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK7: .omp.final.then: |
| // CHECK7-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK7: .omp.final.done: |
| // CHECK7-NEXT: ret void |
| // |
| // |
| // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52 |
| // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK7-NEXT: entry: |
| // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK7-NEXT: ret void |
| // |
| // |
| // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..10 |
| // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK7-NEXT: entry: |
| // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK7: cond.true: |
| // CHECK7-NEXT: br label [[COND_END:%.*]] |
| // CHECK7: cond.false: |
| // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK7-NEXT: br label [[COND_END]] |
| // CHECK7: cond.end: |
| // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK7: omp.inner.for.cond: |
| // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30 |
| // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30 |
| // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK7: omp.inner.for.body: |
| // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !30 |
| // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30 |
| // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !30 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK7: omp.inner.for.inc: |
| // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30 |
| // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !30 |
| // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] |
| // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]] |
| // CHECK7: omp.inner.for.end: |
| // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK7: omp.loop.exit: |
| // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK7-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 |
| // CHECK7-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK7: .omp.final.then: |
| // CHECK7-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK7: .omp.final.done: |
| // CHECK7-NEXT: ret void |
| // |
| // |
| // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..11 |
| // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK7-NEXT: entry: |
| // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 |
| // CHECK7-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) |
| // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK7: omp.dispatch.cond: |
| // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK7: omp.dispatch.body: |
| // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK7: omp.inner.for.cond: |
| // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33 |
| // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !33 |
| // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] |
| // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK7: omp.inner.for.body: |
| // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33 |
| // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 |
| // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !33 |
| // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !33 |
| // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] |
| // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !33 |
| // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK7: omp.body.continue: |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK7: omp.inner.for.inc: |
| // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33 |
| // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 |
| // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]] |
| // CHECK7: omp.inner.for.end: |
| // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK7: omp.dispatch.inc: |
| // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK7: omp.dispatch.end: |
| // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK7-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK7-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK7: .omp.final.then: |
| // CHECK7-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK7: .omp.final.done: |
| // CHECK7-NEXT: ret void |
| // |
| // |
| // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58 |
| // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK7-NEXT: entry: |
| // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK7-NEXT: ret void |
| // |
| // |
| // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..14 |
| // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK7-NEXT: entry: |
| // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK7: cond.true: |
| // CHECK7-NEXT: br label [[COND_END:%.*]] |
| // CHECK7: cond.false: |
| // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK7-NEXT: br label [[COND_END]] |
| // CHECK7: cond.end: |
| // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK7: omp.inner.for.cond: |
| // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36 |
| // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36 |
| // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK7: omp.inner.for.body: |
| // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !36 |
| // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36 |
| // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !36 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK7: omp.inner.for.inc: |
| // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36 |
| // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !36 |
| // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] |
| // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]] |
| // CHECK7: omp.inner.for.end: |
| // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK7: omp.loop.exit: |
| // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK7-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 |
| // CHECK7-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK7: .omp.final.then: |
| // CHECK7-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK7: .omp.final.done: |
| // CHECK7-NEXT: ret void |
| // |
| // |
| // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..15 |
| // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK7-NEXT: entry: |
| // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK7-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 |
| // CHECK7-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) |
| // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK7: omp.dispatch.cond: |
| // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK7: omp.dispatch.body: |
| // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK7: omp.inner.for.cond: |
| // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39 |
| // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !39 |
| // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] |
| // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK7: omp.inner.for.body: |
| // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39 |
| // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 |
| // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !39 |
| // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !39 |
| // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] |
| // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !39 |
| // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK7: omp.body.continue: |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK7: omp.inner.for.inc: |
| // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39 |
| // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 |
| // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39 |
| // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]] |
| // CHECK7: omp.inner.for.end: |
| // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK7: omp.dispatch.inc: |
| // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK7: omp.dispatch.end: |
| // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK7-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK7-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK7: .omp.final.then: |
| // CHECK7-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK7: .omp.final.done: |
| // CHECK7-NEXT: ret void |
| // |
| // |
| // CHECK7-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg |
| // CHECK7-SAME: () #[[ATTR3:[0-9]+]] { |
| // CHECK7-NEXT: entry: |
| // CHECK7-NEXT: call void @__tgt_register_requires(i64 1) |
| // CHECK7-NEXT: ret void |
| // |
| // |
| // CHECK8-LABEL: define {{[^@]+}}@_Z21teams_template_structv |
| // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { |
| // CHECK8-NEXT: entry: |
| // CHECK8-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 |
| // CHECK8-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) |
| // CHECK8-NEXT: ret i32 [[CALL]] |
| // |
| // |
| // CHECK8-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv |
| // CHECK8-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { |
| // CHECK8-NEXT: entry: |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK8-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK8-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK8-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK8-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK8-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK8-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK8-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK8-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4 |
| // CHECK8-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** |
| // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 |
| // CHECK8-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** |
| // CHECK8-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 |
| // CHECK8-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 |
| // CHECK8-NEXT: store i8* null, i8** [[TMP4]], align 4 |
| // CHECK8-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) |
| // CHECK8-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK8-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK8-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] |
| // CHECK8: omp_offload.failed: |
| // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] |
| // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT]] |
| // CHECK8: omp_offload.cont: |
| // CHECK8-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** |
| // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 |
| // CHECK8-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** |
| // CHECK8-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 |
| // CHECK8-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 |
| // CHECK8-NEXT: store i8* null, i8** [[TMP13]], align 4 |
| // CHECK8-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 |
| // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK8-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK8-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 |
| // CHECK8-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] |
| // CHECK8: omp_offload.failed7: |
| // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT8]] |
| // CHECK8: omp_offload.cont8: |
| // CHECK8-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** |
| // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 |
| // CHECK8-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** |
| // CHECK8-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 |
| // CHECK8-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 |
| // CHECK8-NEXT: store i8* null, i8** [[TMP22]], align 4 |
| // CHECK8-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 |
| // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK8-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK8-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 |
| // CHECK8-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] |
| // CHECK8: omp_offload.failed14: |
| // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT15]] |
| // CHECK8: omp_offload.cont15: |
| // CHECK8-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** |
| // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4 |
| // CHECK8-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** |
| // CHECK8-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4 |
| // CHECK8-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0 |
| // CHECK8-NEXT: store i8* null, i8** [[TMP31]], align 4 |
| // CHECK8-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 |
| // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK8-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK8-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 |
| // CHECK8-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] |
| // CHECK8: omp_offload.failed21: |
| // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT22]] |
| // CHECK8: omp_offload.cont22: |
| // CHECK8-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** |
| // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4 |
| // CHECK8-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** |
| // CHECK8-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4 |
| // CHECK8-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0 |
| // CHECK8-NEXT: store i8* null, i8** [[TMP40]], align 4 |
| // CHECK8-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 |
| // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) |
| // CHECK8-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK8-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 |
| // CHECK8-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] |
| // CHECK8: omp_offload.failed28: |
| // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58(%struct.SS* [[THIS1]]) #[[ATTR2]] |
| // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT29]] |
| // CHECK8: omp_offload.cont29: |
| // CHECK8-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 |
| // CHECK8-NEXT: ret i32 [[TMP45]] |
| // |
| // |
| // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 |
| // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { |
| // CHECK8-NEXT: entry: |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK8-NEXT: ret void |
| // |
| // |
| // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined. |
| // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK8-NEXT: entry: |
| // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK8: cond.true: |
| // CHECK8-NEXT: br label [[COND_END:%.*]] |
| // CHECK8: cond.false: |
| // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK8-NEXT: br label [[COND_END]] |
| // CHECK8: cond.end: |
| // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK8: omp.inner.for.cond: |
| // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 |
| // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9 |
| // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK8: omp.inner.for.body: |
| // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !9 |
| // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9 |
| // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !9 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK8: omp.inner.for.inc: |
| // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 |
| // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !9 |
| // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] |
| // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] |
| // CHECK8: omp.inner.for.end: |
| // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK8: omp.loop.exit: |
| // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK8-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 |
| // CHECK8-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK8: .omp.final.then: |
| // CHECK8-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK8: .omp.final.done: |
| // CHECK8-NEXT: ret void |
| // |
| // |
| // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..1 |
| // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK8-NEXT: entry: |
| // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 |
| // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK8: cond.true: |
| // CHECK8-NEXT: br label [[COND_END:%.*]] |
| // CHECK8: cond.false: |
| // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: br label [[COND_END]] |
| // CHECK8: cond.end: |
| // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK8-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK8: omp.inner.for.cond: |
| // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 |
| // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK8: omp.inner.for.body: |
| // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 |
| // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 |
| // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] |
| // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 |
| // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK8: omp.body.continue: |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK8: omp.inner.for.inc: |
| // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK8-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK8-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] |
| // CHECK8: omp.inner.for.end: |
| // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK8: omp.loop.exit: |
| // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK8-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK8-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK8: .omp.final.then: |
| // CHECK8-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK8: .omp.final.done: |
| // CHECK8-NEXT: ret void |
| // |
| // |
| // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41 |
| // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK8-NEXT: entry: |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK8-NEXT: ret void |
| // |
| // |
| // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..2 |
| // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK8-NEXT: entry: |
| // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK8: cond.true: |
| // CHECK8-NEXT: br label [[COND_END:%.*]] |
| // CHECK8: cond.false: |
| // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK8-NEXT: br label [[COND_END]] |
| // CHECK8: cond.end: |
| // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK8: omp.inner.for.cond: |
| // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 |
| // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18 |
| // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK8: omp.inner.for.body: |
| // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !18 |
| // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18 |
| // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !18 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK8: omp.inner.for.inc: |
| // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 |
| // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !18 |
| // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] |
| // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] |
| // CHECK8: omp.inner.for.end: |
| // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK8: omp.loop.exit: |
| // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK8-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 |
| // CHECK8-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK8: .omp.final.then: |
| // CHECK8-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK8: .omp.final.done: |
| // CHECK8-NEXT: ret void |
| // |
| // |
| // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..3 |
| // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK8-NEXT: entry: |
| // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 |
| // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK8: cond.true: |
| // CHECK8-NEXT: br label [[COND_END:%.*]] |
| // CHECK8: cond.false: |
| // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: br label [[COND_END]] |
| // CHECK8: cond.end: |
| // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK8-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK8: omp.inner.for.cond: |
| // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 |
| // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21 |
| // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK8: omp.inner.for.body: |
| // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 |
| // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21 |
| // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21 |
| // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] |
| // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21 |
| // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK8: omp.body.continue: |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK8: omp.inner.for.inc: |
| // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 |
| // CHECK8-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK8-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] |
| // CHECK8: omp.inner.for.end: |
| // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK8: omp.loop.exit: |
| // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK8-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK8-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK8: .omp.final.then: |
| // CHECK8-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK8: .omp.final.done: |
| // CHECK8-NEXT: ret void |
| // |
| // |
| // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46 |
| // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK8-NEXT: entry: |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK8-NEXT: ret void |
| // |
| // |
| // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..6 |
| // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK8-NEXT: entry: |
| // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK8: cond.true: |
| // CHECK8-NEXT: br label [[COND_END:%.*]] |
| // CHECK8: cond.false: |
| // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK8-NEXT: br label [[COND_END]] |
| // CHECK8: cond.end: |
| // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK8: omp.inner.for.cond: |
| // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 |
| // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24 |
| // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK8: omp.inner.for.body: |
| // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !24 |
| // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24 |
| // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !24 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK8: omp.inner.for.inc: |
| // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 |
| // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !24 |
| // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] |
| // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] |
| // CHECK8: omp.inner.for.end: |
| // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK8: omp.loop.exit: |
| // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK8-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 |
| // CHECK8-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK8: .omp.final.then: |
| // CHECK8-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK8: .omp.final.done: |
| // CHECK8-NEXT: ret void |
| // |
| // |
| // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..7 |
| // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK8-NEXT: entry: |
| // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) |
| // CHECK8-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK8: omp.dispatch.cond: |
| // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] |
| // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK8: cond.true: |
| // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK8-NEXT: br label [[COND_END:%.*]] |
| // CHECK8: cond.false: |
| // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: br label [[COND_END]] |
| // CHECK8: cond.end: |
| // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] |
| // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK8-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 |
| // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] |
| // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK8: omp.dispatch.body: |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK8: omp.inner.for.cond: |
| // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 |
| // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27 |
| // CHECK8-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] |
| // CHECK8-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK8: omp.inner.for.body: |
| // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 |
| // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 |
| // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27 |
| // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !27 |
| // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]] |
| // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !27 |
| // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK8: omp.body.continue: |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK8: omp.inner.for.inc: |
| // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 |
| // CHECK8-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1 |
| // CHECK8-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] |
| // CHECK8: omp.inner.for.end: |
| // CHECK8-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK8: omp.dispatch.inc: |
| // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK8-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] |
| // CHECK8-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK8-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] |
| // CHECK8-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK8: omp.dispatch.end: |
| // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK8-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 |
| // CHECK8-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK8: .omp.final.then: |
| // CHECK8-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK8: .omp.final.done: |
| // CHECK8-NEXT: ret void |
| // |
| // |
| // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52 |
| // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK8-NEXT: entry: |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK8-NEXT: ret void |
| // |
| // |
| // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..10 |
| // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK8-NEXT: entry: |
| // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK8: cond.true: |
| // CHECK8-NEXT: br label [[COND_END:%.*]] |
| // CHECK8: cond.false: |
| // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK8-NEXT: br label [[COND_END]] |
| // CHECK8: cond.end: |
| // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK8: omp.inner.for.cond: |
| // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30 |
| // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30 |
| // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK8: omp.inner.for.body: |
| // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !30 |
| // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30 |
| // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !30 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK8: omp.inner.for.inc: |
| // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30 |
| // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !30 |
| // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] |
| // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]] |
| // CHECK8: omp.inner.for.end: |
| // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK8: omp.loop.exit: |
| // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK8-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 |
| // CHECK8-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK8: .omp.final.then: |
| // CHECK8-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK8: .omp.final.done: |
| // CHECK8-NEXT: ret void |
| // |
| // |
| // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..11 |
| // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK8-NEXT: entry: |
| // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 |
| // CHECK8-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) |
| // CHECK8-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK8: omp.dispatch.cond: |
| // CHECK8-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK8-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK8-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK8: omp.dispatch.body: |
| // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK8-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK8: omp.inner.for.cond: |
| // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33 |
| // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !33 |
| // CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] |
| // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK8: omp.inner.for.body: |
| // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33 |
| // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 |
| // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !33 |
| // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !33 |
| // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] |
| // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !33 |
| // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK8: omp.body.continue: |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK8: omp.inner.for.inc: |
| // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33 |
| // CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 |
| // CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]] |
| // CHECK8: omp.inner.for.end: |
| // CHECK8-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK8: omp.dispatch.inc: |
| // CHECK8-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK8: omp.dispatch.end: |
| // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK8-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK8-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK8: .omp.final.then: |
| // CHECK8-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK8: .omp.final.done: |
| // CHECK8-NEXT: ret void |
| // |
| // |
| // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58 |
| // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK8-NEXT: entry: |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) |
| // CHECK8-NEXT: ret void |
| // |
| // |
| // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..14 |
| // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK8-NEXT: entry: |
| // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 |
| // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK8: cond.true: |
| // CHECK8-NEXT: br label [[COND_END:%.*]] |
| // CHECK8: cond.false: |
| // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK8-NEXT: br label [[COND_END]] |
| // CHECK8: cond.end: |
| // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK8: omp.inner.for.cond: |
| // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36 |
| // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36 |
| // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK8: omp.inner.for.body: |
| // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !36 |
| // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36 |
| // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !36 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK8: omp.inner.for.inc: |
| // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36 |
| // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !36 |
| // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] |
| // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]] |
| // CHECK8: omp.inner.for.end: |
| // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK8: omp.loop.exit: |
| // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK8-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 |
| // CHECK8-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK8: .omp.final.then: |
| // CHECK8-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK8: .omp.final.done: |
| // CHECK8-NEXT: ret void |
| // |
| // |
| // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..15 |
| // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { |
| // CHECK8-NEXT: entry: |
| // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 |
| // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 |
| // CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 |
| // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK8-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 |
| // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 |
| // CHECK8-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) |
| // CHECK8-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK8: omp.dispatch.cond: |
| // CHECK8-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK8-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK8-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK8: omp.dispatch.body: |
| // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK8-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK8: omp.inner.for.cond: |
| // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39 |
| // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !39 |
| // CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] |
| // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK8: omp.inner.for.body: |
| // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39 |
| // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 |
| // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !39 |
| // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 |
| // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !39 |
| // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] |
| // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !39 |
| // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK8: omp.body.continue: |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK8: omp.inner.for.inc: |
| // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39 |
| // CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 |
| // CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39 |
| // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]] |
| // CHECK8: omp.inner.for.end: |
| // CHECK8-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK8: omp.dispatch.inc: |
| // CHECK8-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK8: omp.dispatch.end: |
| // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK8-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK8-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK8: .omp.final.then: |
| // CHECK8-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK8: .omp.final.done: |
| // CHECK8-NEXT: ret void |
| // |
| // |
| // CHECK8-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg |
| // CHECK8-SAME: () #[[ATTR3:[0-9]+]] { |
| // CHECK8-NEXT: entry: |
| // CHECK8-NEXT: call void @__tgt_register_requires(i64 1) |
| // CHECK8-NEXT: ret void |
| // |
| // |
| // CHECK9-LABEL: define {{[^@]+}}@_Z21teams_template_structv |
| // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { |
| // CHECK9-NEXT: entry: |
| // CHECK9-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 |
| // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) |
| // CHECK9-NEXT: ret i32 [[CALL]] |
| // |
| // |
| // CHECK9-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv |
| // CHECK9-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { |
| // CHECK9-NEXT: entry: |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[I7:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[I24:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[_TMP37:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[DOTOMP_LB38:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[DOTOMP_UB39:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[DOTOMP_IV40:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[I41:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[_TMP54:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[DOTOMP_LB55:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[DOTOMP_UB56:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[DOTOMP_IV57:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: [[I58:%.*]] = alloca i32, align 4 |
| // CHECK9-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK9-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK9-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK9: omp.inner.for.cond: |
| // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 |
| // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 |
| // CHECK9-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] |
| // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK9: omp.inner.for.body: |
| // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 |
| // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 |
| // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2 |
| // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 |
| // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 |
| // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 |
| // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK9: omp.body.continue: |
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK9: omp.inner.for.inc: |
| // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 |
| // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 |
| // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 |
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] |
| // CHECK9: omp.inner.for.end: |
| // CHECK9-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4 |
| // CHECK9-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4 |
| // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4 |
| // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4 |
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]] |
| // CHECK9: omp.inner.for.cond8: |
| // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 |
| // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !6 |
| // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] |
| // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END19:%.*]] |
| // CHECK9: omp.inner.for.body10: |
| // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 |
| // CHECK9-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1 |
| // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] |
| // CHECK9-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !6 |
| // CHECK9-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !6 |
| // CHECK9-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP10]] to i64 |
| // CHECK9-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i64 0, i64 [[IDXPROM14]] |
| // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX15]], align 4, !llvm.access.group !6 |
| // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]] |
| // CHECK9: omp.body.continue16: |
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]] |
| // CHECK9: omp.inner.for.inc17: |
| // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 |
| // CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1 |
| // CHECK9-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 |
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]] |
| // CHECK9: omp.inner.for.end19: |
| // CHECK9-NEXT: store i32 123, i32* [[I7]], align 4 |
| // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4 |
| // CHECK9-NEXT: store i32 122, i32* [[DOTOMP_UB22]], align 4 |
| // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4 |
| // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV23]], align 4 |
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND25:%.*]] |
| // CHECK9: omp.inner.for.cond25: |
| // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 |
| // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !9 |
| // CHECK9-NEXT: [[CMP26:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] |
| // CHECK9-NEXT: br i1 [[CMP26]], label [[OMP_INNER_FOR_BODY27:%.*]], label [[OMP_INNER_FOR_END36:%.*]] |
| // CHECK9: omp.inner.for.body27: |
| // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 |
| // CHECK9-NEXT: [[MUL28:%.*]] = mul nsw i32 [[TMP15]], 1 |
| // CHECK9-NEXT: [[ADD29:%.*]] = add nsw i32 0, [[MUL28]] |
| // CHECK9-NEXT: store i32 [[ADD29]], i32* [[I24]], align 4, !llvm.access.group !9 |
| // CHECK9-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I24]], align 4, !llvm.access.group !9 |
| // CHECK9-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP16]] to i64 |
| // CHECK9-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 [[IDXPROM31]] |
| // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX32]], align 4, !llvm.access.group !9 |
| // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]] |
| // CHECK9: omp.body.continue33: |
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]] |
| // CHECK9: omp.inner.for.inc34: |
| // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 |
| // CHECK9-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP17]], 1 |
| // CHECK9-NEXT: store i32 [[ADD35]], i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 |
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND25]], !llvm.loop [[LOOP10:![0-9]+]] |
| // CHECK9: omp.inner.for.end36: |
| // CHECK9-NEXT: store i32 123, i32* [[I24]], align 4 |
| // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB38]], align 4 |
| // CHECK9-NEXT: store i32 122, i32* [[DOTOMP_UB39]], align 4 |
| // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB38]], align 4 |
| // CHECK9-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV40]], align 4 |
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND42:%.*]] |
| // CHECK9: omp.inner.for.cond42: |
| // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV40]], align 4, !llvm.access.group !12 |
| // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB39]], align 4, !llvm.access.group !12 |
| // CHECK9-NEXT: [[CMP43:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] |
| // CHECK9-NEXT: br i1 [[CMP43]], label [[OMP_INNER_FOR_BODY44:%.*]], label [[OMP_INNER_FOR_END53:%.*]] |
| // CHECK9: omp.inner.for.body44: |
| // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV40]], align 4, !llvm.access.group !12 |
| // CHECK9-NEXT: [[MUL45:%.*]] = mul nsw i32 [[TMP21]], 1 |
| // CHECK9-NEXT: [[ADD46:%.*]] = add nsw i32 0, [[MUL45]] |
| // CHECK9-NEXT: store i32 [[ADD46]], i32* [[I41]], align 4, !llvm.access.group !12 |
| // CHECK9-NEXT: [[A47:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[I41]], align 4, !llvm.access.group !12 |
| // CHECK9-NEXT: [[IDXPROM48:%.*]] = sext i32 [[TMP22]] to i64 |
| // CHECK9-NEXT: [[ARRAYIDX49:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A47]], i64 0, i64 [[IDXPROM48]] |
| // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX49]], align 4, !llvm.access.group !12 |
| // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE50:%.*]] |
| // CHECK9: omp.body.continue50: |
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC51:%.*]] |
| // CHECK9: omp.inner.for.inc51: |
| // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV40]], align 4, !llvm.access.group !12 |
| // CHECK9-NEXT: [[ADD52:%.*]] = add nsw i32 [[TMP23]], 1 |
| // CHECK9-NEXT: store i32 [[ADD52]], i32* [[DOTOMP_IV40]], align 4, !llvm.access.group !12 |
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND42]], !llvm.loop [[LOOP13:![0-9]+]] |
| // CHECK9: omp.inner.for.end53: |
| // CHECK9-NEXT: store i32 123, i32* [[I41]], align 4 |
| // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB55]], align 4 |
| // CHECK9-NEXT: store i32 122, i32* [[DOTOMP_UB56]], align 4 |
| // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_LB55]], align 4 |
| // CHECK9-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV57]], align 4 |
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND59:%.*]] |
| // CHECK9: omp.inner.for.cond59: |
| // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV57]], align 4, !llvm.access.group !15 |
| // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_UB56]], align 4, !llvm.access.group !15 |
| // CHECK9-NEXT: [[CMP60:%.*]] = icmp sle i32 [[TMP25]], [[TMP26]] |
| // CHECK9-NEXT: br i1 [[CMP60]], label [[OMP_INNER_FOR_BODY61:%.*]], label [[OMP_INNER_FOR_END70:%.*]] |
| // CHECK9: omp.inner.for.body61: |
| // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV57]], align 4, !llvm.access.group !15 |
| // CHECK9-NEXT: [[MUL62:%.*]] = mul nsw i32 [[TMP27]], 1 |
| // CHECK9-NEXT: [[ADD63:%.*]] = add nsw i32 0, [[MUL62]] |
| // CHECK9-NEXT: store i32 [[ADD63]], i32* [[I58]], align 4, !llvm.access.group !15 |
| // CHECK9-NEXT: [[A64:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[I58]], align 4, !llvm.access.group !15 |
| // CHECK9-NEXT: [[IDXPROM65:%.*]] = sext i32 [[TMP28]] to i64 |
| // CHECK9-NEXT: [[ARRAYIDX66:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A64]], i64 0, i64 [[IDXPROM65]] |
| // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX66]], align 4, !llvm.access.group !15 |
| // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE67:%.*]] |
| // CHECK9: omp.body.continue67: |
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC68:%.*]] |
| // CHECK9: omp.inner.for.inc68: |
| // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV57]], align 4, !llvm.access.group !15 |
| // CHECK9-NEXT: [[ADD69:%.*]] = add nsw i32 [[TMP29]], 1 |
| // CHECK9-NEXT: store i32 [[ADD69]], i32* [[DOTOMP_IV57]], align 4, !llvm.access.group !15 |
| // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND59]], !llvm.loop [[LOOP16:![0-9]+]] |
| // CHECK9: omp.inner.for.end70: |
| // CHECK9-NEXT: store i32 123, i32* [[I58]], align 4 |
| // CHECK9-NEXT: [[A71:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK9-NEXT: [[ARRAYIDX72:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A71]], i64 0, i64 0 |
| // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[ARRAYIDX72]], align 4 |
| // CHECK9-NEXT: ret i32 [[TMP30]] |
| // |
| // |
| // CHECK10-LABEL: define {{[^@]+}}@_Z21teams_template_structv |
| // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { |
| // CHECK10-NEXT: entry: |
| // CHECK10-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 |
| // CHECK10-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) |
| // CHECK10-NEXT: ret i32 [[CALL]] |
| // |
| // |
| // CHECK10-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv |
| // CHECK10-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { |
| // CHECK10-NEXT: entry: |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 |
| // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[I7:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[I24:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[_TMP37:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[DOTOMP_LB38:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[DOTOMP_UB39:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[DOTOMP_IV40:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[I41:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[_TMP54:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[DOTOMP_LB55:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[DOTOMP_UB56:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[DOTOMP_IV57:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: [[I58:%.*]] = alloca i32, align 4 |
| // CHECK10-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 |
| // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK10-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK10-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK10: omp.inner.for.cond: |
| // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 |
| // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 |
| // CHECK10-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] |
| // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK10: omp.inner.for.body: |
| // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 |
| // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 |
| // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2 |
| // CHECK10-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 |
| // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 |
| // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] |
| // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 |
| // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK10: omp.body.continue: |
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK10: omp.inner.for.inc: |
| // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 |
| // CHECK10-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 |
| // CHECK10-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 |
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] |
| // CHECK10: omp.inner.for.end: |
| // CHECK10-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4 |
| // CHECK10-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4 |
| // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4 |
| // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4 |
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]] |
| // CHECK10: omp.inner.for.cond8: |
| // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 |
| // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !6 |
| // CHECK10-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] |
| // CHECK10-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END19:%.*]] |
| // CHECK10: omp.inner.for.body10: |
| // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 |
| // CHECK10-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1 |
| // CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] |
| // CHECK10-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !6 |
| // CHECK10-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !6 |
| // CHECK10-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP10]] to i64 |
| // CHECK10-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i64 0, i64 [[IDXPROM14]] |
| // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX15]], align 4, !llvm.access.group !6 |
| // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]] |
| // CHECK10: omp.body.continue16: |
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]] |
| // CHECK10: omp.inner.for.inc17: |
| // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 |
| // CHECK10-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1 |
| // CHECK10-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 |
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]] |
| // CHECK10: omp.inner.for.end19: |
| // CHECK10-NEXT: store i32 123, i32* [[I7]], align 4 |
| // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4 |
| // CHECK10-NEXT: store i32 122, i32* [[DOTOMP_UB22]], align 4 |
| // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4 |
| // CHECK10-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV23]], align 4 |
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND25:%.*]] |
| // CHECK10: omp.inner.for.cond25: |
| // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 |
| // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !9 |
| // CHECK10-NEXT: [[CMP26:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] |
| // CHECK10-NEXT: br i1 [[CMP26]], label [[OMP_INNER_FOR_BODY27:%.*]], label [[OMP_INNER_FOR_END36:%.*]] |
| // CHECK10: omp.inner.for.body27: |
| // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 |
| // CHECK10-NEXT: [[MUL28:%.*]] = mul nsw i32 [[TMP15]], 1 |
| // CHECK10-NEXT: [[ADD29:%.*]] = add nsw i32 0, [[MUL28]] |
| // CHECK10-NEXT: store i32 [[ADD29]], i32* [[I24]], align 4, !llvm.access.group !9 |
| // CHECK10-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[I24]], align 4, !llvm.access.group !9 |
| // CHECK10-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP16]] to i64 |
| // CHECK10-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 [[IDXPROM31]] |
| // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX32]], align 4, !llvm.access.group !9 |
| // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]] |
| // CHECK10: omp.body.continue33: |
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]] |
| // CHECK10: omp.inner.for.inc34: |
| // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 |
| // CHECK10-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP17]], 1 |
| // CHECK10-NEXT: store i32 [[ADD35]], i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 |
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND25]], !llvm.loop [[LOOP10:![0-9]+]] |
| // CHECK10: omp.inner.for.end36: |
| // CHECK10-NEXT: store i32 123, i32* [[I24]], align 4 |
| // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB38]], align 4 |
| // CHECK10-NEXT: store i32 122, i32* [[DOTOMP_UB39]], align 4 |
| // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB38]], align 4 |
| // CHECK10-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV40]], align 4 |
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND42:%.*]] |
| // CHECK10: omp.inner.for.cond42: |
| // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV40]], align 4, !llvm.access.group !12 |
| // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB39]], align 4, !llvm.access.group !12 |
| // CHECK10-NEXT: [[CMP43:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] |
| // CHECK10-NEXT: br i1 [[CMP43]], label [[OMP_INNER_FOR_BODY44:%.*]], label [[OMP_INNER_FOR_END53:%.*]] |
| // CHECK10: omp.inner.for.body44: |
| // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV40]], align 4, !llvm.access.group !12 |
| // CHECK10-NEXT: [[MUL45:%.*]] = mul nsw i32 [[TMP21]], 1 |
| // CHECK10-NEXT: [[ADD46:%.*]] = add nsw i32 0, [[MUL45]] |
| // CHECK10-NEXT: store i32 [[ADD46]], i32* [[I41]], align 4, !llvm.access.group !12 |
| // CHECK10-NEXT: [[A47:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[I41]], align 4, !llvm.access.group !12 |
| // CHECK10-NEXT: [[IDXPROM48:%.*]] = sext i32 [[TMP22]] to i64 |
| // CHECK10-NEXT: [[ARRAYIDX49:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A47]], i64 0, i64 [[IDXPROM48]] |
| // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX49]], align 4, !llvm.access.group !12 |
| // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE50:%.*]] |
| // CHECK10: omp.body.continue50: |
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC51:%.*]] |
| // CHECK10: omp.inner.for.inc51: |
| // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV40]], align 4, !llvm.access.group !12 |
| // CHECK10-NEXT: [[ADD52:%.*]] = add nsw i32 [[TMP23]], 1 |
| // CHECK10-NEXT: store i32 [[ADD52]], i32* [[DOTOMP_IV40]], align 4, !llvm.access.group !12 |
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND42]], !llvm.loop [[LOOP13:![0-9]+]] |
| // CHECK10: omp.inner.for.end53: |
| // CHECK10-NEXT: store i32 123, i32* [[I41]], align 4 |
| // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB55]], align 4 |
| // CHECK10-NEXT: store i32 122, i32* [[DOTOMP_UB56]], align 4 |
| // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_LB55]], align 4 |
| // CHECK10-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV57]], align 4 |
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND59:%.*]] |
| // CHECK10: omp.inner.for.cond59: |
| // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV57]], align 4, !llvm.access.group !15 |
| // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_UB56]], align 4, !llvm.access.group !15 |
| // CHECK10-NEXT: [[CMP60:%.*]] = icmp sle i32 [[TMP25]], [[TMP26]] |
| // CHECK10-NEXT: br i1 [[CMP60]], label [[OMP_INNER_FOR_BODY61:%.*]], label [[OMP_INNER_FOR_END70:%.*]] |
| // CHECK10: omp.inner.for.body61: |
| // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV57]], align 4, !llvm.access.group !15 |
| // CHECK10-NEXT: [[MUL62:%.*]] = mul nsw i32 [[TMP27]], 1 |
| // CHECK10-NEXT: [[ADD63:%.*]] = add nsw i32 0, [[MUL62]] |
| // CHECK10-NEXT: store i32 [[ADD63]], i32* [[I58]], align 4, !llvm.access.group !15 |
| // CHECK10-NEXT: [[A64:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[I58]], align 4, !llvm.access.group !15 |
| // CHECK10-NEXT: [[IDXPROM65:%.*]] = sext i32 [[TMP28]] to i64 |
| // CHECK10-NEXT: [[ARRAYIDX66:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A64]], i64 0, i64 [[IDXPROM65]] |
| // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX66]], align 4, !llvm.access.group !15 |
| // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE67:%.*]] |
| // CHECK10: omp.body.continue67: |
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC68:%.*]] |
| // CHECK10: omp.inner.for.inc68: |
| // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV57]], align 4, !llvm.access.group !15 |
| // CHECK10-NEXT: [[ADD69:%.*]] = add nsw i32 [[TMP29]], 1 |
| // CHECK10-NEXT: store i32 [[ADD69]], i32* [[DOTOMP_IV57]], align 4, !llvm.access.group !15 |
| // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND59]], !llvm.loop [[LOOP16:![0-9]+]] |
| // CHECK10: omp.inner.for.end70: |
| // CHECK10-NEXT: store i32 123, i32* [[I58]], align 4 |
| // CHECK10-NEXT: [[A71:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK10-NEXT: [[ARRAYIDX72:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A71]], i64 0, i64 0 |
| // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[ARRAYIDX72]], align 4 |
| // CHECK10-NEXT: ret i32 [[TMP30]] |
| // |
| // |
| // CHECK11-LABEL: define {{[^@]+}}@_Z21teams_template_structv |
| // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { |
| // CHECK11-NEXT: entry: |
| // CHECK11-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 |
| // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) |
| // CHECK11-NEXT: ret i32 [[CALL]] |
| // |
| // |
| // CHECK11-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv |
| // CHECK11-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { |
| // CHECK11-NEXT: entry: |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[I7:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[_TMP19:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[DOTOMP_LB20:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[DOTOMP_UB21:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[DOTOMP_IV22:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[I23:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[_TMP35:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[DOTOMP_LB36:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[DOTOMP_UB37:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[DOTOMP_IV38:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[I39:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[_TMP51:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[DOTOMP_LB52:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[DOTOMP_UB53:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[DOTOMP_IV54:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: [[I55:%.*]] = alloca i32, align 4 |
| // CHECK11-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK11-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK11-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK11: omp.inner.for.cond: |
| // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 |
| // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 |
| // CHECK11-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] |
| // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK11: omp.inner.for.body: |
| // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 |
| // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 |
| // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3 |
| // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 |
| // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP4]] |
| // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 |
| // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK11: omp.body.continue: |
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK11: omp.inner.for.inc: |
| // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 |
| // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 |
| // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 |
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] |
| // CHECK11: omp.inner.for.end: |
| // CHECK11-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4 |
| // CHECK11-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4 |
| // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4 |
| // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4 |
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]] |
| // CHECK11: omp.inner.for.cond8: |
| // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 |
| // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !7 |
| // CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] |
| // CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]] |
| // CHECK11: omp.inner.for.body10: |
| // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 |
| // CHECK11-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1 |
| // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] |
| // CHECK11-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !7 |
| // CHECK11-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !7 |
| // CHECK11-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i32 0, i32 [[TMP10]] |
| // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX14]], align 4, !llvm.access.group !7 |
| // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]] |
| // CHECK11: omp.body.continue15: |
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]] |
| // CHECK11: omp.inner.for.inc16: |
| // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 |
| // CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP11]], 1 |
| // CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 |
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP8:![0-9]+]] |
| // CHECK11: omp.inner.for.end18: |
| // CHECK11-NEXT: store i32 123, i32* [[I7]], align 4 |
| // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB20]], align 4 |
| // CHECK11-NEXT: store i32 122, i32* [[DOTOMP_UB21]], align 4 |
| // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB20]], align 4 |
| // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV22]], align 4 |
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND24:%.*]] |
| // CHECK11: omp.inner.for.cond24: |
| // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 |
| // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB21]], align 4, !llvm.access.group !10 |
| // CHECK11-NEXT: [[CMP25:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] |
| // CHECK11-NEXT: br i1 [[CMP25]], label [[OMP_INNER_FOR_BODY26:%.*]], label [[OMP_INNER_FOR_END34:%.*]] |
| // CHECK11: omp.inner.for.body26: |
| // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 |
| // CHECK11-NEXT: [[MUL27:%.*]] = mul nsw i32 [[TMP15]], 1 |
| // CHECK11-NEXT: [[ADD28:%.*]] = add nsw i32 0, [[MUL27]] |
| // CHECK11-NEXT: store i32 [[ADD28]], i32* [[I23]], align 4, !llvm.access.group !10 |
| // CHECK11-NEXT: [[A29:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I23]], align 4, !llvm.access.group !10 |
| // CHECK11-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A29]], i32 0, i32 [[TMP16]] |
| // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX30]], align 4, !llvm.access.group !10 |
| // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE31:%.*]] |
| // CHECK11: omp.body.continue31: |
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC32:%.*]] |
| // CHECK11: omp.inner.for.inc32: |
| // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 |
| // CHECK11-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP17]], 1 |
| // CHECK11-NEXT: store i32 [[ADD33]], i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 |
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND24]], !llvm.loop [[LOOP11:![0-9]+]] |
| // CHECK11: omp.inner.for.end34: |
| // CHECK11-NEXT: store i32 123, i32* [[I23]], align 4 |
| // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB36]], align 4 |
| // CHECK11-NEXT: store i32 122, i32* [[DOTOMP_UB37]], align 4 |
| // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB36]], align 4 |
| // CHECK11-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV38]], align 4 |
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND40:%.*]] |
| // CHECK11: omp.inner.for.cond40: |
| // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV38]], align 4, !llvm.access.group !13 |
| // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB37]], align 4, !llvm.access.group !13 |
| // CHECK11-NEXT: [[CMP41:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] |
| // CHECK11-NEXT: br i1 [[CMP41]], label [[OMP_INNER_FOR_BODY42:%.*]], label [[OMP_INNER_FOR_END50:%.*]] |
| // CHECK11: omp.inner.for.body42: |
| // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV38]], align 4, !llvm.access.group !13 |
| // CHECK11-NEXT: [[MUL43:%.*]] = mul nsw i32 [[TMP21]], 1 |
| // CHECK11-NEXT: [[ADD44:%.*]] = add nsw i32 0, [[MUL43]] |
| // CHECK11-NEXT: store i32 [[ADD44]], i32* [[I39]], align 4, !llvm.access.group !13 |
| // CHECK11-NEXT: [[A45:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[I39]], align 4, !llvm.access.group !13 |
| // CHECK11-NEXT: [[ARRAYIDX46:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A45]], i32 0, i32 [[TMP22]] |
| // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX46]], align 4, !llvm.access.group !13 |
| // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE47:%.*]] |
| // CHECK11: omp.body.continue47: |
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC48:%.*]] |
| // CHECK11: omp.inner.for.inc48: |
| // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV38]], align 4, !llvm.access.group !13 |
| // CHECK11-NEXT: [[ADD49:%.*]] = add nsw i32 [[TMP23]], 1 |
| // CHECK11-NEXT: store i32 [[ADD49]], i32* [[DOTOMP_IV38]], align 4, !llvm.access.group !13 |
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND40]], !llvm.loop [[LOOP14:![0-9]+]] |
| // CHECK11: omp.inner.for.end50: |
| // CHECK11-NEXT: store i32 123, i32* [[I39]], align 4 |
| // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB52]], align 4 |
| // CHECK11-NEXT: store i32 122, i32* [[DOTOMP_UB53]], align 4 |
| // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_LB52]], align 4 |
| // CHECK11-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV54]], align 4 |
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND56:%.*]] |
| // CHECK11: omp.inner.for.cond56: |
| // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !16 |
| // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_UB53]], align 4, !llvm.access.group !16 |
| // CHECK11-NEXT: [[CMP57:%.*]] = icmp sle i32 [[TMP25]], [[TMP26]] |
| // CHECK11-NEXT: br i1 [[CMP57]], label [[OMP_INNER_FOR_BODY58:%.*]], label [[OMP_INNER_FOR_END66:%.*]] |
| // CHECK11: omp.inner.for.body58: |
| // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !16 |
| // CHECK11-NEXT: [[MUL59:%.*]] = mul nsw i32 [[TMP27]], 1 |
| // CHECK11-NEXT: [[ADD60:%.*]] = add nsw i32 0, [[MUL59]] |
| // CHECK11-NEXT: store i32 [[ADD60]], i32* [[I55]], align 4, !llvm.access.group !16 |
| // CHECK11-NEXT: [[A61:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[I55]], align 4, !llvm.access.group !16 |
| // CHECK11-NEXT: [[ARRAYIDX62:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A61]], i32 0, i32 [[TMP28]] |
| // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX62]], align 4, !llvm.access.group !16 |
| // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE63:%.*]] |
| // CHECK11: omp.body.continue63: |
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC64:%.*]] |
| // CHECK11: omp.inner.for.inc64: |
| // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !16 |
| // CHECK11-NEXT: [[ADD65:%.*]] = add nsw i32 [[TMP29]], 1 |
| // CHECK11-NEXT: store i32 [[ADD65]], i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !16 |
| // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND56]], !llvm.loop [[LOOP17:![0-9]+]] |
| // CHECK11: omp.inner.for.end66: |
| // CHECK11-NEXT: store i32 123, i32* [[I55]], align 4 |
| // CHECK11-NEXT: [[A67:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK11-NEXT: [[ARRAYIDX68:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A67]], i32 0, i32 0 |
| // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[ARRAYIDX68]], align 4 |
| // CHECK11-NEXT: ret i32 [[TMP30]] |
| // |
| // |
| // CHECK12-LABEL: define {{[^@]+}}@_Z21teams_template_structv |
| // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { |
| // CHECK12-NEXT: entry: |
| // CHECK12-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 |
| // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) |
| // CHECK12-NEXT: ret i32 [[CALL]] |
| // |
| // |
| // CHECK12-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv |
| // CHECK12-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { |
| // CHECK12-NEXT: entry: |
| // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 |
| // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[I7:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[_TMP19:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[DOTOMP_LB20:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[DOTOMP_UB21:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[DOTOMP_IV22:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[I23:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[_TMP35:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[DOTOMP_LB36:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[DOTOMP_UB37:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[DOTOMP_IV38:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[I39:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[_TMP51:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[DOTOMP_LB52:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[DOTOMP_UB53:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[DOTOMP_IV54:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: [[I55:%.*]] = alloca i32, align 4 |
| // CHECK12-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 |
| // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK12-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 |
| // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK12-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK12: omp.inner.for.cond: |
| // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 |
| // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 |
| // CHECK12-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] |
| // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK12: omp.inner.for.body: |
| // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 |
| // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 |
| // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3 |
| // CHECK12-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 |
| // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP4]] |
| // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 |
| // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK12: omp.body.continue: |
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK12: omp.inner.for.inc: |
| // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 |
| // CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 |
| // CHECK12-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 |
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] |
| // CHECK12: omp.inner.for.end: |
| // CHECK12-NEXT: store i32 123, i32* [[I]], align 4 |
| // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4 |
| // CHECK12-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4 |
| // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4 |
| // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4 |
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]] |
| // CHECK12: omp.inner.for.cond8: |
| // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 |
| // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !7 |
| // CHECK12-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] |
| // CHECK12-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]] |
| // CHECK12: omp.inner.for.body10: |
| // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 |
| // CHECK12-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1 |
| // CHECK12-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] |
| // CHECK12-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !7 |
| // CHECK12-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !7 |
| // CHECK12-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i32 0, i32 [[TMP10]] |
| // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX14]], align 4, !llvm.access.group !7 |
| // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]] |
| // CHECK12: omp.body.continue15: |
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]] |
| // CHECK12: omp.inner.for.inc16: |
| // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 |
| // CHECK12-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP11]], 1 |
| // CHECK12-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 |
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP8:![0-9]+]] |
| // CHECK12: omp.inner.for.end18: |
| // CHECK12-NEXT: store i32 123, i32* [[I7]], align 4 |
| // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB20]], align 4 |
| // CHECK12-NEXT: store i32 122, i32* [[DOTOMP_UB21]], align 4 |
| // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB20]], align 4 |
| // CHECK12-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV22]], align 4 |
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND24:%.*]] |
| // CHECK12: omp.inner.for.cond24: |
| // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 |
| // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB21]], align 4, !llvm.access.group !10 |
| // CHECK12-NEXT: [[CMP25:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] |
| // CHECK12-NEXT: br i1 [[CMP25]], label [[OMP_INNER_FOR_BODY26:%.*]], label [[OMP_INNER_FOR_END34:%.*]] |
| // CHECK12: omp.inner.for.body26: |
| // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 |
| // CHECK12-NEXT: [[MUL27:%.*]] = mul nsw i32 [[TMP15]], 1 |
| // CHECK12-NEXT: [[ADD28:%.*]] = add nsw i32 0, [[MUL27]] |
| // CHECK12-NEXT: store i32 [[ADD28]], i32* [[I23]], align 4, !llvm.access.group !10 |
| // CHECK12-NEXT: [[A29:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[I23]], align 4, !llvm.access.group !10 |
| // CHECK12-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A29]], i32 0, i32 [[TMP16]] |
| // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX30]], align 4, !llvm.access.group !10 |
| // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE31:%.*]] |
| // CHECK12: omp.body.continue31: |
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC32:%.*]] |
| // CHECK12: omp.inner.for.inc32: |
| // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 |
| // CHECK12-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP17]], 1 |
| // CHECK12-NEXT: store i32 [[ADD33]], i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 |
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND24]], !llvm.loop [[LOOP11:![0-9]+]] |
| // CHECK12: omp.inner.for.end34: |
| // CHECK12-NEXT: store i32 123, i32* [[I23]], align 4 |
| // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB36]], align 4 |
| // CHECK12-NEXT: store i32 122, i32* [[DOTOMP_UB37]], align 4 |
| // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB36]], align 4 |
| // CHECK12-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV38]], align 4 |
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND40:%.*]] |
| // CHECK12: omp.inner.for.cond40: |
| // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV38]], align 4, !llvm.access.group !13 |
| // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB37]], align 4, !llvm.access.group !13 |
| // CHECK12-NEXT: [[CMP41:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] |
| // CHECK12-NEXT: br i1 [[CMP41]], label [[OMP_INNER_FOR_BODY42:%.*]], label [[OMP_INNER_FOR_END50:%.*]] |
| // CHECK12: omp.inner.for.body42: |
| // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV38]], align 4, !llvm.access.group !13 |
| // CHECK12-NEXT: [[MUL43:%.*]] = mul nsw i32 [[TMP21]], 1 |
| // CHECK12-NEXT: [[ADD44:%.*]] = add nsw i32 0, [[MUL43]] |
| // CHECK12-NEXT: store i32 [[ADD44]], i32* [[I39]], align 4, !llvm.access.group !13 |
| // CHECK12-NEXT: [[A45:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[I39]], align 4, !llvm.access.group !13 |
| // CHECK12-NEXT: [[ARRAYIDX46:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A45]], i32 0, i32 [[TMP22]] |
| // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX46]], align 4, !llvm.access.group !13 |
| // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE47:%.*]] |
| // CHECK12: omp.body.continue47: |
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC48:%.*]] |
| // CHECK12: omp.inner.for.inc48: |
| // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV38]], align 4, !llvm.access.group !13 |
| // CHECK12-NEXT: [[ADD49:%.*]] = add nsw i32 [[TMP23]], 1 |
| // CHECK12-NEXT: store i32 [[ADD49]], i32* [[DOTOMP_IV38]], align 4, !llvm.access.group !13 |
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND40]], !llvm.loop [[LOOP14:![0-9]+]] |
| // CHECK12: omp.inner.for.end50: |
| // CHECK12-NEXT: store i32 123, i32* [[I39]], align 4 |
| // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB52]], align 4 |
| // CHECK12-NEXT: store i32 122, i32* [[DOTOMP_UB53]], align 4 |
| // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_LB52]], align 4 |
| // CHECK12-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV54]], align 4 |
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND56:%.*]] |
| // CHECK12: omp.inner.for.cond56: |
| // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !16 |
| // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_UB53]], align 4, !llvm.access.group !16 |
| // CHECK12-NEXT: [[CMP57:%.*]] = icmp sle i32 [[TMP25]], [[TMP26]] |
| // CHECK12-NEXT: br i1 [[CMP57]], label [[OMP_INNER_FOR_BODY58:%.*]], label [[OMP_INNER_FOR_END66:%.*]] |
| // CHECK12: omp.inner.for.body58: |
| // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !16 |
| // CHECK12-NEXT: [[MUL59:%.*]] = mul nsw i32 [[TMP27]], 1 |
| // CHECK12-NEXT: [[ADD60:%.*]] = add nsw i32 0, [[MUL59]] |
| // CHECK12-NEXT: store i32 [[ADD60]], i32* [[I55]], align 4, !llvm.access.group !16 |
| // CHECK12-NEXT: [[A61:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[I55]], align 4, !llvm.access.group !16 |
| // CHECK12-NEXT: [[ARRAYIDX62:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A61]], i32 0, i32 [[TMP28]] |
| // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX62]], align 4, !llvm.access.group !16 |
| // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE63:%.*]] |
| // CHECK12: omp.body.continue63: |
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC64:%.*]] |
| // CHECK12: omp.inner.for.inc64: |
| // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !16 |
| // CHECK12-NEXT: [[ADD65:%.*]] = add nsw i32 [[TMP29]], 1 |
| // CHECK12-NEXT: store i32 [[ADD65]], i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !16 |
| // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND56]], !llvm.loop [[LOOP17:![0-9]+]] |
| // CHECK12: omp.inner.for.end66: |
| // CHECK12-NEXT: store i32 123, i32* [[I55]], align 4 |
| // CHECK12-NEXT: [[A67:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 |
| // CHECK12-NEXT: [[ARRAYIDX68:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A67]], i32 0, i32 0 |
| // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[ARRAYIDX68]], align 4 |
| // CHECK12-NEXT: ret i32 [[TMP30]] |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@main |
| // CHECK13-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 |
| // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 |
| // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 |
| // CHECK13-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8 |
| // CHECK13-NEXT: [[_TMP25:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8 |
| // CHECK13-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[M_CASTED49:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[N_CASTED51:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8 |
| // CHECK13-NEXT: [[_TMP57:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 |
| // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 |
| // CHECK13-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 |
| // CHECK13-NEXT: store i32 100, i32* [[N]], align 4 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 |
| // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() |
| // CHECK13-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 |
| // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 |
| // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 |
| // CHECK13-NEXT: store i32 10, i32* [[M]], align 4 |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* |
| // CHECK13-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 |
| // CHECK13-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 |
| // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8 |
| // CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8 |
| // CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 |
| // CHECK13-NEXT: store i64 4, i64* [[TMP10]], align 8 |
| // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP11]], align 8 |
| // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 |
| // CHECK13-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 |
| // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 |
| // CHECK13-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 |
| // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 |
| // CHECK13-NEXT: store i64 8, i64* [[TMP16]], align 8 |
| // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP17]], align 8 |
| // CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 |
| // CHECK13-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** |
| // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8 |
| // CHECK13-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 |
| // CHECK13-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** |
| // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8 |
| // CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 |
| // CHECK13-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8 |
| // CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP23]], align 8 |
| // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 |
| // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 |
| // CHECK13-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 |
| // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) |
| // CHECK13-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK13-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 |
| // CHECK13-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] |
| // CHECK13: omp_offload.failed: |
| // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] |
| // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] |
| // CHECK13: omp_offload.cont: |
| // CHECK13-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK13-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* |
| // CHECK13-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4 |
| // CHECK13-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8 |
| // CHECK13-NEXT: [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4 |
| // CHECK13-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP34]], i64* [[TMP37]], align 8 |
| // CHECK13-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8 |
| // CHECK13-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 |
| // CHECK13-NEXT: store i64 4, i64* [[TMP40]], align 8 |
| // CHECK13-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP41]], align 8 |
| // CHECK13-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 |
| // CHECK13-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP43]], align 8 |
| // CHECK13-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 |
| // CHECK13-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP45]], align 8 |
| // CHECK13-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1 |
| // CHECK13-NEXT: store i64 8, i64* [[TMP46]], align 8 |
| // CHECK13-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP47]], align 8 |
| // CHECK13-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 |
| // CHECK13-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** |
| // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 |
| // CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 |
| // CHECK13-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32** |
| // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP51]], align 8 |
| // CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 |
| // CHECK13-NEXT: store i64 [[TMP35]], i64* [[TMP52]], align 8 |
| // CHECK13-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP53]], align 8 |
| // CHECK13-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP57:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4 |
| // CHECK13-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 |
| // CHECK13-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0 |
| // CHECK13-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 |
| // CHECK13-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 |
| // CHECK13-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 |
| // CHECK13-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 |
| // CHECK13-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1 |
| // CHECK13-NEXT: [[TMP60:%.*]] = zext i32 [[ADD15]] to i64 |
| // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]]) |
| // CHECK13-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK13-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0 |
| // CHECK13-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] |
| // CHECK13: omp_offload.failed16: |
| // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] |
| // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT17]] |
| // CHECK13: omp_offload.cont17: |
| // CHECK13-NEXT: [[TMP63:%.*]] = load i32, i32* [[M]], align 4 |
| // CHECK13-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32* |
| // CHECK13-NEXT: store i32 [[TMP63]], i32* [[CONV18]], align 4 |
| // CHECK13-NEXT: [[TMP64:%.*]] = load i64, i64* [[M_CASTED]], align 8 |
| // CHECK13-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK13-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* |
| // CHECK13-NEXT: store i32 [[TMP65]], i32* [[CONV20]], align 4 |
| // CHECK13-NEXT: [[TMP66:%.*]] = load i64, i64* [[N_CASTED19]], align 8 |
| // CHECK13-NEXT: [[TMP67:%.*]] = mul nuw i64 [[TMP1]], 4 |
| // CHECK13-NEXT: [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP64]], i64* [[TMP69]], align 8 |
| // CHECK13-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP64]], i64* [[TMP71]], align 8 |
| // CHECK13-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 |
| // CHECK13-NEXT: store i64 4, i64* [[TMP72]], align 8 |
| // CHECK13-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP73]], align 8 |
| // CHECK13-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 |
| // CHECK13-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP66]], i64* [[TMP75]], align 8 |
| // CHECK13-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 |
| // CHECK13-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP66]], i64* [[TMP77]], align 8 |
| // CHECK13-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 1 |
| // CHECK13-NEXT: store i64 4, i64* [[TMP78]], align 8 |
| // CHECK13-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP79]], align 8 |
| // CHECK13-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2 |
| // CHECK13-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP81]], align 8 |
| // CHECK13-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2 |
| // CHECK13-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP83]], align 8 |
| // CHECK13-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2 |
| // CHECK13-NEXT: store i64 8, i64* [[TMP84]], align 8 |
| // CHECK13-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP85]], align 8 |
| // CHECK13-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3 |
| // CHECK13-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32** |
| // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP87]], align 8 |
| // CHECK13-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3 |
| // CHECK13-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32** |
| // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP89]], align 8 |
| // CHECK13-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3 |
| // CHECK13-NEXT: store i64 [[TMP67]], i64* [[TMP90]], align 8 |
| // CHECK13-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP91]], align 8 |
| // CHECK13-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP95:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP95]], i32* [[DOTCAPTURE_EXPR_26]], align 4 |
| // CHECK13-NEXT: [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 |
| // CHECK13-NEXT: [[SUB28:%.*]] = sub nsw i32 [[TMP96]], 0 |
| // CHECK13-NEXT: [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1 |
| // CHECK13-NEXT: [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1 |
| // CHECK13-NEXT: store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 |
| // CHECK13-NEXT: [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 |
| // CHECK13-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP97]], 1 |
| // CHECK13-NEXT: [[TMP98:%.*]] = zext i32 [[ADD31]] to i64 |
| // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP98]]) |
| // CHECK13-NEXT: [[TMP99:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164.region_id, i32 4, i8** [[TMP92]], i8** [[TMP93]], i64* [[TMP94]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK13-NEXT: [[TMP100:%.*]] = icmp ne i32 [[TMP99]], 0 |
| // CHECK13-NEXT: br i1 [[TMP100]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] |
| // CHECK13: omp_offload.failed32: |
| // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164(i64 [[TMP64]], i64 [[TMP66]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] |
| // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT33]] |
| // CHECK13: omp_offload.cont33: |
| // CHECK13-NEXT: [[TMP101:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK13-NEXT: [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32* |
| // CHECK13-NEXT: store i32 [[TMP101]], i32* [[CONV35]], align 4 |
| // CHECK13-NEXT: [[TMP102:%.*]] = load i64, i64* [[N_CASTED34]], align 8 |
| // CHECK13-NEXT: [[TMP103:%.*]] = mul nuw i64 [[TMP1]], 4 |
| // CHECK13-NEXT: [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP102]], i64* [[TMP105]], align 8 |
| // CHECK13-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP102]], i64* [[TMP107]], align 8 |
| // CHECK13-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 |
| // CHECK13-NEXT: store i64 4, i64* [[TMP108]], align 8 |
| // CHECK13-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP109]], align 8 |
| // CHECK13-NEXT: [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1 |
| // CHECK13-NEXT: [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP111]], align 8 |
| // CHECK13-NEXT: [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1 |
| // CHECK13-NEXT: [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP113]], align 8 |
| // CHECK13-NEXT: [[TMP114:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 1 |
| // CHECK13-NEXT: store i64 8, i64* [[TMP114]], align 8 |
| // CHECK13-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP115]], align 8 |
| // CHECK13-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2 |
| // CHECK13-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32** |
| // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP117]], align 8 |
| // CHECK13-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2 |
| // CHECK13-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32** |
| // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP119]], align 8 |
| // CHECK13-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2 |
| // CHECK13-NEXT: store i64 [[TMP103]], i64* [[TMP120]], align 8 |
| // CHECK13-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP121]], align 8 |
| // CHECK13-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP125:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP125]], i32* [[DOTCAPTURE_EXPR_41]], align 4 |
| // CHECK13-NEXT: [[TMP126:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 |
| // CHECK13-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP126]], 0 |
| // CHECK13-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 |
| // CHECK13-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 |
| // CHECK13-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4 |
| // CHECK13-NEXT: [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4 |
| // CHECK13-NEXT: [[ADD46:%.*]] = add nsw i32 [[TMP127]], 1 |
| // CHECK13-NEXT: [[TMP128:%.*]] = zext i32 [[ADD46]] to i64 |
| // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP128]]) |
| // CHECK13-NEXT: [[TMP129:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169.region_id, i32 3, i8** [[TMP122]], i8** [[TMP123]], i64* [[TMP124]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK13-NEXT: [[TMP130:%.*]] = icmp ne i32 [[TMP129]], 0 |
| // CHECK13-NEXT: br i1 [[TMP130]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] |
| // CHECK13: omp_offload.failed47: |
| // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169(i64 [[TMP102]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] |
| // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT48]] |
| // CHECK13: omp_offload.cont48: |
| // CHECK13-NEXT: [[TMP131:%.*]] = load i32, i32* [[M]], align 4 |
| // CHECK13-NEXT: [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32* |
| // CHECK13-NEXT: store i32 [[TMP131]], i32* [[CONV50]], align 4 |
| // CHECK13-NEXT: [[TMP132:%.*]] = load i64, i64* [[M_CASTED49]], align 8 |
| // CHECK13-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK13-NEXT: [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32* |
| // CHECK13-NEXT: store i32 [[TMP133]], i32* [[CONV52]], align 4 |
| // CHECK13-NEXT: [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8 |
| // CHECK13-NEXT: [[TMP135:%.*]] = mul nuw i64 [[TMP1]], 4 |
| // CHECK13-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP132]], i64* [[TMP137]], align 8 |
| // CHECK13-NEXT: [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP132]], i64* [[TMP139]], align 8 |
| // CHECK13-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 |
| // CHECK13-NEXT: store i64 4, i64* [[TMP140]], align 8 |
| // CHECK13-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP141]], align 8 |
| // CHECK13-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1 |
| // CHECK13-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP134]], i64* [[TMP143]], align 8 |
| // CHECK13-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1 |
| // CHECK13-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP134]], i64* [[TMP145]], align 8 |
| // CHECK13-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 1 |
| // CHECK13-NEXT: store i64 4, i64* [[TMP146]], align 8 |
| // CHECK13-NEXT: [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP147]], align 8 |
| // CHECK13-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2 |
| // CHECK13-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP149]], align 8 |
| // CHECK13-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2 |
| // CHECK13-NEXT: [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP151]], align 8 |
| // CHECK13-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 2 |
| // CHECK13-NEXT: store i64 8, i64* [[TMP152]], align 8 |
| // CHECK13-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP153]], align 8 |
| // CHECK13-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3 |
| // CHECK13-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32** |
| // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP155]], align 8 |
| // CHECK13-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3 |
| // CHECK13-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32** |
| // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP157]], align 8 |
| // CHECK13-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3 |
| // CHECK13-NEXT: store i64 [[TMP135]], i64* [[TMP158]], align 8 |
| // CHECK13-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP159]], align 8 |
| // CHECK13-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP163:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_58]], align 4 |
| // CHECK13-NEXT: [[TMP164:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4 |
| // CHECK13-NEXT: [[SUB60:%.*]] = sub nsw i32 [[TMP164]], 0 |
| // CHECK13-NEXT: [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1 |
| // CHECK13-NEXT: [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1 |
| // CHECK13-NEXT: store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4 |
| // CHECK13-NEXT: [[TMP165:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4 |
| // CHECK13-NEXT: [[ADD63:%.*]] = add nsw i32 [[TMP165]], 1 |
| // CHECK13-NEXT: [[TMP166:%.*]] = zext i32 [[ADD63]] to i64 |
| // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP166]]) |
| // CHECK13-NEXT: [[TMP167:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174.region_id, i32 4, i8** [[TMP160]], i8** [[TMP161]], i64* [[TMP162]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK13-NEXT: [[TMP168:%.*]] = icmp ne i32 [[TMP167]], 0 |
| // CHECK13-NEXT: br i1 [[TMP168]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] |
| // CHECK13: omp_offload.failed64: |
| // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174(i64 [[TMP132]], i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] |
| // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT65]] |
| // CHECK13: omp_offload.cont65: |
| // CHECK13-NEXT: [[TMP169:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 |
| // CHECK13-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP169]]) |
| // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 |
| // CHECK13-NEXT: [[TMP170:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 |
| // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP170]]) |
| // CHECK13-NEXT: [[TMP171:%.*]] = load i32, i32* [[RETVAL]], align 4 |
| // CHECK13-NEXT: ret i32 [[TMP171]] |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154 |
| // CHECK13-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* |
| // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined. |
| // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK13: omp.precond.then: |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] |
| // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK13: cond.true: |
| // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: br label [[COND_END:%.*]] |
| // CHECK13: cond.false: |
| // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: br label [[COND_END]] |
| // CHECK13: cond.end: |
| // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] |
| // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK13: omp.inner.for.cond: |
| // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13 |
| // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] |
| // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK13: omp.inner.for.body: |
| // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !13 |
| // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 |
| // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13 |
| // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 |
| // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !13 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK13: omp.inner.for.inc: |
| // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !13 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] |
| // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] |
| // CHECK13: omp.inner.for.end: |
| // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK13: omp.loop.exit: |
| // CHECK13-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) |
| // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 |
| // CHECK13-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK13: .omp.final.then: |
| // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0 |
| // CHECK13-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 |
| // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 |
| // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK13-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4 |
| // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK13: .omp.final.done: |
| // CHECK13-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK13: omp.precond.end: |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1 |
| // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK13: omp.precond.then: |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] |
| // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK13: cond.true: |
| // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: br label [[COND_END:%.*]] |
| // CHECK13: cond.false: |
| // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: br label [[COND_END]] |
| // CHECK13: cond.end: |
| // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] |
| // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK13: omp.inner.for.cond: |
| // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17 |
| // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] |
| // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK13: omp.inner.for.body: |
| // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !17 |
| // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !17 |
| // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 |
| // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] |
| // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !17 |
| // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK13: omp.body.continue: |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK13: omp.inner.for.inc: |
| // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 |
| // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] |
| // CHECK13: omp.inner.for.end: |
| // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK13: omp.loop.exit: |
| // CHECK13-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) |
| // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 |
| // CHECK13-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK13: .omp.final.then: |
| // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0 |
| // CHECK13-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 |
| // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 |
| // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] |
| // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4 |
| // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK13: .omp.final.done: |
| // CHECK13-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK13: omp.precond.end: |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159 |
| // CHECK13-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* |
| // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2 |
| // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK13: omp.precond.then: |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] |
| // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK13: cond.true: |
| // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: br label [[COND_END:%.*]] |
| // CHECK13: cond.false: |
| // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: br label [[COND_END]] |
| // CHECK13: cond.end: |
| // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] |
| // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK13: omp.inner.for.cond: |
| // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 |
| // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22 |
| // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] |
| // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK13: omp.inner.for.body: |
| // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !22 |
| // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 |
| // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22 |
| // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 |
| // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !22 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK13: omp.inner.for.inc: |
| // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 |
| // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !22 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] |
| // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] |
| // CHECK13: omp.inner.for.end: |
| // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK13: omp.loop.exit: |
| // CHECK13-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) |
| // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 |
| // CHECK13-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK13: .omp.final.then: |
| // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0 |
| // CHECK13-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 |
| // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 |
| // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK13-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4 |
| // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK13: .omp.final.done: |
| // CHECK13-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK13: omp.precond.end: |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3 |
| // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK13: omp.precond.then: |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] |
| // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK13: cond.true: |
| // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: br label [[COND_END:%.*]] |
| // CHECK13: cond.false: |
| // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: br label [[COND_END]] |
| // CHECK13: cond.end: |
| // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] |
| // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK13: omp.inner.for.cond: |
| // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 |
| // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25 |
| // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] |
| // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK13: omp.inner.for.body: |
| // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 |
| // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !25 |
| // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !25 |
| // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 |
| // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] |
| // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25 |
| // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK13: omp.body.continue: |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK13: omp.inner.for.inc: |
| // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 |
| // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 |
| // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] |
| // CHECK13: omp.inner.for.end: |
| // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK13: omp.loop.exit: |
| // CHECK13-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) |
| // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 |
| // CHECK13-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK13: .omp.final.then: |
| // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0 |
| // CHECK13-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 |
| // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 |
| // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] |
| // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4 |
| // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK13: .omp.final.done: |
| // CHECK13-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK13: omp.precond.end: |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164 |
| // CHECK13-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* |
| // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* |
| // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK13-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 |
| // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..5 |
| // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK13: omp.precond.then: |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK13-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) |
| // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] |
| // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK13: cond.true: |
| // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK13-NEXT: br label [[COND_END:%.*]] |
| // CHECK13: cond.false: |
| // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: br label [[COND_END]] |
| // CHECK13: cond.end: |
| // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] |
| // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK13: omp.inner.for.cond: |
| // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 |
| // CHECK13-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] |
| // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK13: omp.inner.for.body: |
| // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 |
| // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 |
| // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !28 |
| // CHECK13-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK13-NEXT: store i32 [[TMP21]], i32* [[CONV7]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !28 |
| // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]]), !llvm.access.group !28 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK13: omp.inner.for.inc: |
| // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] |
| // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] |
| // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] |
| // CHECK13-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] |
| // CHECK13-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] |
| // CHECK13: cond.true12: |
| // CHECK13-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: br label [[COND_END14:%.*]] |
| // CHECK13: cond.false13: |
| // CHECK13-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: br label [[COND_END14]] |
| // CHECK13: cond.end14: |
| // CHECK13-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ] |
| // CHECK13-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] |
| // CHECK13: omp.inner.for.end: |
| // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK13: omp.loop.exit: |
| // CHECK13-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) |
| // CHECK13-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 |
| // CHECK13-NEXT: br i1 [[TMP37]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK13: .omp.final.then: |
| // CHECK13-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[SUB16:%.*]] = sub nsw i32 [[TMP38]], 0 |
| // CHECK13-NEXT: [[DIV17:%.*]] = sdiv i32 [[SUB16]], 1 |
| // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV17]], 1 |
| // CHECK13-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK13-NEXT: store i32 [[ADD18]], i32* [[I4]], align 4 |
| // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK13: .omp.final.done: |
| // CHECK13-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK13: omp.precond.end: |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6 |
| // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK13: omp.precond.then: |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK13-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK13-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] |
| // CHECK13-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK13: cond.true: |
| // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK13-NEXT: br label [[COND_END:%.*]] |
| // CHECK13: cond.false: |
| // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: br label [[COND_END]] |
| // CHECK13: cond.end: |
| // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] |
| // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK13: omp.inner.for.cond: |
| // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31 |
| // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !31 |
| // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] |
| // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK13: omp.inner.for.body: |
| // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31 |
| // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK13-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !31 |
| // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !31 |
| // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 |
| // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] |
| // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !31 |
| // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK13: omp.body.continue: |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK13: omp.inner.for.inc: |
| // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31 |
| // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 |
| // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]] |
| // CHECK13: omp.inner.for.end: |
| // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK13: omp.loop.exit: |
| // CHECK13-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) |
| // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 |
| // CHECK13-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK13: .omp.final.then: |
| // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP25]], 0 |
| // CHECK13-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 |
| // CHECK13-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 |
| // CHECK13-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] |
| // CHECK13-NEXT: store i32 [[ADD13]], i32* [[I6]], align 4 |
| // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK13: .omp.final.done: |
| // CHECK13-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK13: omp.precond.end: |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169 |
| // CHECK13-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* |
| // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..8 |
| // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK13: omp.precond.then: |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] |
| // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK13: cond.true: |
| // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: br label [[COND_END:%.*]] |
| // CHECK13: cond.false: |
| // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: br label [[COND_END]] |
| // CHECK13: cond.end: |
| // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] |
| // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK13: omp.inner.for.cond: |
| // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34 |
| // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34 |
| // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] |
| // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK13: omp.inner.for.body: |
| // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !34 |
| // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 |
| // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34 |
| // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 |
| // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !34 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK13: omp.inner.for.inc: |
| // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34 |
| // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] |
| // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]] |
| // CHECK13: omp.inner.for.end: |
| // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK13: omp.loop.exit: |
| // CHECK13-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) |
| // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 |
| // CHECK13-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK13: .omp.final.then: |
| // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0 |
| // CHECK13-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 |
| // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 |
| // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK13-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4 |
| // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK13: .omp.final.done: |
| // CHECK13-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK13: omp.precond.end: |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..9 |
| // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK13: omp.precond.then: |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) |
| // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK13: omp.dispatch.cond: |
| // CHECK13-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 |
| // CHECK13-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 |
| // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK13: omp.dispatch.body: |
| // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK13: omp.inner.for.cond: |
| // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37 |
| // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !37 |
| // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] |
| // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK13: omp.inner.for.body: |
| // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37 |
| // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !37 |
| // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !37 |
| // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 |
| // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] |
| // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !37 |
| // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK13: omp.body.continue: |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK13: omp.inner.for.inc: |
| // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37 |
| // CHECK13-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 |
| // CHECK13-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]] |
| // CHECK13: omp.inner.for.end: |
| // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK13: omp.dispatch.inc: |
| // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK13: omp.dispatch.end: |
| // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 |
| // CHECK13-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK13: .omp.final.then: |
| // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0 |
| // CHECK13-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 |
| // CHECK13-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 |
| // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] |
| // CHECK13-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4 |
| // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK13: .omp.final.done: |
| // CHECK13-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK13: omp.precond.end: |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174 |
| // CHECK13-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* |
| // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* |
| // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK13-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 |
| // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11 |
| // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK13: omp.precond.then: |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] |
| // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK13: cond.true: |
| // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK13-NEXT: br label [[COND_END:%.*]] |
| // CHECK13: cond.false: |
| // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: br label [[COND_END]] |
| // CHECK13: cond.end: |
| // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] |
| // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK13: omp.inner.for.cond: |
| // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 |
| // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40 |
| // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] |
| // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK13: omp.inner.for.body: |
| // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !40 |
| // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 |
| // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40 |
| // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 |
| // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !40 |
| // CHECK13-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK13-NEXT: store i32 [[TMP20]], i32* [[CONV7]], align 4, !llvm.access.group !40 |
| // CHECK13-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !40 |
| // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]]), !llvm.access.group !40 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK13: omp.inner.for.inc: |
| // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 |
| // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !40 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] |
| // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]] |
| // CHECK13: omp.inner.for.end: |
| // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK13: omp.loop.exit: |
| // CHECK13-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) |
| // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 |
| // CHECK13-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK13: .omp.final.then: |
| // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP28]], 0 |
| // CHECK13-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 |
| // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV9]], 1 |
| // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK13-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4 |
| // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK13: .omp.final.done: |
| // CHECK13-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK13: omp.precond.end: |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..12 |
| // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK13: omp.precond.then: |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK13-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) |
| // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK13: omp.dispatch.cond: |
| // CHECK13-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 |
| // CHECK13-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 |
| // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK13: omp.dispatch.body: |
| // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK13: omp.inner.for.cond: |
| // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43 |
| // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !43 |
| // CHECK13-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] |
| // CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK13: omp.inner.for.body: |
| // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43 |
| // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK13-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !43 |
| // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !43 |
| // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 |
| // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] |
| // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !43 |
| // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK13: omp.body.continue: |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK13: omp.inner.for.inc: |
| // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43 |
| // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1 |
| // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]] |
| // CHECK13: omp.inner.for.end: |
| // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK13: omp.dispatch.inc: |
| // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK13: omp.dispatch.end: |
| // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 |
| // CHECK13-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK13: .omp.final.then: |
| // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK13-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP25]], 0 |
| // CHECK13-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1 |
| // CHECK13-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1 |
| // CHECK13-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] |
| // CHECK13-NEXT: store i32 [[ADD12]], i32* [[I6]], align 4 |
| // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK13: .omp.final.done: |
| // CHECK13-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK13: omp.precond.end: |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ |
| // CHECK13-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 |
| // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK13-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8 |
| // CHECK13-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK13-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[M_CASTED19:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8 |
| // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8 |
| // CHECK13-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 |
| // CHECK13-NEXT: store i32 10, i32* [[M]], align 4 |
| // CHECK13-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 |
| // CHECK13-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 |
| // CHECK13-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP4]], align 8 |
| // CHECK13-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) |
| // CHECK13-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK13-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK13-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] |
| // CHECK13: omp_offload.failed: |
| // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122([10 x i32]* [[A]]) #[[ATTR3]] |
| // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] |
| // CHECK13: omp_offload.cont: |
| // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 |
| // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 |
| // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP13]], align 8 |
| // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 |
| // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) |
| // CHECK13-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK13-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 |
| // CHECK13-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] |
| // CHECK13: omp_offload.failed5: |
| // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127([10 x i32]* [[A]]) #[[ATTR3]] |
| // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT6]] |
| // CHECK13: omp_offload.cont6: |
| // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 |
| // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32* |
| // CHECK13-NEXT: store i32 [[TMP18]], i32* [[CONV]], align 4 |
| // CHECK13-NEXT: [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8 |
| // CHECK13-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP19]], i64* [[TMP21]], align 8 |
| // CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP19]], i64* [[TMP23]], align 8 |
| // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP24]], align 8 |
| // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 |
| // CHECK13-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8 |
| // CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 |
| // CHECK13-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8 |
| // CHECK13-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP29]], align 8 |
| // CHECK13-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 |
| // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) |
| // CHECK13-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK13-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 |
| // CHECK13-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] |
| // CHECK13: omp_offload.failed11: |
| // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] |
| // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT12]] |
| // CHECK13: omp_offload.cont12: |
| // CHECK13-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8 |
| // CHECK13-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8 |
| // CHECK13-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP38]], align 8 |
| // CHECK13-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 |
| // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) |
| // CHECK13-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK13-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 |
| // CHECK13-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] |
| // CHECK13: omp_offload.failed17: |
| // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137([10 x i32]* [[A]]) #[[ATTR3]] |
| // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT18]] |
| // CHECK13: omp_offload.cont18: |
| // CHECK13-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 |
| // CHECK13-NEXT: [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32* |
| // CHECK13-NEXT: store i32 [[TMP43]], i32* [[CONV20]], align 4 |
| // CHECK13-NEXT: [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8 |
| // CHECK13-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP44]], i64* [[TMP46]], align 8 |
| // CHECK13-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64* |
| // CHECK13-NEXT: store i64 [[TMP44]], i64* [[TMP48]], align 8 |
| // CHECK13-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP49]], align 8 |
| // CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 |
| // CHECK13-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8 |
| // CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 |
| // CHECK13-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8 |
| // CHECK13-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 |
| // CHECK13-NEXT: store i8* null, i8** [[TMP54]], align 8 |
| // CHECK13-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 |
| // CHECK13-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 |
| // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) |
| // CHECK13-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK13-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 |
| // CHECK13-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]] |
| // CHECK13: omp_offload.failed25: |
| // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] |
| // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT26]] |
| // CHECK13: omp_offload.cont26: |
| // CHECK13-NEXT: ret i32 0 |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122 |
| // CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..14 |
| // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 |
| // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK13: cond.true: |
| // CHECK13-NEXT: br label [[COND_END:%.*]] |
| // CHECK13: cond.false: |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: br label [[COND_END]] |
| // CHECK13: cond.end: |
| // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK13: omp.inner.for.cond: |
| // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46 |
| // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46 |
| // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK13: omp.inner.for.body: |
| // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !46 |
| // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46 |
| // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !46 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK13: omp.inner.for.inc: |
| // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46 |
| // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !46 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]] |
| // CHECK13: omp.inner.for.end: |
| // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK13: omp.loop.exit: |
| // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK13-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK13: .omp.final.then: |
| // CHECK13-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK13: .omp.final.done: |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..15 |
| // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 |
| // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK13: cond.true: |
| // CHECK13-NEXT: br label [[COND_END:%.*]] |
| // CHECK13: cond.false: |
| // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: br label [[COND_END]] |
| // CHECK13: cond.end: |
| // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK13: omp.inner.for.cond: |
| // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49 |
| // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !49 |
| // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK13: omp.inner.for.body: |
| // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49 |
| // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !49 |
| // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !49 |
| // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 |
| // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] |
| // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !49 |
| // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK13: omp.body.continue: |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK13: omp.inner.for.inc: |
| // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49 |
| // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]] |
| // CHECK13: omp.inner.for.end: |
| // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK13: omp.loop.exit: |
| // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK13-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK13: .omp.final.then: |
| // CHECK13-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK13: .omp.final.done: |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127 |
| // CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..17 |
| // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 |
| // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK13: cond.true: |
| // CHECK13-NEXT: br label [[COND_END:%.*]] |
| // CHECK13: cond.false: |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: br label [[COND_END]] |
| // CHECK13: cond.end: |
| // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK13: omp.inner.for.cond: |
| // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52 |
| // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52 |
| // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK13: omp.inner.for.body: |
| // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !52 |
| // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52 |
| // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !52 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK13: omp.inner.for.inc: |
| // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52 |
| // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !52 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]] |
| // CHECK13: omp.inner.for.end: |
| // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK13: omp.loop.exit: |
| // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK13-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK13: .omp.final.then: |
| // CHECK13-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK13: .omp.final.done: |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..18 |
| // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 |
| // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK13: cond.true: |
| // CHECK13-NEXT: br label [[COND_END:%.*]] |
| // CHECK13: cond.false: |
| // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: br label [[COND_END]] |
| // CHECK13: cond.end: |
| // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK13: omp.inner.for.cond: |
| // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55 |
| // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !55 |
| // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK13: omp.inner.for.body: |
| // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55 |
| // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !55 |
| // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !55 |
| // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 |
| // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] |
| // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !55 |
| // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK13: omp.body.continue: |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK13: omp.inner.for.inc: |
| // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55 |
| // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]] |
| // CHECK13: omp.inner.for.end: |
| // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK13: omp.loop.exit: |
| // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK13-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK13: .omp.final.then: |
| // CHECK13-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK13: .omp.final.done: |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132 |
| // CHECK13-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* |
| // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 |
| // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..21 |
| // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 |
| // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK13: cond.true: |
| // CHECK13-NEXT: br label [[COND_END:%.*]] |
| // CHECK13: cond.false: |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: br label [[COND_END]] |
| // CHECK13: cond.end: |
| // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK13: omp.inner.for.cond: |
| // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58 |
| // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58 |
| // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK13: omp.inner.for.body: |
| // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !58 |
| // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58 |
| // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !58 |
| // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK13-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4, !llvm.access.group !58 |
| // CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !58 |
| // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]), !llvm.access.group !58 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK13: omp.inner.for.inc: |
| // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58 |
| // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !58 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] |
| // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]] |
| // CHECK13: omp.inner.for.end: |
| // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK13: omp.loop.exit: |
| // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 |
| // CHECK13-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK13: .omp.final.then: |
| // CHECK13-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK13: .omp.final.done: |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..22 |
| // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) |
| // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK13: omp.dispatch.cond: |
| // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] |
| // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK13: cond.true: |
| // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK13-NEXT: br label [[COND_END:%.*]] |
| // CHECK13: cond.false: |
| // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: br label [[COND_END]] |
| // CHECK13: cond.end: |
| // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] |
| // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] |
| // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK13: omp.dispatch.body: |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK13: omp.inner.for.cond: |
| // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 |
| // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61 |
| // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] |
| // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK13: omp.inner.for.body: |
| // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 |
| // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !61 |
| // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !61 |
| // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 |
| // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] |
| // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !61 |
| // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK13: omp.body.continue: |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK13: omp.inner.for.inc: |
| // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 |
| // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 |
| // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]] |
| // CHECK13: omp.inner.for.end: |
| // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK13: omp.dispatch.inc: |
| // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] |
| // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] |
| // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK13: omp.dispatch.end: |
| // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) |
| // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 |
| // CHECK13-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK13: .omp.final.then: |
| // CHECK13-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK13: .omp.final.done: |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137 |
| // CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..25 |
| // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 |
| // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK13: cond.true: |
| // CHECK13-NEXT: br label [[COND_END:%.*]] |
| // CHECK13: cond.false: |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: br label [[COND_END]] |
| // CHECK13: cond.end: |
| // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK13: omp.inner.for.cond: |
| // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64 |
| // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !64 |
| // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK13: omp.inner.for.body: |
| // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !64 |
| // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !64 |
| // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !64 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK13: omp.inner.for.inc: |
| // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64 |
| // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !64 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP65:![0-9]+]] |
| // CHECK13: omp.inner.for.end: |
| // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK13: omp.loop.exit: |
| // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK13-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK13: .omp.final.then: |
| // CHECK13-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK13: .omp.final.done: |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..26 |
| // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) |
| // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK13: omp.dispatch.cond: |
| // CHECK13-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK13: omp.dispatch.body: |
| // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK13: omp.inner.for.cond: |
| // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67 |
| // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !67 |
| // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] |
| // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK13: omp.inner.for.body: |
| // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67 |
| // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !67 |
| // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !67 |
| // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 |
| // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] |
| // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !67 |
| // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK13: omp.body.continue: |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK13: omp.inner.for.inc: |
| // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67 |
| // CHECK13-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 |
| // CHECK13-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP68:![0-9]+]] |
| // CHECK13: omp.inner.for.end: |
| // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK13: omp.dispatch.inc: |
| // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK13: omp.dispatch.end: |
| // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK13-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK13: .omp.final.then: |
| // CHECK13-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK13: .omp.final.done: |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142 |
| // CHECK13-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* |
| // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 |
| // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..29 |
| // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 |
| // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK13: cond.true: |
| // CHECK13-NEXT: br label [[COND_END:%.*]] |
| // CHECK13: cond.false: |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: br label [[COND_END]] |
| // CHECK13: cond.end: |
| // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK13: omp.inner.for.cond: |
| // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70 |
| // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !70 |
| // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK13: omp.inner.for.body: |
| // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !70 |
| // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !70 |
| // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !70 |
| // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK13-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4, !llvm.access.group !70 |
| // CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !70 |
| // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]), !llvm.access.group !70 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK13: omp.inner.for.inc: |
| // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70 |
| // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !70 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] |
| // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP71:![0-9]+]] |
| // CHECK13: omp.inner.for.end: |
| // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK13: omp.loop.exit: |
| // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 |
| // CHECK13-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK13: .omp.final.then: |
| // CHECK13-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK13: .omp.final.done: |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..30 |
| // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK13-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK13-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 |
| // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) |
| // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK13: omp.dispatch.cond: |
| // CHECK13-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 |
| // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK13: omp.dispatch.body: |
| // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK13-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK13: omp.inner.for.cond: |
| // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73 |
| // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !73 |
| // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] |
| // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK13: omp.inner.for.body: |
| // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73 |
| // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 |
| // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !73 |
| // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !73 |
| // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 |
| // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] |
| // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !73 |
| // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK13: omp.body.continue: |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK13: omp.inner.for.inc: |
| // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73 |
| // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1 |
| // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73 |
| // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP74:![0-9]+]] |
| // CHECK13: omp.inner.for.end: |
| // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK13: omp.dispatch.inc: |
| // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK13: omp.dispatch.end: |
| // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK13-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 |
| // CHECK13-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK13: .omp.final.then: |
| // CHECK13-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK13: .omp.final.done: |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg |
| // CHECK13-SAME: () #[[ATTR5:[0-9]+]] { |
| // CHECK13-NEXT: entry: |
| // CHECK13-NEXT: call void @__tgt_register_requires(i64 1) |
| // CHECK13-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@main |
| // CHECK14-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 |
| // CHECK14-NEXT: [[N:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 |
| // CHECK14-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[M:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 |
| // CHECK14-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8 |
| // CHECK14-NEXT: [[_TMP25:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8 |
| // CHECK14-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[M_CASTED49:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[N_CASTED51:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8 |
| // CHECK14-NEXT: [[_TMP57:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 |
| // CHECK14-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 |
| // CHECK14-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 |
| // CHECK14-NEXT: store i32 100, i32* [[N]], align 4 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK14-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 |
| // CHECK14-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() |
| // CHECK14-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 |
| // CHECK14-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 |
| // CHECK14-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 |
| // CHECK14-NEXT: store i32 10, i32* [[M]], align 4 |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* |
| // CHECK14-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 |
| // CHECK14-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 |
| // CHECK14-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8 |
| // CHECK14-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8 |
| // CHECK14-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 |
| // CHECK14-NEXT: store i64 4, i64* [[TMP10]], align 8 |
| // CHECK14-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP11]], align 8 |
| // CHECK14-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 |
| // CHECK14-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 |
| // CHECK14-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 |
| // CHECK14-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 |
| // CHECK14-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 |
| // CHECK14-NEXT: store i64 8, i64* [[TMP16]], align 8 |
| // CHECK14-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP17]], align 8 |
| // CHECK14-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 |
| // CHECK14-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** |
| // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8 |
| // CHECK14-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 |
| // CHECK14-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** |
| // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8 |
| // CHECK14-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 |
| // CHECK14-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8 |
| // CHECK14-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP23]], align 8 |
| // CHECK14-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 |
| // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 |
| // CHECK14-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 |
| // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) |
| // CHECK14-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK14-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 |
| // CHECK14-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] |
| // CHECK14: omp_offload.failed: |
| // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] |
| // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT]] |
| // CHECK14: omp_offload.cont: |
| // CHECK14-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK14-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* |
| // CHECK14-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4 |
| // CHECK14-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8 |
| // CHECK14-NEXT: [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4 |
| // CHECK14-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP34]], i64* [[TMP37]], align 8 |
| // CHECK14-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8 |
| // CHECK14-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 |
| // CHECK14-NEXT: store i64 4, i64* [[TMP40]], align 8 |
| // CHECK14-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP41]], align 8 |
| // CHECK14-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 |
| // CHECK14-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP43]], align 8 |
| // CHECK14-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 |
| // CHECK14-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP45]], align 8 |
| // CHECK14-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1 |
| // CHECK14-NEXT: store i64 8, i64* [[TMP46]], align 8 |
| // CHECK14-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP47]], align 8 |
| // CHECK14-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 |
| // CHECK14-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** |
| // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 |
| // CHECK14-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 |
| // CHECK14-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32** |
| // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP51]], align 8 |
| // CHECK14-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 |
| // CHECK14-NEXT: store i64 [[TMP35]], i64* [[TMP52]], align 8 |
| // CHECK14-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP53]], align 8 |
| // CHECK14-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP57:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4 |
| // CHECK14-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 |
| // CHECK14-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0 |
| // CHECK14-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 |
| // CHECK14-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 |
| // CHECK14-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 |
| // CHECK14-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 |
| // CHECK14-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1 |
| // CHECK14-NEXT: [[TMP60:%.*]] = zext i32 [[ADD15]] to i64 |
| // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]]) |
| // CHECK14-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK14-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0 |
| // CHECK14-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] |
| // CHECK14: omp_offload.failed16: |
| // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] |
| // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT17]] |
| // CHECK14: omp_offload.cont17: |
| // CHECK14-NEXT: [[TMP63:%.*]] = load i32, i32* [[M]], align 4 |
| // CHECK14-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32* |
| // CHECK14-NEXT: store i32 [[TMP63]], i32* [[CONV18]], align 4 |
| // CHECK14-NEXT: [[TMP64:%.*]] = load i64, i64* [[M_CASTED]], align 8 |
| // CHECK14-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK14-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* |
| // CHECK14-NEXT: store i32 [[TMP65]], i32* [[CONV20]], align 4 |
| // CHECK14-NEXT: [[TMP66:%.*]] = load i64, i64* [[N_CASTED19]], align 8 |
| // CHECK14-NEXT: [[TMP67:%.*]] = mul nuw i64 [[TMP1]], 4 |
| // CHECK14-NEXT: [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP64]], i64* [[TMP69]], align 8 |
| // CHECK14-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP64]], i64* [[TMP71]], align 8 |
| // CHECK14-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 |
| // CHECK14-NEXT: store i64 4, i64* [[TMP72]], align 8 |
| // CHECK14-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP73]], align 8 |
| // CHECK14-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 |
| // CHECK14-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP66]], i64* [[TMP75]], align 8 |
| // CHECK14-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 |
| // CHECK14-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP66]], i64* [[TMP77]], align 8 |
| // CHECK14-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 1 |
| // CHECK14-NEXT: store i64 4, i64* [[TMP78]], align 8 |
| // CHECK14-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP79]], align 8 |
| // CHECK14-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2 |
| // CHECK14-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP81]], align 8 |
| // CHECK14-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2 |
| // CHECK14-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP83]], align 8 |
| // CHECK14-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2 |
| // CHECK14-NEXT: store i64 8, i64* [[TMP84]], align 8 |
| // CHECK14-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP85]], align 8 |
| // CHECK14-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3 |
| // CHECK14-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32** |
| // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP87]], align 8 |
| // CHECK14-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3 |
| // CHECK14-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32** |
| // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP89]], align 8 |
| // CHECK14-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3 |
| // CHECK14-NEXT: store i64 [[TMP67]], i64* [[TMP90]], align 8 |
| // CHECK14-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP91]], align 8 |
| // CHECK14-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP95:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP95]], i32* [[DOTCAPTURE_EXPR_26]], align 4 |
| // CHECK14-NEXT: [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 |
| // CHECK14-NEXT: [[SUB28:%.*]] = sub nsw i32 [[TMP96]], 0 |
| // CHECK14-NEXT: [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1 |
| // CHECK14-NEXT: [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1 |
| // CHECK14-NEXT: store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 |
| // CHECK14-NEXT: [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 |
| // CHECK14-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP97]], 1 |
| // CHECK14-NEXT: [[TMP98:%.*]] = zext i32 [[ADD31]] to i64 |
| // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP98]]) |
| // CHECK14-NEXT: [[TMP99:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164.region_id, i32 4, i8** [[TMP92]], i8** [[TMP93]], i64* [[TMP94]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK14-NEXT: [[TMP100:%.*]] = icmp ne i32 [[TMP99]], 0 |
| // CHECK14-NEXT: br i1 [[TMP100]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] |
| // CHECK14: omp_offload.failed32: |
| // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164(i64 [[TMP64]], i64 [[TMP66]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] |
| // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT33]] |
| // CHECK14: omp_offload.cont33: |
| // CHECK14-NEXT: [[TMP101:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK14-NEXT: [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32* |
| // CHECK14-NEXT: store i32 [[TMP101]], i32* [[CONV35]], align 4 |
| // CHECK14-NEXT: [[TMP102:%.*]] = load i64, i64* [[N_CASTED34]], align 8 |
| // CHECK14-NEXT: [[TMP103:%.*]] = mul nuw i64 [[TMP1]], 4 |
| // CHECK14-NEXT: [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP102]], i64* [[TMP105]], align 8 |
| // CHECK14-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP102]], i64* [[TMP107]], align 8 |
| // CHECK14-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 |
| // CHECK14-NEXT: store i64 4, i64* [[TMP108]], align 8 |
| // CHECK14-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP109]], align 8 |
| // CHECK14-NEXT: [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1 |
| // CHECK14-NEXT: [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP111]], align 8 |
| // CHECK14-NEXT: [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1 |
| // CHECK14-NEXT: [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP113]], align 8 |
| // CHECK14-NEXT: [[TMP114:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 1 |
| // CHECK14-NEXT: store i64 8, i64* [[TMP114]], align 8 |
| // CHECK14-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP115]], align 8 |
| // CHECK14-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2 |
| // CHECK14-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32** |
| // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP117]], align 8 |
| // CHECK14-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2 |
| // CHECK14-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32** |
| // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP119]], align 8 |
| // CHECK14-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2 |
| // CHECK14-NEXT: store i64 [[TMP103]], i64* [[TMP120]], align 8 |
| // CHECK14-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP121]], align 8 |
| // CHECK14-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP125:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP125]], i32* [[DOTCAPTURE_EXPR_41]], align 4 |
| // CHECK14-NEXT: [[TMP126:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 |
| // CHECK14-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP126]], 0 |
| // CHECK14-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 |
| // CHECK14-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 |
| // CHECK14-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4 |
| // CHECK14-NEXT: [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4 |
| // CHECK14-NEXT: [[ADD46:%.*]] = add nsw i32 [[TMP127]], 1 |
| // CHECK14-NEXT: [[TMP128:%.*]] = zext i32 [[ADD46]] to i64 |
| // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP128]]) |
| // CHECK14-NEXT: [[TMP129:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169.region_id, i32 3, i8** [[TMP122]], i8** [[TMP123]], i64* [[TMP124]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK14-NEXT: [[TMP130:%.*]] = icmp ne i32 [[TMP129]], 0 |
| // CHECK14-NEXT: br i1 [[TMP130]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] |
| // CHECK14: omp_offload.failed47: |
| // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169(i64 [[TMP102]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] |
| // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT48]] |
| // CHECK14: omp_offload.cont48: |
| // CHECK14-NEXT: [[TMP131:%.*]] = load i32, i32* [[M]], align 4 |
| // CHECK14-NEXT: [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32* |
| // CHECK14-NEXT: store i32 [[TMP131]], i32* [[CONV50]], align 4 |
| // CHECK14-NEXT: [[TMP132:%.*]] = load i64, i64* [[M_CASTED49]], align 8 |
| // CHECK14-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK14-NEXT: [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32* |
| // CHECK14-NEXT: store i32 [[TMP133]], i32* [[CONV52]], align 4 |
| // CHECK14-NEXT: [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8 |
| // CHECK14-NEXT: [[TMP135:%.*]] = mul nuw i64 [[TMP1]], 4 |
| // CHECK14-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP132]], i64* [[TMP137]], align 8 |
| // CHECK14-NEXT: [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP132]], i64* [[TMP139]], align 8 |
| // CHECK14-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 |
| // CHECK14-NEXT: store i64 4, i64* [[TMP140]], align 8 |
| // CHECK14-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP141]], align 8 |
| // CHECK14-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1 |
| // CHECK14-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP134]], i64* [[TMP143]], align 8 |
| // CHECK14-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1 |
| // CHECK14-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP134]], i64* [[TMP145]], align 8 |
| // CHECK14-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 1 |
| // CHECK14-NEXT: store i64 4, i64* [[TMP146]], align 8 |
| // CHECK14-NEXT: [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP147]], align 8 |
| // CHECK14-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2 |
| // CHECK14-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP149]], align 8 |
| // CHECK14-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2 |
| // CHECK14-NEXT: [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP151]], align 8 |
| // CHECK14-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 2 |
| // CHECK14-NEXT: store i64 8, i64* [[TMP152]], align 8 |
| // CHECK14-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP153]], align 8 |
| // CHECK14-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3 |
| // CHECK14-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32** |
| // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP155]], align 8 |
| // CHECK14-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3 |
| // CHECK14-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32** |
| // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP157]], align 8 |
| // CHECK14-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3 |
| // CHECK14-NEXT: store i64 [[TMP135]], i64* [[TMP158]], align 8 |
| // CHECK14-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP159]], align 8 |
| // CHECK14-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP163:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_58]], align 4 |
| // CHECK14-NEXT: [[TMP164:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4 |
| // CHECK14-NEXT: [[SUB60:%.*]] = sub nsw i32 [[TMP164]], 0 |
| // CHECK14-NEXT: [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1 |
| // CHECK14-NEXT: [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1 |
| // CHECK14-NEXT: store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4 |
| // CHECK14-NEXT: [[TMP165:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4 |
| // CHECK14-NEXT: [[ADD63:%.*]] = add nsw i32 [[TMP165]], 1 |
| // CHECK14-NEXT: [[TMP166:%.*]] = zext i32 [[ADD63]] to i64 |
| // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP166]]) |
| // CHECK14-NEXT: [[TMP167:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174.region_id, i32 4, i8** [[TMP160]], i8** [[TMP161]], i64* [[TMP162]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK14-NEXT: [[TMP168:%.*]] = icmp ne i32 [[TMP167]], 0 |
| // CHECK14-NEXT: br i1 [[TMP168]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] |
| // CHECK14: omp_offload.failed64: |
| // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174(i64 [[TMP132]], i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] |
| // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT65]] |
| // CHECK14: omp_offload.cont65: |
| // CHECK14-NEXT: [[TMP169:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 |
| // CHECK14-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP169]]) |
| // CHECK14-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 |
| // CHECK14-NEXT: [[TMP170:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 |
| // CHECK14-NEXT: call void @llvm.stackrestore(i8* [[TMP170]]) |
| // CHECK14-NEXT: [[TMP171:%.*]] = load i32, i32* [[RETVAL]], align 4 |
| // CHECK14-NEXT: ret i32 [[TMP171]] |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154 |
| // CHECK14-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* |
| // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined. |
| // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK14: omp.precond.then: |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] |
| // CHECK14-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK14: cond.true: |
| // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: br label [[COND_END:%.*]] |
| // CHECK14: cond.false: |
| // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: br label [[COND_END]] |
| // CHECK14: cond.end: |
| // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] |
| // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK14: omp.inner.for.cond: |
| // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13 |
| // CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] |
| // CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK14: omp.inner.for.body: |
| // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !13 |
| // CHECK14-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 |
| // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13 |
| // CHECK14-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 |
| // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !13 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK14: omp.inner.for.inc: |
| // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !13 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] |
| // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] |
| // CHECK14: omp.inner.for.end: |
| // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK14: omp.loop.exit: |
| // CHECK14-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) |
| // CHECK14-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 |
| // CHECK14-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK14: .omp.final.then: |
| // CHECK14-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0 |
| // CHECK14-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 |
| // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 |
| // CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK14-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4 |
| // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK14: .omp.final.done: |
| // CHECK14-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK14: omp.precond.end: |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..1 |
| // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK14: omp.precond.then: |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] |
| // CHECK14-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK14: cond.true: |
| // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: br label [[COND_END:%.*]] |
| // CHECK14: cond.false: |
| // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: br label [[COND_END]] |
| // CHECK14: cond.end: |
| // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] |
| // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK14: omp.inner.for.cond: |
| // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17 |
| // CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] |
| // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK14: omp.inner.for.body: |
| // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK14-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !17 |
| // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !17 |
| // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 |
| // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] |
| // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !17 |
| // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK14: omp.body.continue: |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK14: omp.inner.for.inc: |
| // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 |
| // CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] |
| // CHECK14: omp.inner.for.end: |
| // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK14: omp.loop.exit: |
| // CHECK14-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) |
| // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 |
| // CHECK14-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK14: .omp.final.then: |
| // CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0 |
| // CHECK14-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 |
| // CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 |
| // CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] |
| // CHECK14-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4 |
| // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK14: .omp.final.done: |
| // CHECK14-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK14: omp.precond.end: |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159 |
| // CHECK14-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* |
| // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..2 |
| // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK14: omp.precond.then: |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] |
| // CHECK14-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK14: cond.true: |
| // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: br label [[COND_END:%.*]] |
| // CHECK14: cond.false: |
| // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: br label [[COND_END]] |
| // CHECK14: cond.end: |
| // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] |
| // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK14: omp.inner.for.cond: |
| // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 |
| // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22 |
| // CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] |
| // CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK14: omp.inner.for.body: |
| // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !22 |
| // CHECK14-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 |
| // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22 |
| // CHECK14-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 |
| // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !22 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK14: omp.inner.for.inc: |
| // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 |
| // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !22 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] |
| // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] |
| // CHECK14: omp.inner.for.end: |
| // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK14: omp.loop.exit: |
| // CHECK14-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) |
| // CHECK14-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 |
| // CHECK14-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK14: .omp.final.then: |
| // CHECK14-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0 |
| // CHECK14-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 |
| // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 |
| // CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK14-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4 |
| // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK14: .omp.final.done: |
| // CHECK14-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK14: omp.precond.end: |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..3 |
| // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK14: omp.precond.then: |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] |
| // CHECK14-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK14: cond.true: |
| // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: br label [[COND_END:%.*]] |
| // CHECK14: cond.false: |
| // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: br label [[COND_END]] |
| // CHECK14: cond.end: |
| // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] |
| // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK14: omp.inner.for.cond: |
| // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 |
| // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25 |
| // CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] |
| // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK14: omp.inner.for.body: |
| // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 |
| // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK14-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !25 |
| // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !25 |
| // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 |
| // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] |
| // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25 |
| // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK14: omp.body.continue: |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK14: omp.inner.for.inc: |
| // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 |
| // CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 |
| // CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] |
| // CHECK14: omp.inner.for.end: |
| // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK14: omp.loop.exit: |
| // CHECK14-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) |
| // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 |
| // CHECK14-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK14: .omp.final.then: |
| // CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0 |
| // CHECK14-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 |
| // CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 |
| // CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] |
| // CHECK14-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4 |
| // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK14: .omp.final.done: |
| // CHECK14-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK14: omp.precond.end: |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164 |
| // CHECK14-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* |
| // CHECK14-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* |
| // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK14-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK14-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 |
| // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..5 |
| // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK14-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK14-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK14: omp.precond.then: |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK14-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) |
| // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK14-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] |
| // CHECK14-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK14: cond.true: |
| // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK14-NEXT: br label [[COND_END:%.*]] |
| // CHECK14: cond.false: |
| // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: br label [[COND_END]] |
| // CHECK14: cond.end: |
| // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] |
| // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK14: omp.inner.for.cond: |
| // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 |
| // CHECK14-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] |
| // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK14: omp.inner.for.body: |
| // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 |
| // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 |
| // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !28 |
| // CHECK14-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK14-NEXT: store i32 [[TMP21]], i32* [[CONV7]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !28 |
| // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]]), !llvm.access.group !28 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK14: omp.inner.for.inc: |
| // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] |
| // CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] |
| // CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] |
| // CHECK14-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] |
| // CHECK14-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] |
| // CHECK14: cond.true12: |
| // CHECK14-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: br label [[COND_END14:%.*]] |
| // CHECK14: cond.false13: |
| // CHECK14-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: br label [[COND_END14]] |
| // CHECK14: cond.end14: |
| // CHECK14-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ] |
| // CHECK14-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] |
| // CHECK14: omp.inner.for.end: |
| // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK14: omp.loop.exit: |
| // CHECK14-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) |
| // CHECK14-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 |
| // CHECK14-NEXT: br i1 [[TMP37]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK14: .omp.final.then: |
| // CHECK14-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[SUB16:%.*]] = sub nsw i32 [[TMP38]], 0 |
| // CHECK14-NEXT: [[DIV17:%.*]] = sdiv i32 [[SUB16]], 1 |
| // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV17]], 1 |
| // CHECK14-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK14-NEXT: store i32 [[ADD18]], i32* [[I4]], align 4 |
| // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK14: .omp.final.done: |
| // CHECK14-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK14: omp.precond.end: |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..6 |
| // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I6:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK14-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK14-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK14: omp.precond.then: |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK14-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK14-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] |
| // CHECK14-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK14: cond.true: |
| // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK14-NEXT: br label [[COND_END:%.*]] |
| // CHECK14: cond.false: |
| // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: br label [[COND_END]] |
| // CHECK14: cond.end: |
| // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] |
| // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK14: omp.inner.for.cond: |
| // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31 |
| // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !31 |
| // CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] |
| // CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK14: omp.inner.for.body: |
| // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31 |
| // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK14-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !31 |
| // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !31 |
| // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 |
| // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] |
| // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !31 |
| // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK14: omp.body.continue: |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK14: omp.inner.for.inc: |
| // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31 |
| // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 |
| // CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]] |
| // CHECK14: omp.inner.for.end: |
| // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK14: omp.loop.exit: |
| // CHECK14-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) |
| // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 |
| // CHECK14-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK14: .omp.final.then: |
| // CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP25]], 0 |
| // CHECK14-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 |
| // CHECK14-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 |
| // CHECK14-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] |
| // CHECK14-NEXT: store i32 [[ADD13]], i32* [[I6]], align 4 |
| // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK14: .omp.final.done: |
| // CHECK14-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK14: omp.precond.end: |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169 |
| // CHECK14-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* |
| // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..8 |
| // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK14: omp.precond.then: |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] |
| // CHECK14-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK14: cond.true: |
| // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: br label [[COND_END:%.*]] |
| // CHECK14: cond.false: |
| // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: br label [[COND_END]] |
| // CHECK14: cond.end: |
| // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] |
| // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK14: omp.inner.for.cond: |
| // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34 |
| // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34 |
| // CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] |
| // CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK14: omp.inner.for.body: |
| // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !34 |
| // CHECK14-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 |
| // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34 |
| // CHECK14-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 |
| // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !34 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK14: omp.inner.for.inc: |
| // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34 |
| // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] |
| // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]] |
| // CHECK14: omp.inner.for.end: |
| // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK14: omp.loop.exit: |
| // CHECK14-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) |
| // CHECK14-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 |
| // CHECK14-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK14: .omp.final.then: |
| // CHECK14-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0 |
| // CHECK14-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 |
| // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 |
| // CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK14-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4 |
| // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK14: .omp.final.done: |
| // CHECK14-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK14: omp.precond.end: |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..9 |
| // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK14: omp.precond.then: |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) |
| // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK14: omp.dispatch.cond: |
| // CHECK14-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 |
| // CHECK14-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 |
| // CHECK14-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK14: omp.dispatch.body: |
| // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK14: omp.inner.for.cond: |
| // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37 |
| // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !37 |
| // CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] |
| // CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK14: omp.inner.for.body: |
| // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37 |
| // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK14-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !37 |
| // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !37 |
| // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 |
| // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] |
| // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !37 |
| // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK14: omp.body.continue: |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK14: omp.inner.for.inc: |
| // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37 |
| // CHECK14-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 |
| // CHECK14-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]] |
| // CHECK14: omp.inner.for.end: |
| // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK14: omp.dispatch.inc: |
| // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK14: omp.dispatch.end: |
| // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 |
| // CHECK14-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK14: .omp.final.then: |
| // CHECK14-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0 |
| // CHECK14-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 |
| // CHECK14-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 |
| // CHECK14-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] |
| // CHECK14-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4 |
| // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK14: .omp.final.done: |
| // CHECK14-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK14: omp.precond.end: |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174 |
| // CHECK14-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* |
| // CHECK14-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* |
| // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK14-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK14-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 |
| // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..11 |
| // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK14-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK14-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK14: omp.precond.then: |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK14-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] |
| // CHECK14-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK14: cond.true: |
| // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK14-NEXT: br label [[COND_END:%.*]] |
| // CHECK14: cond.false: |
| // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: br label [[COND_END]] |
| // CHECK14: cond.end: |
| // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] |
| // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK14: omp.inner.for.cond: |
| // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 |
| // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40 |
| // CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] |
| // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK14: omp.inner.for.body: |
| // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !40 |
| // CHECK14-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 |
| // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40 |
| // CHECK14-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 |
| // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !40 |
| // CHECK14-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK14-NEXT: store i32 [[TMP20]], i32* [[CONV7]], align 4, !llvm.access.group !40 |
| // CHECK14-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !40 |
| // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]]), !llvm.access.group !40 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK14: omp.inner.for.inc: |
| // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 |
| // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !40 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] |
| // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]] |
| // CHECK14: omp.inner.for.end: |
| // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK14: omp.loop.exit: |
| // CHECK14-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) |
| // CHECK14-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 |
| // CHECK14-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK14: .omp.final.then: |
| // CHECK14-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP28]], 0 |
| // CHECK14-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 |
| // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV9]], 1 |
| // CHECK14-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK14-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4 |
| // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK14: .omp.final.done: |
| // CHECK14-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK14: omp.precond.end: |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..12 |
| // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I6:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK14-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK14-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK14: omp.precond.then: |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK14-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) |
| // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK14: omp.dispatch.cond: |
| // CHECK14-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 |
| // CHECK14-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 |
| // CHECK14-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK14: omp.dispatch.body: |
| // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK14: omp.inner.for.cond: |
| // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43 |
| // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !43 |
| // CHECK14-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] |
| // CHECK14-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK14: omp.inner.for.body: |
| // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43 |
| // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK14-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !43 |
| // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !43 |
| // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 |
| // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] |
| // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !43 |
| // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK14: omp.body.continue: |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK14: omp.inner.for.inc: |
| // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43 |
| // CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1 |
| // CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]] |
| // CHECK14: omp.inner.for.end: |
| // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK14: omp.dispatch.inc: |
| // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK14: omp.dispatch.end: |
| // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 |
| // CHECK14-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK14: .omp.final.then: |
| // CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK14-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP25]], 0 |
| // CHECK14-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1 |
| // CHECK14-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1 |
| // CHECK14-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] |
| // CHECK14-NEXT: store i32 [[ADD12]], i32* [[I6]], align 4 |
| // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK14: .omp.final.done: |
| // CHECK14-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK14: omp.precond.end: |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ |
| // CHECK14-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 |
| // CHECK14-NEXT: [[M:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK14-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8 |
| // CHECK14-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK14-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[M_CASTED19:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8 |
| // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8 |
| // CHECK14-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 |
| // CHECK14-NEXT: store i32 10, i32* [[M]], align 4 |
| // CHECK14-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 |
| // CHECK14-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 |
| // CHECK14-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP4]], align 8 |
| // CHECK14-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) |
| // CHECK14-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK14-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK14-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] |
| // CHECK14: omp_offload.failed: |
| // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122([10 x i32]* [[A]]) #[[ATTR3]] |
| // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT]] |
| // CHECK14: omp_offload.cont: |
| // CHECK14-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 |
| // CHECK14-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 |
| // CHECK14-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP13]], align 8 |
| // CHECK14-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 |
| // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) |
| // CHECK14-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK14-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 |
| // CHECK14-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] |
| // CHECK14: omp_offload.failed5: |
| // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127([10 x i32]* [[A]]) #[[ATTR3]] |
| // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT6]] |
| // CHECK14: omp_offload.cont6: |
| // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 |
| // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32* |
| // CHECK14-NEXT: store i32 [[TMP18]], i32* [[CONV]], align 4 |
| // CHECK14-NEXT: [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8 |
| // CHECK14-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP19]], i64* [[TMP21]], align 8 |
| // CHECK14-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP19]], i64* [[TMP23]], align 8 |
| // CHECK14-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP24]], align 8 |
| // CHECK14-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 |
| // CHECK14-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8 |
| // CHECK14-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 |
| // CHECK14-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8 |
| // CHECK14-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP29]], align 8 |
| // CHECK14-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 |
| // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) |
| // CHECK14-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK14-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 |
| // CHECK14-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] |
| // CHECK14: omp_offload.failed11: |
| // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] |
| // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT12]] |
| // CHECK14: omp_offload.cont12: |
| // CHECK14-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8 |
| // CHECK14-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8 |
| // CHECK14-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP38]], align 8 |
| // CHECK14-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 |
| // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) |
| // CHECK14-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK14-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 |
| // CHECK14-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] |
| // CHECK14: omp_offload.failed17: |
| // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137([10 x i32]* [[A]]) #[[ATTR3]] |
| // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT18]] |
| // CHECK14: omp_offload.cont18: |
| // CHECK14-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 |
| // CHECK14-NEXT: [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32* |
| // CHECK14-NEXT: store i32 [[TMP43]], i32* [[CONV20]], align 4 |
| // CHECK14-NEXT: [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8 |
| // CHECK14-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP44]], i64* [[TMP46]], align 8 |
| // CHECK14-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64* |
| // CHECK14-NEXT: store i64 [[TMP44]], i64* [[TMP48]], align 8 |
| // CHECK14-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP49]], align 8 |
| // CHECK14-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 |
| // CHECK14-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8 |
| // CHECK14-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 |
| // CHECK14-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8 |
| // CHECK14-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 |
| // CHECK14-NEXT: store i8* null, i8** [[TMP54]], align 8 |
| // CHECK14-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 |
| // CHECK14-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 |
| // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) |
| // CHECK14-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK14-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 |
| // CHECK14-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]] |
| // CHECK14: omp_offload.failed25: |
| // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] |
| // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT26]] |
| // CHECK14: omp_offload.cont26: |
| // CHECK14-NEXT: ret i32 0 |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122 |
| // CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..14 |
| // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 |
| // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK14: cond.true: |
| // CHECK14-NEXT: br label [[COND_END:%.*]] |
| // CHECK14: cond.false: |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: br label [[COND_END]] |
| // CHECK14: cond.end: |
| // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK14: omp.inner.for.cond: |
| // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46 |
| // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46 |
| // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK14: omp.inner.for.body: |
| // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !46 |
| // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46 |
| // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !46 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK14: omp.inner.for.inc: |
| // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46 |
| // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !46 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]] |
| // CHECK14: omp.inner.for.end: |
| // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK14: omp.loop.exit: |
| // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK14-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK14: .omp.final.then: |
| // CHECK14-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK14: .omp.final.done: |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..15 |
| // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 |
| // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK14: cond.true: |
| // CHECK14-NEXT: br label [[COND_END:%.*]] |
| // CHECK14: cond.false: |
| // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: br label [[COND_END]] |
| // CHECK14: cond.end: |
| // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK14: omp.inner.for.cond: |
| // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49 |
| // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !49 |
| // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK14: omp.inner.for.body: |
| // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49 |
| // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !49 |
| // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !49 |
| // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 |
| // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] |
| // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !49 |
| // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK14: omp.body.continue: |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK14: omp.inner.for.inc: |
| // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49 |
| // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]] |
| // CHECK14: omp.inner.for.end: |
| // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK14: omp.loop.exit: |
| // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK14-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK14: .omp.final.then: |
| // CHECK14-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK14: .omp.final.done: |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127 |
| // CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..17 |
| // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 |
| // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK14: cond.true: |
| // CHECK14-NEXT: br label [[COND_END:%.*]] |
| // CHECK14: cond.false: |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: br label [[COND_END]] |
| // CHECK14: cond.end: |
| // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK14: omp.inner.for.cond: |
| // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52 |
| // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52 |
| // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK14: omp.inner.for.body: |
| // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !52 |
| // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52 |
| // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !52 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK14: omp.inner.for.inc: |
| // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52 |
| // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !52 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]] |
| // CHECK14: omp.inner.for.end: |
| // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK14: omp.loop.exit: |
| // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK14-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK14: .omp.final.then: |
| // CHECK14-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK14: .omp.final.done: |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..18 |
| // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 |
| // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK14: cond.true: |
| // CHECK14-NEXT: br label [[COND_END:%.*]] |
| // CHECK14: cond.false: |
| // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: br label [[COND_END]] |
| // CHECK14: cond.end: |
| // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK14: omp.inner.for.cond: |
| // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55 |
| // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !55 |
| // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK14: omp.inner.for.body: |
| // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55 |
| // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !55 |
| // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !55 |
| // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 |
| // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] |
| // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !55 |
| // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK14: omp.body.continue: |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK14: omp.inner.for.inc: |
| // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55 |
| // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]] |
| // CHECK14: omp.inner.for.end: |
| // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK14: omp.loop.exit: |
| // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK14-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK14: .omp.final.then: |
| // CHECK14-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK14: .omp.final.done: |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132 |
| // CHECK14-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* |
| // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK14-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 |
| // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..21 |
| // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 |
| // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK14: cond.true: |
| // CHECK14-NEXT: br label [[COND_END:%.*]] |
| // CHECK14: cond.false: |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: br label [[COND_END]] |
| // CHECK14: cond.end: |
| // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK14: omp.inner.for.cond: |
| // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58 |
| // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58 |
| // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK14: omp.inner.for.body: |
| // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !58 |
| // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58 |
| // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !58 |
| // CHECK14-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK14-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4, !llvm.access.group !58 |
| // CHECK14-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !58 |
| // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]), !llvm.access.group !58 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK14: omp.inner.for.inc: |
| // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58 |
| // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !58 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] |
| // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]] |
| // CHECK14: omp.inner.for.end: |
| // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK14: omp.loop.exit: |
| // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 |
| // CHECK14-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK14: .omp.final.then: |
| // CHECK14-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK14: .omp.final.done: |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..22 |
| // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) |
| // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK14: omp.dispatch.cond: |
| // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] |
| // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK14: cond.true: |
| // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK14-NEXT: br label [[COND_END:%.*]] |
| // CHECK14: cond.false: |
| // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: br label [[COND_END]] |
| // CHECK14: cond.end: |
| // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] |
| // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] |
| // CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK14: omp.dispatch.body: |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK14: omp.inner.for.cond: |
| // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 |
| // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61 |
| // CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] |
| // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK14: omp.inner.for.body: |
| // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 |
| // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !61 |
| // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !61 |
| // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 |
| // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] |
| // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !61 |
| // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK14: omp.body.continue: |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK14: omp.inner.for.inc: |
| // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 |
| // CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 |
| // CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]] |
| // CHECK14: omp.inner.for.end: |
| // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK14: omp.dispatch.inc: |
| // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] |
| // CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] |
| // CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK14: omp.dispatch.end: |
| // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) |
| // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 |
| // CHECK14-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK14: .omp.final.then: |
| // CHECK14-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK14: .omp.final.done: |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137 |
| // CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..25 |
| // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 |
| // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK14: cond.true: |
| // CHECK14-NEXT: br label [[COND_END:%.*]] |
| // CHECK14: cond.false: |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: br label [[COND_END]] |
| // CHECK14: cond.end: |
| // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK14: omp.inner.for.cond: |
| // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64 |
| // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !64 |
| // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK14: omp.inner.for.body: |
| // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !64 |
| // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !64 |
| // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !64 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK14: omp.inner.for.inc: |
| // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64 |
| // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !64 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP65:![0-9]+]] |
| // CHECK14: omp.inner.for.end: |
| // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK14: omp.loop.exit: |
| // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK14-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK14: .omp.final.then: |
| // CHECK14-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK14: .omp.final.done: |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..26 |
| // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) |
| // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK14: omp.dispatch.cond: |
| // CHECK14-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK14-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK14: omp.dispatch.body: |
| // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK14: omp.inner.for.cond: |
| // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67 |
| // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !67 |
| // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] |
| // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK14: omp.inner.for.body: |
| // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67 |
| // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !67 |
| // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !67 |
| // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 |
| // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] |
| // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !67 |
| // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK14: omp.body.continue: |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK14: omp.inner.for.inc: |
| // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67 |
| // CHECK14-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 |
| // CHECK14-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP68:![0-9]+]] |
| // CHECK14: omp.inner.for.end: |
| // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK14: omp.dispatch.inc: |
| // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK14: omp.dispatch.end: |
| // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK14-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK14: .omp.final.then: |
| // CHECK14-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK14: .omp.final.done: |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142 |
| // CHECK14-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* |
| // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK14-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK14-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 |
| // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..29 |
| // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 |
| // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK14: cond.true: |
| // CHECK14-NEXT: br label [[COND_END:%.*]] |
| // CHECK14: cond.false: |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: br label [[COND_END]] |
| // CHECK14: cond.end: |
| // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK14: omp.inner.for.cond: |
| // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70 |
| // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !70 |
| // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK14: omp.inner.for.body: |
| // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !70 |
| // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !70 |
| // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !70 |
| // CHECK14-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK14-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4, !llvm.access.group !70 |
| // CHECK14-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !70 |
| // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]), !llvm.access.group !70 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK14: omp.inner.for.inc: |
| // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70 |
| // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !70 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] |
| // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP71:![0-9]+]] |
| // CHECK14: omp.inner.for.end: |
| // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK14: omp.loop.exit: |
| // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 |
| // CHECK14-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK14: .omp.final.then: |
| // CHECK14-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK14: .omp.final.done: |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..30 |
| // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK14-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK14-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 |
| // CHECK14-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) |
| // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK14: omp.dispatch.cond: |
| // CHECK14-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 |
| // CHECK14-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK14: omp.dispatch.body: |
| // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK14-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK14: omp.inner.for.cond: |
| // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73 |
| // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !73 |
| // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] |
| // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK14: omp.inner.for.body: |
| // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73 |
| // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 |
| // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !73 |
| // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !73 |
| // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 |
| // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] |
| // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !73 |
| // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK14: omp.body.continue: |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK14: omp.inner.for.inc: |
| // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73 |
| // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1 |
| // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73 |
| // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP74:![0-9]+]] |
| // CHECK14: omp.inner.for.end: |
| // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK14: omp.dispatch.inc: |
| // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK14: omp.dispatch.end: |
| // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK14-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 |
| // CHECK14-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK14: .omp.final.then: |
| // CHECK14-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK14: .omp.final.done: |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK14-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg |
| // CHECK14-SAME: () #[[ATTR5:[0-9]+]] { |
| // CHECK14-NEXT: entry: |
| // CHECK14-NEXT: call void @__tgt_register_requires(i64 1) |
| // CHECK14-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@main |
| // CHECK15-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 |
| // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 |
| // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 |
| // CHECK15-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8 |
| // CHECK15-NEXT: [[_TMP25:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8 |
| // CHECK15-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[M_CASTED49:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[N_CASTED51:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8 |
| // CHECK15-NEXT: [[_TMP57:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 |
| // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 |
| // CHECK15-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 |
| // CHECK15-NEXT: store i32 100, i32* [[N]], align 4 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK15-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 |
| // CHECK15-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() |
| // CHECK15-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 |
| // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 |
| // CHECK15-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 |
| // CHECK15-NEXT: store i32 10, i32* [[M]], align 4 |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* |
| // CHECK15-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 |
| // CHECK15-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 |
| // CHECK15-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8 |
| // CHECK15-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8 |
| // CHECK15-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 |
| // CHECK15-NEXT: store i64 4, i64* [[TMP10]], align 8 |
| // CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP11]], align 8 |
| // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 |
| // CHECK15-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 |
| // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 |
| // CHECK15-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 |
| // CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 |
| // CHECK15-NEXT: store i64 8, i64* [[TMP16]], align 8 |
| // CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP17]], align 8 |
| // CHECK15-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 |
| // CHECK15-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** |
| // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8 |
| // CHECK15-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 |
| // CHECK15-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** |
| // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8 |
| // CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 |
| // CHECK15-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8 |
| // CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP23]], align 8 |
| // CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 |
| // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 |
| // CHECK15-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 |
| // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) |
| // CHECK15-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK15-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 |
| // CHECK15-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] |
| // CHECK15: omp_offload.failed: |
| // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] |
| // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]] |
| // CHECK15: omp_offload.cont: |
| // CHECK15-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK15-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* |
| // CHECK15-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4 |
| // CHECK15-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8 |
| // CHECK15-NEXT: [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4 |
| // CHECK15-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP34]], i64* [[TMP37]], align 8 |
| // CHECK15-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8 |
| // CHECK15-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 |
| // CHECK15-NEXT: store i64 4, i64* [[TMP40]], align 8 |
| // CHECK15-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP41]], align 8 |
| // CHECK15-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 |
| // CHECK15-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP1]], i64* [[TMP43]], align 8 |
| // CHECK15-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 |
| // CHECK15-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP1]], i64* [[TMP45]], align 8 |
| // CHECK15-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1 |
| // CHECK15-NEXT: store i64 8, i64* [[TMP46]], align 8 |
| // CHECK15-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP47]], align 8 |
| // CHECK15-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 |
| // CHECK15-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** |
| // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 |
| // CHECK15-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 |
| // CHECK15-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32** |
| // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP51]], align 8 |
| // CHECK15-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 |
| // CHECK15-NEXT: store i64 [[TMP35]], i64* [[TMP52]], align 8 |
| // CHECK15-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP53]], align 8 |
| // CHECK15-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP57:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4 |
| // CHECK15-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 |
| // CHECK15-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0 |
| // CHECK15-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 |
| // CHECK15-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 |
| // CHECK15-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 |
| // CHECK15-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 |
| // CHECK15-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1 |
| // CHECK15-NEXT: [[TMP60:%.*]] = zext i32 [[ADD15]] to i64 |
| // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]]) |
| // CHECK15-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK15-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0 |
| // CHECK15-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] |
| // CHECK15: omp_offload.failed16: |
| // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] |
| // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT17]] |
| // CHECK15: omp_offload.cont17: |
| // CHECK15-NEXT: [[TMP63:%.*]] = load i32, i32* [[M]], align 4 |
| // CHECK15-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32* |
| // CHECK15-NEXT: store i32 [[TMP63]], i32* [[CONV18]], align 4 |
| // CHECK15-NEXT: [[TMP64:%.*]] = load i64, i64* [[M_CASTED]], align 8 |
| // CHECK15-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK15-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* |
| // CHECK15-NEXT: store i32 [[TMP65]], i32* [[CONV20]], align 4 |
| // CHECK15-NEXT: [[TMP66:%.*]] = load i64, i64* [[N_CASTED19]], align 8 |
| // CHECK15-NEXT: [[TMP67:%.*]] = mul nuw i64 [[TMP1]], 4 |
| // CHECK15-NEXT: [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP64]], i64* [[TMP69]], align 8 |
| // CHECK15-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP64]], i64* [[TMP71]], align 8 |
| // CHECK15-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 |
| // CHECK15-NEXT: store i64 4, i64* [[TMP72]], align 8 |
| // CHECK15-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP73]], align 8 |
| // CHECK15-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 |
| // CHECK15-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP66]], i64* [[TMP75]], align 8 |
| // CHECK15-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 |
| // CHECK15-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP66]], i64* [[TMP77]], align 8 |
| // CHECK15-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 1 |
| // CHECK15-NEXT: store i64 4, i64* [[TMP78]], align 8 |
| // CHECK15-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP79]], align 8 |
| // CHECK15-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2 |
| // CHECK15-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP1]], i64* [[TMP81]], align 8 |
| // CHECK15-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2 |
| // CHECK15-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP1]], i64* [[TMP83]], align 8 |
| // CHECK15-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2 |
| // CHECK15-NEXT: store i64 8, i64* [[TMP84]], align 8 |
| // CHECK15-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP85]], align 8 |
| // CHECK15-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3 |
| // CHECK15-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32** |
| // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP87]], align 8 |
| // CHECK15-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3 |
| // CHECK15-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32** |
| // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP89]], align 8 |
| // CHECK15-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3 |
| // CHECK15-NEXT: store i64 [[TMP67]], i64* [[TMP90]], align 8 |
| // CHECK15-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP91]], align 8 |
| // CHECK15-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP95:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP95]], i32* [[DOTCAPTURE_EXPR_26]], align 4 |
| // CHECK15-NEXT: [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 |
| // CHECK15-NEXT: [[SUB28:%.*]] = sub nsw i32 [[TMP96]], 0 |
| // CHECK15-NEXT: [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1 |
| // CHECK15-NEXT: [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1 |
| // CHECK15-NEXT: store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 |
| // CHECK15-NEXT: [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 |
| // CHECK15-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP97]], 1 |
| // CHECK15-NEXT: [[TMP98:%.*]] = zext i32 [[ADD31]] to i64 |
| // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP98]]) |
| // CHECK15-NEXT: [[TMP99:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164.region_id, i32 4, i8** [[TMP92]], i8** [[TMP93]], i64* [[TMP94]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK15-NEXT: [[TMP100:%.*]] = icmp ne i32 [[TMP99]], 0 |
| // CHECK15-NEXT: br i1 [[TMP100]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] |
| // CHECK15: omp_offload.failed32: |
| // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164(i64 [[TMP64]], i64 [[TMP66]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] |
| // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT33]] |
| // CHECK15: omp_offload.cont33: |
| // CHECK15-NEXT: [[TMP101:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK15-NEXT: [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32* |
| // CHECK15-NEXT: store i32 [[TMP101]], i32* [[CONV35]], align 4 |
| // CHECK15-NEXT: [[TMP102:%.*]] = load i64, i64* [[N_CASTED34]], align 8 |
| // CHECK15-NEXT: [[TMP103:%.*]] = mul nuw i64 [[TMP1]], 4 |
| // CHECK15-NEXT: [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP102]], i64* [[TMP105]], align 8 |
| // CHECK15-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP102]], i64* [[TMP107]], align 8 |
| // CHECK15-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 |
| // CHECK15-NEXT: store i64 4, i64* [[TMP108]], align 8 |
| // CHECK15-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP109]], align 8 |
| // CHECK15-NEXT: [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1 |
| // CHECK15-NEXT: [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP1]], i64* [[TMP111]], align 8 |
| // CHECK15-NEXT: [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1 |
| // CHECK15-NEXT: [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP1]], i64* [[TMP113]], align 8 |
| // CHECK15-NEXT: [[TMP114:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 1 |
| // CHECK15-NEXT: store i64 8, i64* [[TMP114]], align 8 |
| // CHECK15-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP115]], align 8 |
| // CHECK15-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2 |
| // CHECK15-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32** |
| // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP117]], align 8 |
| // CHECK15-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2 |
| // CHECK15-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32** |
| // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP119]], align 8 |
| // CHECK15-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2 |
| // CHECK15-NEXT: store i64 [[TMP103]], i64* [[TMP120]], align 8 |
| // CHECK15-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP121]], align 8 |
| // CHECK15-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP125:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP125]], i32* [[DOTCAPTURE_EXPR_41]], align 4 |
| // CHECK15-NEXT: [[TMP126:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 |
| // CHECK15-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP126]], 0 |
| // CHECK15-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 |
| // CHECK15-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 |
| // CHECK15-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4 |
| // CHECK15-NEXT: [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4 |
| // CHECK15-NEXT: [[ADD46:%.*]] = add nsw i32 [[TMP127]], 1 |
| // CHECK15-NEXT: [[TMP128:%.*]] = zext i32 [[ADD46]] to i64 |
| // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP128]]) |
| // CHECK15-NEXT: [[TMP129:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169.region_id, i32 3, i8** [[TMP122]], i8** [[TMP123]], i64* [[TMP124]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK15-NEXT: [[TMP130:%.*]] = icmp ne i32 [[TMP129]], 0 |
| // CHECK15-NEXT: br i1 [[TMP130]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] |
| // CHECK15: omp_offload.failed47: |
| // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169(i64 [[TMP102]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] |
| // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT48]] |
| // CHECK15: omp_offload.cont48: |
| // CHECK15-NEXT: [[TMP131:%.*]] = load i32, i32* [[M]], align 4 |
| // CHECK15-NEXT: [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32* |
| // CHECK15-NEXT: store i32 [[TMP131]], i32* [[CONV50]], align 4 |
| // CHECK15-NEXT: [[TMP132:%.*]] = load i64, i64* [[M_CASTED49]], align 8 |
| // CHECK15-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK15-NEXT: [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32* |
| // CHECK15-NEXT: store i32 [[TMP133]], i32* [[CONV52]], align 4 |
| // CHECK15-NEXT: [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8 |
| // CHECK15-NEXT: [[TMP135:%.*]] = mul nuw i64 [[TMP1]], 4 |
| // CHECK15-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP132]], i64* [[TMP137]], align 8 |
| // CHECK15-NEXT: [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP132]], i64* [[TMP139]], align 8 |
| // CHECK15-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 |
| // CHECK15-NEXT: store i64 4, i64* [[TMP140]], align 8 |
| // CHECK15-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP141]], align 8 |
| // CHECK15-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1 |
| // CHECK15-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP134]], i64* [[TMP143]], align 8 |
| // CHECK15-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1 |
| // CHECK15-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP134]], i64* [[TMP145]], align 8 |
| // CHECK15-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 1 |
| // CHECK15-NEXT: store i64 4, i64* [[TMP146]], align 8 |
| // CHECK15-NEXT: [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP147]], align 8 |
| // CHECK15-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2 |
| // CHECK15-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP1]], i64* [[TMP149]], align 8 |
| // CHECK15-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2 |
| // CHECK15-NEXT: [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP1]], i64* [[TMP151]], align 8 |
| // CHECK15-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 2 |
| // CHECK15-NEXT: store i64 8, i64* [[TMP152]], align 8 |
| // CHECK15-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP153]], align 8 |
| // CHECK15-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3 |
| // CHECK15-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32** |
| // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP155]], align 8 |
| // CHECK15-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3 |
| // CHECK15-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32** |
| // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP157]], align 8 |
| // CHECK15-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3 |
| // CHECK15-NEXT: store i64 [[TMP135]], i64* [[TMP158]], align 8 |
| // CHECK15-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP159]], align 8 |
| // CHECK15-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP163:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_58]], align 4 |
| // CHECK15-NEXT: [[TMP164:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4 |
| // CHECK15-NEXT: [[SUB60:%.*]] = sub nsw i32 [[TMP164]], 0 |
| // CHECK15-NEXT: [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1 |
| // CHECK15-NEXT: [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1 |
| // CHECK15-NEXT: store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4 |
| // CHECK15-NEXT: [[TMP165:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4 |
| // CHECK15-NEXT: [[ADD63:%.*]] = add nsw i32 [[TMP165]], 1 |
| // CHECK15-NEXT: [[TMP166:%.*]] = zext i32 [[ADD63]] to i64 |
| // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP166]]) |
| // CHECK15-NEXT: [[TMP167:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174.region_id, i32 4, i8** [[TMP160]], i8** [[TMP161]], i64* [[TMP162]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK15-NEXT: [[TMP168:%.*]] = icmp ne i32 [[TMP167]], 0 |
| // CHECK15-NEXT: br i1 [[TMP168]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] |
| // CHECK15: omp_offload.failed64: |
| // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174(i64 [[TMP132]], i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] |
| // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT65]] |
| // CHECK15: omp_offload.cont65: |
| // CHECK15-NEXT: [[TMP169:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 |
| // CHECK15-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP169]]) |
| // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 |
| // CHECK15-NEXT: [[TMP170:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 |
| // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP170]]) |
| // CHECK15-NEXT: [[TMP171:%.*]] = load i32, i32* [[RETVAL]], align 4 |
| // CHECK15-NEXT: ret i32 [[TMP171]] |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154 |
| // CHECK15-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* |
| // CHECK15-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined. |
| // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK15: omp.precond.then: |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] |
| // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK15: cond.true: |
| // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: br label [[COND_END:%.*]] |
| // CHECK15: cond.false: |
| // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: br label [[COND_END]] |
| // CHECK15: cond.end: |
| // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] |
| // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK15: omp.inner.for.cond: |
| // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13 |
| // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] |
| // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK15: omp.inner.for.body: |
| // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !13 |
| // CHECK15-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 |
| // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13 |
| // CHECK15-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 |
| // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !13 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK15: omp.inner.for.inc: |
| // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !13 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] |
| // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] |
| // CHECK15: omp.inner.for.end: |
| // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK15: omp.loop.exit: |
| // CHECK15-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) |
| // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 |
| // CHECK15-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK15: .omp.final.then: |
| // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0 |
| // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 |
| // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 |
| // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK15-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4 |
| // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK15: .omp.final.done: |
| // CHECK15-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK15: omp.precond.end: |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..1 |
| // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK15: omp.precond.then: |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK15-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK15-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] |
| // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK15: cond.true: |
| // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: br label [[COND_END:%.*]] |
| // CHECK15: cond.false: |
| // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: br label [[COND_END]] |
| // CHECK15: cond.end: |
| // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] |
| // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK15: omp.inner.for.cond: |
| // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17 |
| // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] |
| // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK15: omp.inner.for.body: |
| // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !17 |
| // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !17 |
| // CHECK15-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 |
| // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] |
| // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !17 |
| // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK15: omp.body.continue: |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK15: omp.inner.for.inc: |
| // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 |
| // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] |
| // CHECK15: omp.inner.for.end: |
| // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK15: omp.loop.exit: |
| // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) |
| // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 |
| // CHECK15-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK15: .omp.final.then: |
| // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0 |
| // CHECK15-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 |
| // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 |
| // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] |
| // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4 |
| // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK15: .omp.final.done: |
| // CHECK15-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK15: omp.precond.end: |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159 |
| // CHECK15-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* |
| // CHECK15-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..2 |
| // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK15: omp.precond.then: |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] |
| // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK15: cond.true: |
| // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: br label [[COND_END:%.*]] |
| // CHECK15: cond.false: |
| // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: br label [[COND_END]] |
| // CHECK15: cond.end: |
| // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] |
| // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK15: omp.inner.for.cond: |
| // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 |
| // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22 |
| // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] |
| // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK15: omp.inner.for.body: |
| // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !22 |
| // CHECK15-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 |
| // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22 |
| // CHECK15-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 |
| // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !22 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK15: omp.inner.for.inc: |
| // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 |
| // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !22 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] |
| // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] |
| // CHECK15: omp.inner.for.end: |
| // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK15: omp.loop.exit: |
| // CHECK15-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) |
| // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 |
| // CHECK15-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK15: .omp.final.then: |
| // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0 |
| // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 |
| // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 |
| // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK15-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4 |
| // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK15: .omp.final.done: |
| // CHECK15-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK15: omp.precond.end: |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..3 |
| // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK15: omp.precond.then: |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK15-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK15-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] |
| // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK15: cond.true: |
| // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: br label [[COND_END:%.*]] |
| // CHECK15: cond.false: |
| // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: br label [[COND_END]] |
| // CHECK15: cond.end: |
| // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] |
| // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK15: omp.inner.for.cond: |
| // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 |
| // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25 |
| // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] |
| // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK15: omp.inner.for.body: |
| // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 |
| // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !25 |
| // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !25 |
| // CHECK15-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 |
| // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] |
| // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25 |
| // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK15: omp.body.continue: |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK15: omp.inner.for.inc: |
| // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 |
| // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 |
| // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] |
| // CHECK15: omp.inner.for.end: |
| // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK15: omp.loop.exit: |
| // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) |
| // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 |
| // CHECK15-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK15: .omp.final.then: |
| // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0 |
| // CHECK15-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 |
| // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 |
| // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] |
| // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4 |
| // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK15: .omp.final.done: |
| // CHECK15-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK15: omp.precond.end: |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164 |
| // CHECK15-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* |
| // CHECK15-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* |
| // CHECK15-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK15-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 |
| // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..5 |
| // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK15: omp.precond.then: |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK15-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) |
| // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] |
| // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK15: cond.true: |
| // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK15-NEXT: br label [[COND_END:%.*]] |
| // CHECK15: cond.false: |
| // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: br label [[COND_END]] |
| // CHECK15: cond.end: |
| // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] |
| // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK15: omp.inner.for.cond: |
| // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 |
| // CHECK15-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] |
| // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK15: omp.inner.for.body: |
| // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 |
| // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 |
| // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !28 |
| // CHECK15-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK15-NEXT: store i32 [[TMP21]], i32* [[CONV7]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !28 |
| // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]]), !llvm.access.group !28 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK15: omp.inner.for.inc: |
| // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] |
| // CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] |
| // CHECK15-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] |
| // CHECK15-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] |
| // CHECK15-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] |
| // CHECK15: cond.true12: |
| // CHECK15-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: br label [[COND_END14:%.*]] |
| // CHECK15: cond.false13: |
| // CHECK15-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: br label [[COND_END14]] |
| // CHECK15: cond.end14: |
| // CHECK15-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ] |
| // CHECK15-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] |
| // CHECK15: omp.inner.for.end: |
| // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK15: omp.loop.exit: |
| // CHECK15-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) |
| // CHECK15-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 |
| // CHECK15-NEXT: br i1 [[TMP37]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK15: .omp.final.then: |
| // CHECK15-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[SUB16:%.*]] = sub nsw i32 [[TMP38]], 0 |
| // CHECK15-NEXT: [[DIV17:%.*]] = sdiv i32 [[SUB16]], 1 |
| // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV17]], 1 |
| // CHECK15-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK15-NEXT: store i32 [[ADD18]], i32* [[I4]], align 4 |
| // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK15: .omp.final.done: |
| // CHECK15-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK15: omp.precond.end: |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..6 |
| // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK15: omp.precond.then: |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK15-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK15-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK15-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] |
| // CHECK15-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK15: cond.true: |
| // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK15-NEXT: br label [[COND_END:%.*]] |
| // CHECK15: cond.false: |
| // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: br label [[COND_END]] |
| // CHECK15: cond.end: |
| // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] |
| // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK15: omp.inner.for.cond: |
| // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31 |
| // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !31 |
| // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] |
| // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK15: omp.inner.for.body: |
| // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31 |
| // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK15-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !31 |
| // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !31 |
| // CHECK15-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 |
| // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] |
| // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !31 |
| // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK15: omp.body.continue: |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK15: omp.inner.for.inc: |
| // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31 |
| // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 |
| // CHECK15-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]] |
| // CHECK15: omp.inner.for.end: |
| // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK15: omp.loop.exit: |
| // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) |
| // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 |
| // CHECK15-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK15: .omp.final.then: |
| // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP25]], 0 |
| // CHECK15-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 |
| // CHECK15-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 |
| // CHECK15-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] |
| // CHECK15-NEXT: store i32 [[ADD13]], i32* [[I6]], align 4 |
| // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK15: .omp.final.done: |
| // CHECK15-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK15: omp.precond.end: |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169 |
| // CHECK15-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* |
| // CHECK15-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..8 |
| // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK15: omp.precond.then: |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] |
| // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK15: cond.true: |
| // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: br label [[COND_END:%.*]] |
| // CHECK15: cond.false: |
| // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: br label [[COND_END]] |
| // CHECK15: cond.end: |
| // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] |
| // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK15: omp.inner.for.cond: |
| // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34 |
| // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34 |
| // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] |
| // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK15: omp.inner.for.body: |
| // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !34 |
| // CHECK15-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 |
| // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34 |
| // CHECK15-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 |
| // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !34 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK15: omp.inner.for.inc: |
| // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34 |
| // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] |
| // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]] |
| // CHECK15: omp.inner.for.end: |
| // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK15: omp.loop.exit: |
| // CHECK15-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) |
| // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 |
| // CHECK15-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK15: .omp.final.then: |
| // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0 |
| // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 |
| // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 |
| // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK15-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4 |
| // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK15: .omp.final.done: |
| // CHECK15-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK15: omp.precond.end: |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..9 |
| // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK15: omp.precond.then: |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK15-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK15-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) |
| // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK15: omp.dispatch.cond: |
| // CHECK15-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 |
| // CHECK15-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 |
| // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK15: omp.dispatch.body: |
| // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK15: omp.inner.for.cond: |
| // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37 |
| // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !37 |
| // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] |
| // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK15: omp.inner.for.body: |
| // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37 |
| // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !37 |
| // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !37 |
| // CHECK15-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 |
| // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] |
| // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !37 |
| // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK15: omp.body.continue: |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK15: omp.inner.for.inc: |
| // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37 |
| // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 |
| // CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]] |
| // CHECK15: omp.inner.for.end: |
| // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK15: omp.dispatch.inc: |
| // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK15: omp.dispatch.end: |
| // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 |
| // CHECK15-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK15: .omp.final.then: |
| // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0 |
| // CHECK15-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 |
| // CHECK15-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 |
| // CHECK15-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] |
| // CHECK15-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4 |
| // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK15: .omp.final.done: |
| // CHECK15-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK15: omp.precond.end: |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174 |
| // CHECK15-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* |
| // CHECK15-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* |
| // CHECK15-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK15-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 |
| // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..11 |
| // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK15: omp.precond.then: |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] |
| // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK15: cond.true: |
| // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK15-NEXT: br label [[COND_END:%.*]] |
| // CHECK15: cond.false: |
| // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: br label [[COND_END]] |
| // CHECK15: cond.end: |
| // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] |
| // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK15: omp.inner.for.cond: |
| // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 |
| // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40 |
| // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] |
| // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK15: omp.inner.for.body: |
| // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !40 |
| // CHECK15-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 |
| // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40 |
| // CHECK15-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 |
| // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !40 |
| // CHECK15-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK15-NEXT: store i32 [[TMP20]], i32* [[CONV7]], align 4, !llvm.access.group !40 |
| // CHECK15-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !40 |
| // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]]), !llvm.access.group !40 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK15: omp.inner.for.inc: |
| // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 |
| // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !40 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] |
| // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]] |
| // CHECK15: omp.inner.for.end: |
| // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK15: omp.loop.exit: |
| // CHECK15-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) |
| // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 |
| // CHECK15-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK15: .omp.final.then: |
| // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP28]], 0 |
| // CHECK15-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 |
| // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV9]], 1 |
| // CHECK15-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK15-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4 |
| // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK15: .omp.final.done: |
| // CHECK15-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK15: omp.precond.end: |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..12 |
| // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK15: omp.precond.then: |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK15-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK15-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) |
| // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK15: omp.dispatch.cond: |
| // CHECK15-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 |
| // CHECK15-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 |
| // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK15: omp.dispatch.body: |
| // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK15: omp.inner.for.cond: |
| // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43 |
| // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !43 |
| // CHECK15-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] |
| // CHECK15-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK15: omp.inner.for.body: |
| // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43 |
| // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK15-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !43 |
| // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !43 |
| // CHECK15-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 |
| // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] |
| // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !43 |
| // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK15: omp.body.continue: |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK15: omp.inner.for.inc: |
| // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43 |
| // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1 |
| // CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]] |
| // CHECK15: omp.inner.for.end: |
| // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK15: omp.dispatch.inc: |
| // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK15: omp.dispatch.end: |
| // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 |
| // CHECK15-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK15: .omp.final.then: |
| // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK15-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP25]], 0 |
| // CHECK15-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1 |
| // CHECK15-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1 |
| // CHECK15-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] |
| // CHECK15-NEXT: store i32 [[ADD12]], i32* [[I6]], align 4 |
| // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK15: .omp.final.done: |
| // CHECK15-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK15: omp.precond.end: |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ |
| // CHECK15-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 |
| // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK15-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8 |
| // CHECK15-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK15-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[M_CASTED19:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8 |
| // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8 |
| // CHECK15-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 |
| // CHECK15-NEXT: store i32 10, i32* [[M]], align 4 |
| // CHECK15-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 |
| // CHECK15-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 |
| // CHECK15-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP4]], align 8 |
| // CHECK15-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) |
| // CHECK15-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK15-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK15-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] |
| // CHECK15: omp_offload.failed: |
| // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122([10 x i32]* [[A]]) #[[ATTR3]] |
| // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]] |
| // CHECK15: omp_offload.cont: |
| // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 |
| // CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 |
| // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP13]], align 8 |
| // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 |
| // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) |
| // CHECK15-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK15-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 |
| // CHECK15-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] |
| // CHECK15: omp_offload.failed5: |
| // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127([10 x i32]* [[A]]) #[[ATTR3]] |
| // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT6]] |
| // CHECK15: omp_offload.cont6: |
| // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 |
| // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32* |
| // CHECK15-NEXT: store i32 [[TMP18]], i32* [[CONV]], align 4 |
| // CHECK15-NEXT: [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8 |
| // CHECK15-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP19]], i64* [[TMP21]], align 8 |
| // CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP19]], i64* [[TMP23]], align 8 |
| // CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP24]], align 8 |
| // CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 |
| // CHECK15-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8 |
| // CHECK15-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 |
| // CHECK15-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8 |
| // CHECK15-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP29]], align 8 |
| // CHECK15-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 |
| // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) |
| // CHECK15-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK15-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 |
| // CHECK15-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] |
| // CHECK15: omp_offload.failed11: |
| // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] |
| // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT12]] |
| // CHECK15: omp_offload.cont12: |
| // CHECK15-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8 |
| // CHECK15-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8 |
| // CHECK15-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP38]], align 8 |
| // CHECK15-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 |
| // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) |
| // CHECK15-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK15-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 |
| // CHECK15-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] |
| // CHECK15: omp_offload.failed17: |
| // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137([10 x i32]* [[A]]) #[[ATTR3]] |
| // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT18]] |
| // CHECK15: omp_offload.cont18: |
| // CHECK15-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 |
| // CHECK15-NEXT: [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32* |
| // CHECK15-NEXT: store i32 [[TMP43]], i32* [[CONV20]], align 4 |
| // CHECK15-NEXT: [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8 |
| // CHECK15-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP44]], i64* [[TMP46]], align 8 |
| // CHECK15-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64* |
| // CHECK15-NEXT: store i64 [[TMP44]], i64* [[TMP48]], align 8 |
| // CHECK15-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP49]], align 8 |
| // CHECK15-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 |
| // CHECK15-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8 |
| // CHECK15-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 |
| // CHECK15-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8 |
| // CHECK15-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 |
| // CHECK15-NEXT: store i8* null, i8** [[TMP54]], align 8 |
| // CHECK15-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 |
| // CHECK15-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 |
| // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) |
| // CHECK15-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK15-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 |
| // CHECK15-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]] |
| // CHECK15: omp_offload.failed25: |
| // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] |
| // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT26]] |
| // CHECK15: omp_offload.cont26: |
| // CHECK15-NEXT: ret i32 0 |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122 |
| // CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..14 |
| // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 |
| // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK15: cond.true: |
| // CHECK15-NEXT: br label [[COND_END:%.*]] |
| // CHECK15: cond.false: |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: br label [[COND_END]] |
| // CHECK15: cond.end: |
| // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK15: omp.inner.for.cond: |
| // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46 |
| // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46 |
| // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK15: omp.inner.for.body: |
| // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !46 |
| // CHECK15-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46 |
| // CHECK15-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !46 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK15: omp.inner.for.inc: |
| // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46 |
| // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !46 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]] |
| // CHECK15: omp.inner.for.end: |
| // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK15: omp.loop.exit: |
| // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK15-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK15: .omp.final.then: |
| // CHECK15-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK15: .omp.final.done: |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..15 |
| // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK15-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 |
| // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK15: cond.true: |
| // CHECK15-NEXT: br label [[COND_END:%.*]] |
| // CHECK15: cond.false: |
| // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: br label [[COND_END]] |
| // CHECK15: cond.end: |
| // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK15: omp.inner.for.cond: |
| // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49 |
| // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !49 |
| // CHECK15-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK15-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK15: omp.inner.for.body: |
| // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49 |
| // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !49 |
| // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !49 |
| // CHECK15-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 |
| // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] |
| // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !49 |
| // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK15: omp.body.continue: |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK15: omp.inner.for.inc: |
| // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49 |
| // CHECK15-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK15-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]] |
| // CHECK15: omp.inner.for.end: |
| // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK15: omp.loop.exit: |
| // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK15-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK15: .omp.final.then: |
| // CHECK15-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK15: .omp.final.done: |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127 |
| // CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..17 |
| // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 |
| // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK15: cond.true: |
| // CHECK15-NEXT: br label [[COND_END:%.*]] |
| // CHECK15: cond.false: |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: br label [[COND_END]] |
| // CHECK15: cond.end: |
| // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK15: omp.inner.for.cond: |
| // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52 |
| // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52 |
| // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK15: omp.inner.for.body: |
| // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !52 |
| // CHECK15-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52 |
| // CHECK15-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !52 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK15: omp.inner.for.inc: |
| // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52 |
| // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !52 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]] |
| // CHECK15: omp.inner.for.end: |
| // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK15: omp.loop.exit: |
| // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK15-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK15: .omp.final.then: |
| // CHECK15-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK15: .omp.final.done: |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..18 |
| // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK15-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 |
| // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK15: cond.true: |
| // CHECK15-NEXT: br label [[COND_END:%.*]] |
| // CHECK15: cond.false: |
| // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: br label [[COND_END]] |
| // CHECK15: cond.end: |
| // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] |
| // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK15: omp.inner.for.cond: |
| // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55 |
| // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !55 |
| // CHECK15-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] |
| // CHECK15-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK15: omp.inner.for.body: |
| // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55 |
| // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !55 |
| // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !55 |
| // CHECK15-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 |
| // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] |
| // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !55 |
| // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK15: omp.body.continue: |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK15: omp.inner.for.inc: |
| // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55 |
| // CHECK15-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 |
| // CHECK15-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]] |
| // CHECK15: omp.inner.for.end: |
| // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK15: omp.loop.exit: |
| // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) |
| // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 |
| // CHECK15-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK15: .omp.final.then: |
| // CHECK15-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK15: .omp.final.done: |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132 |
| // CHECK15-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* |
| // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK15-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 |
| // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..21 |
| // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 |
| // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK15: cond.true: |
| // CHECK15-NEXT: br label [[COND_END:%.*]] |
| // CHECK15: cond.false: |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: br label [[COND_END]] |
| // CHECK15: cond.end: |
| // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK15: omp.inner.for.cond: |
| // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58 |
| // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58 |
| // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK15: omp.inner.for.body: |
| // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !58 |
| // CHECK15-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58 |
| // CHECK15-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !58 |
| // CHECK15-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK15-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4, !llvm.access.group !58 |
| // CHECK15-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !58 |
| // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]), !llvm.access.group !58 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK15: omp.inner.for.inc: |
| // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58 |
| // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !58 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] |
| // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]] |
| // CHECK15: omp.inner.for.end: |
| // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK15: omp.loop.exit: |
| // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 |
| // CHECK15-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK15: .omp.final.then: |
| // CHECK15-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK15: .omp.final.done: |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..22 |
| // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK15-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) |
| // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK15: omp.dispatch.cond: |
| // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] |
| // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK15: cond.true: |
| // CHECK15-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK15-NEXT: br label [[COND_END:%.*]] |
| // CHECK15: cond.false: |
| // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: br label [[COND_END]] |
| // CHECK15: cond.end: |
| // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] |
| // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] |
| // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK15: omp.dispatch.body: |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK15: omp.inner.for.cond: |
| // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 |
| // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61 |
| // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] |
| // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK15: omp.inner.for.body: |
| // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 |
| // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !61 |
| // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !61 |
| // CHECK15-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 |
| // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] |
| // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !61 |
| // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK15: omp.body.continue: |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK15: omp.inner.for.inc: |
| // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 |
| // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 |
| // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]] |
| // CHECK15: omp.inner.for.end: |
| // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK15: omp.dispatch.inc: |
| // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] |
| // CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] |
| // CHECK15-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK15: omp.dispatch.end: |
| // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) |
| // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 |
| // CHECK15-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK15: .omp.final.then: |
| // CHECK15-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK15: .omp.final.done: |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137 |
| // CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..25 |
| // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 |
| // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK15: cond.true: |
| // CHECK15-NEXT: br label [[COND_END:%.*]] |
| // CHECK15: cond.false: |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: br label [[COND_END]] |
| // CHECK15: cond.end: |
| // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK15: omp.inner.for.cond: |
| // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64 |
| // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !64 |
| // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK15: omp.inner.for.body: |
| // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !64 |
| // CHECK15-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !64 |
| // CHECK15-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !64 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK15: omp.inner.for.inc: |
| // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64 |
| // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !64 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] |
| // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP65:![0-9]+]] |
| // CHECK15: omp.inner.for.end: |
| // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK15: omp.loop.exit: |
| // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK15-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK15: .omp.final.then: |
| // CHECK15-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK15: .omp.final.done: |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..26 |
| // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK15-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) |
| // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK15: omp.dispatch.cond: |
| // CHECK15-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 |
| // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK15: omp.dispatch.body: |
| // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK15: omp.inner.for.cond: |
| // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67 |
| // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !67 |
| // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] |
| // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK15: omp.inner.for.body: |
| // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67 |
| // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !67 |
| // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !67 |
| // CHECK15-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 |
| // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] |
| // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !67 |
| // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK15: omp.body.continue: |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK15: omp.inner.for.inc: |
| // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67 |
| // CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 |
| // CHECK15-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP68:![0-9]+]] |
| // CHECK15: omp.inner.for.end: |
| // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK15: omp.dispatch.inc: |
| // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK15: omp.dispatch.end: |
| // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 |
| // CHECK15-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK15: .omp.final.then: |
| // CHECK15-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK15: .omp.final.done: |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142 |
| // CHECK15-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* |
| // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK15-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK15-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 |
| // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..29 |
| // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 |
| // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK15: cond.true: |
| // CHECK15-NEXT: br label [[COND_END:%.*]] |
| // CHECK15: cond.false: |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: br label [[COND_END]] |
| // CHECK15: cond.end: |
| // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] |
| // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK15: omp.inner.for.cond: |
| // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70 |
| // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !70 |
| // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] |
| // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK15: omp.inner.for.body: |
| // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !70 |
| // CHECK15-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 |
| // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !70 |
| // CHECK15-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 |
| // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !70 |
| // CHECK15-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK15-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4, !llvm.access.group !70 |
| // CHECK15-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !70 |
| // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]), !llvm.access.group !70 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK15: omp.inner.for.inc: |
| // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70 |
| // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !70 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] |
| // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP71:![0-9]+]] |
| // CHECK15: omp.inner.for.end: |
| // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK15: omp.loop.exit: |
| // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) |
| // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 |
| // CHECK15-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK15: .omp.final.then: |
| // CHECK15-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK15: .omp.final.done: |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..30 |
| // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 |
| // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 |
| // CHECK15-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK15-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 |
| // CHECK15-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK15-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 |
| // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) |
| // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK15: omp.dispatch.cond: |
| // CHECK15-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 |
| // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK15: omp.dispatch.body: |
| // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK15-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK15: omp.inner.for.cond: |
| // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73 |
| // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !73 |
| // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] |
| // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK15: omp.inner.for.body: |
| // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73 |
| // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 |
| // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !73 |
| // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !73 |
| // CHECK15-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 |
| // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] |
| // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !73 |
| // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK15: omp.body.continue: |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK15: omp.inner.for.inc: |
| // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73 |
| // CHECK15-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1 |
| // CHECK15-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73 |
| // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP74:![0-9]+]] |
| // CHECK15: omp.inner.for.end: |
| // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK15: omp.dispatch.inc: |
| // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK15: omp.dispatch.end: |
| // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK15-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 |
| // CHECK15-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK15: .omp.final.then: |
| // CHECK15-NEXT: store i32 10, i32* [[I]], align 4 |
| // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK15: .omp.final.done: |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK15-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg |
| // CHECK15-SAME: () #[[ATTR5:[0-9]+]] { |
| // CHECK15-NEXT: entry: |
| // CHECK15-NEXT: call void @__tgt_register_requires(i64 1) |
| // CHECK15-NEXT: ret void |
| // |
| // |
| // CHECK16-LABEL: define {{[^@]+}}@main |
| // CHECK16-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { |
| // CHECK16-NEXT: entry: |
| // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 |
| // CHECK16-NEXT: [[N:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 |
| // CHECK16-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[M:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK16-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK16-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 |
| // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK16-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK16-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 |
| // CHECK16-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK16-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK16-NEXT: [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8 |
| // CHECK16-NEXT: [[_TMP25:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK16-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK16-NEXT: [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8 |
| // CHECK16-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[M_CASTED49:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[N_CASTED51:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK16-NEXT: [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8 |
| // CHECK16-NEXT: [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8 |
| // CHECK16-NEXT: [[_TMP57:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 |
| // CHECK16-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 |
| // CHECK16-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 |
| // CHECK16-NEXT: store i32 100, i32* [[N]], align 4 |
| // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK16-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 |
| // CHECK16-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() |
| // CHECK16-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 |
| // CHECK16-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 |
| // CHECK16-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 |
| // CHECK16-NEXT: store i32 10, i32* [[M]], align 4 |
| // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* |
| // CHECK16-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 |
| // CHECK16-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 |
| // CHECK16-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 |
| // CHECK16-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8 |
| // CHECK16-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8 |
| // CHECK16-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 |
| // CHECK16-NEXT: store i64 4, i64* [[TMP10]], align 8 |
| // CHECK16-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 |
| // CHECK16-NEXT: store i8* null, i8** [[TMP11]], align 8 |
| // CHECK16-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 |
| // CHECK16-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 |
| // CHECK16-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 |
| // CHECK16-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 |
| // CHECK16-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 |
| // CHECK16-NEXT: store i64 8, i64* [[TMP16]], align 8 |
| // CHECK16-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 |
| // CHECK16-NEXT: store i8* null, i8** [[TMP17]], align 8 |
| // CHECK16-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 |
| // CHECK16-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** |
| // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8 |
| // CHECK16-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 |
| // CHECK16-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** |
| // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8 |
| // CHECK16-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 |
| // CHECK16-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8 |
| // CHECK16-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 |
| // CHECK16-NEXT: store i8* null, i8** [[TMP23]], align 8 |
| // CHECK16-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 |
| // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 |
| // CHECK16-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 |
| // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) |
| // CHECK16-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK16-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 |
| // CHECK16-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] |
| // CHECK16: omp_offload.failed: |
| // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] |
| // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT]] |
| // CHECK16: omp_offload.cont: |
| // CHECK16-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK16-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* |
| // CHECK16-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4 |
| // CHECK16-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8 |
| // CHECK16-NEXT: [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4 |
| // CHECK16-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP34]], i64* [[TMP37]], align 8 |
| // CHECK16-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8 |
| // CHECK16-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 |
| // CHECK16-NEXT: store i64 4, i64* [[TMP40]], align 8 |
| // CHECK16-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 |
| // CHECK16-NEXT: store i8* null, i8** [[TMP41]], align 8 |
| // CHECK16-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 |
| // CHECK16-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP1]], i64* [[TMP43]], align 8 |
| // CHECK16-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 |
| // CHECK16-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP1]], i64* [[TMP45]], align 8 |
| // CHECK16-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1 |
| // CHECK16-NEXT: store i64 8, i64* [[TMP46]], align 8 |
| // CHECK16-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 |
| // CHECK16-NEXT: store i8* null, i8** [[TMP47]], align 8 |
| // CHECK16-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 |
| // CHECK16-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** |
| // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 |
| // CHECK16-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 |
| // CHECK16-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32** |
| // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP51]], align 8 |
| // CHECK16-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 |
| // CHECK16-NEXT: store i64 [[TMP35]], i64* [[TMP52]], align 8 |
| // CHECK16-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 |
| // CHECK16-NEXT: store i8* null, i8** [[TMP53]], align 8 |
| // CHECK16-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP57:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4 |
| // CHECK16-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 |
| // CHECK16-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0 |
| // CHECK16-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 |
| // CHECK16-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 |
| // CHECK16-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 |
| // CHECK16-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 |
| // CHECK16-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1 |
| // CHECK16-NEXT: [[TMP60:%.*]] = zext i32 [[ADD15]] to i64 |
| // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]]) |
| // CHECK16-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK16-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0 |
| // CHECK16-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] |
| // CHECK16: omp_offload.failed16: |
| // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] |
| // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT17]] |
| // CHECK16: omp_offload.cont17: |
| // CHECK16-NEXT: [[TMP63:%.*]] = load i32, i32* [[M]], align 4 |
| // CHECK16-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32* |
| // CHECK16-NEXT: store i32 [[TMP63]], i32* [[CONV18]], align 4 |
| // CHECK16-NEXT: [[TMP64:%.*]] = load i64, i64* [[M_CASTED]], align 8 |
| // CHECK16-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK16-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* |
| // CHECK16-NEXT: store i32 [[TMP65]], i32* [[CONV20]], align 4 |
| // CHECK16-NEXT: [[TMP66:%.*]] = load i64, i64* [[N_CASTED19]], align 8 |
| // CHECK16-NEXT: [[TMP67:%.*]] = mul nuw i64 [[TMP1]], 4 |
| // CHECK16-NEXT: [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP64]], i64* [[TMP69]], align 8 |
| // CHECK16-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP64]], i64* [[TMP71]], align 8 |
| // CHECK16-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 |
| // CHECK16-NEXT: store i64 4, i64* [[TMP72]], align 8 |
| // CHECK16-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 |
| // CHECK16-NEXT: store i8* null, i8** [[TMP73]], align 8 |
| // CHECK16-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 |
| // CHECK16-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP66]], i64* [[TMP75]], align 8 |
| // CHECK16-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 |
| // CHECK16-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP66]], i64* [[TMP77]], align 8 |
| // CHECK16-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 1 |
| // CHECK16-NEXT: store i64 4, i64* [[TMP78]], align 8 |
| // CHECK16-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 |
| // CHECK16-NEXT: store i8* null, i8** [[TMP79]], align 8 |
| // CHECK16-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2 |
| // CHECK16-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP1]], i64* [[TMP81]], align 8 |
| // CHECK16-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2 |
| // CHECK16-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP1]], i64* [[TMP83]], align 8 |
| // CHECK16-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2 |
| // CHECK16-NEXT: store i64 8, i64* [[TMP84]], align 8 |
| // CHECK16-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2 |
| // CHECK16-NEXT: store i8* null, i8** [[TMP85]], align 8 |
| // CHECK16-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3 |
| // CHECK16-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32** |
| // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP87]], align 8 |
| // CHECK16-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3 |
| // CHECK16-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32** |
| // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP89]], align 8 |
| // CHECK16-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3 |
| // CHECK16-NEXT: store i64 [[TMP67]], i64* [[TMP90]], align 8 |
| // CHECK16-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3 |
| // CHECK16-NEXT: store i8* null, i8** [[TMP91]], align 8 |
| // CHECK16-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP95:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP95]], i32* [[DOTCAPTURE_EXPR_26]], align 4 |
| // CHECK16-NEXT: [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 |
| // CHECK16-NEXT: [[SUB28:%.*]] = sub nsw i32 [[TMP96]], 0 |
| // CHECK16-NEXT: [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1 |
| // CHECK16-NEXT: [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1 |
| // CHECK16-NEXT: store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 |
| // CHECK16-NEXT: [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 |
| // CHECK16-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP97]], 1 |
| // CHECK16-NEXT: [[TMP98:%.*]] = zext i32 [[ADD31]] to i64 |
| // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP98]]) |
| // CHECK16-NEXT: [[TMP99:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164.region_id, i32 4, i8** [[TMP92]], i8** [[TMP93]], i64* [[TMP94]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK16-NEXT: [[TMP100:%.*]] = icmp ne i32 [[TMP99]], 0 |
| // CHECK16-NEXT: br i1 [[TMP100]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] |
| // CHECK16: omp_offload.failed32: |
| // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164(i64 [[TMP64]], i64 [[TMP66]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] |
| // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT33]] |
| // CHECK16: omp_offload.cont33: |
| // CHECK16-NEXT: [[TMP101:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK16-NEXT: [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32* |
| // CHECK16-NEXT: store i32 [[TMP101]], i32* [[CONV35]], align 4 |
| // CHECK16-NEXT: [[TMP102:%.*]] = load i64, i64* [[N_CASTED34]], align 8 |
| // CHECK16-NEXT: [[TMP103:%.*]] = mul nuw i64 [[TMP1]], 4 |
| // CHECK16-NEXT: [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP102]], i64* [[TMP105]], align 8 |
| // CHECK16-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP102]], i64* [[TMP107]], align 8 |
| // CHECK16-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 |
| // CHECK16-NEXT: store i64 4, i64* [[TMP108]], align 8 |
| // CHECK16-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0 |
| // CHECK16-NEXT: store i8* null, i8** [[TMP109]], align 8 |
| // CHECK16-NEXT: [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1 |
| // CHECK16-NEXT: [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP1]], i64* [[TMP111]], align 8 |
| // CHECK16-NEXT: [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1 |
| // CHECK16-NEXT: [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP1]], i64* [[TMP113]], align 8 |
| // CHECK16-NEXT: [[TMP114:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 1 |
| // CHECK16-NEXT: store i64 8, i64* [[TMP114]], align 8 |
| // CHECK16-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1 |
| // CHECK16-NEXT: store i8* null, i8** [[TMP115]], align 8 |
| // CHECK16-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2 |
| // CHECK16-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32** |
| // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP117]], align 8 |
| // CHECK16-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2 |
| // CHECK16-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32** |
| // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP119]], align 8 |
| // CHECK16-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2 |
| // CHECK16-NEXT: store i64 [[TMP103]], i64* [[TMP120]], align 8 |
| // CHECK16-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2 |
| // CHECK16-NEXT: store i8* null, i8** [[TMP121]], align 8 |
| // CHECK16-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP125:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP125]], i32* [[DOTCAPTURE_EXPR_41]], align 4 |
| // CHECK16-NEXT: [[TMP126:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 |
| // CHECK16-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP126]], 0 |
| // CHECK16-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 |
| // CHECK16-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 |
| // CHECK16-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4 |
| // CHECK16-NEXT: [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4 |
| // CHECK16-NEXT: [[ADD46:%.*]] = add nsw i32 [[TMP127]], 1 |
| // CHECK16-NEXT: [[TMP128:%.*]] = zext i32 [[ADD46]] to i64 |
| // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP128]]) |
| // CHECK16-NEXT: [[TMP129:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169.region_id, i32 3, i8** [[TMP122]], i8** [[TMP123]], i64* [[TMP124]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK16-NEXT: [[TMP130:%.*]] = icmp ne i32 [[TMP129]], 0 |
| // CHECK16-NEXT: br i1 [[TMP130]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] |
| // CHECK16: omp_offload.failed47: |
| // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169(i64 [[TMP102]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] |
| // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT48]] |
| // CHECK16: omp_offload.cont48: |
| // CHECK16-NEXT: [[TMP131:%.*]] = load i32, i32* [[M]], align 4 |
| // CHECK16-NEXT: [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32* |
| // CHECK16-NEXT: store i32 [[TMP131]], i32* [[CONV50]], align 4 |
| // CHECK16-NEXT: [[TMP132:%.*]] = load i64, i64* [[M_CASTED49]], align 8 |
| // CHECK16-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK16-NEXT: [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32* |
| // CHECK16-NEXT: store i32 [[TMP133]], i32* [[CONV52]], align 4 |
| // CHECK16-NEXT: [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8 |
| // CHECK16-NEXT: [[TMP135:%.*]] = mul nuw i64 [[TMP1]], 4 |
| // CHECK16-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP132]], i64* [[TMP137]], align 8 |
| // CHECK16-NEXT: [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP132]], i64* [[TMP139]], align 8 |
| // CHECK16-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 |
| // CHECK16-NEXT: store i64 4, i64* [[TMP140]], align 8 |
| // CHECK16-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0 |
| // CHECK16-NEXT: store i8* null, i8** [[TMP141]], align 8 |
| // CHECK16-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1 |
| // CHECK16-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP134]], i64* [[TMP143]], align 8 |
| // CHECK16-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1 |
| // CHECK16-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP134]], i64* [[TMP145]], align 8 |
| // CHECK16-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 1 |
| // CHECK16-NEXT: store i64 4, i64* [[TMP146]], align 8 |
| // CHECK16-NEXT: [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1 |
| // CHECK16-NEXT: store i8* null, i8** [[TMP147]], align 8 |
| // CHECK16-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2 |
| // CHECK16-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP1]], i64* [[TMP149]], align 8 |
| // CHECK16-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2 |
| // CHECK16-NEXT: [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i64* |
| // CHECK16-NEXT: store i64 [[TMP1]], i64* [[TMP151]], align 8 |
| // CHECK16-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 2 |
| // CHECK16-NEXT: store i64 8, i64* [[TMP152]], align 8 |
| // CHECK16-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2 |
| // CHECK16-NEXT: store i8* null, i8** [[TMP153]], align 8 |
| // CHECK16-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3 |
| // CHECK16-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32** |
| // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP155]], align 8 |
| // CHECK16-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3 |
| // CHECK16-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32** |
| // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP157]], align 8 |
| // CHECK16-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3 |
| // CHECK16-NEXT: store i64 [[TMP135]], i64* [[TMP158]], align 8 |
| // CHECK16-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3 |
| // CHECK16-NEXT: store i8* null, i8** [[TMP159]], align 8 |
| // CHECK16-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 |
| // CHECK16-NEXT: [[TMP163:%.*]] = load i32, i32* [[N]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_58]], align 4 |
| // CHECK16-NEXT: [[TMP164:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4 |
| // CHECK16-NEXT: [[SUB60:%.*]] = sub nsw i32 [[TMP164]], 0 |
| // CHECK16-NEXT: [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1 |
| // CHECK16-NEXT: [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1 |
| // CHECK16-NEXT: store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4 |
| // CHECK16-NEXT: [[TMP165:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4 |
| // CHECK16-NEXT: [[ADD63:%.*]] = add nsw i32 [[TMP165]], 1 |
| // CHECK16-NEXT: [[TMP166:%.*]] = zext i32 [[ADD63]] to i64 |
| // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP166]]) |
| // CHECK16-NEXT: [[TMP167:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174.region_id, i32 4, i8** [[TMP160]], i8** [[TMP161]], i64* [[TMP162]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) |
| // CHECK16-NEXT: [[TMP168:%.*]] = icmp ne i32 [[TMP167]], 0 |
| // CHECK16-NEXT: br i1 [[TMP168]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] |
| // CHECK16: omp_offload.failed64: |
| // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174(i64 [[TMP132]], i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] |
| // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT65]] |
| // CHECK16: omp_offload.cont65: |
| // CHECK16-NEXT: [[TMP169:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 |
| // CHECK16-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP169]]) |
| // CHECK16-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 |
| // CHECK16-NEXT: [[TMP170:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 |
| // CHECK16-NEXT: call void @llvm.stackrestore(i8* [[TMP170]]) |
| // CHECK16-NEXT: [[TMP171:%.*]] = load i32, i32* [[RETVAL]], align 4 |
| // CHECK16-NEXT: ret i32 [[TMP171]] |
| // |
| // |
| // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154 |
| // CHECK16-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { |
| // CHECK16-NEXT: entry: |
| // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* |
| // CHECK16-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) |
| // CHECK16-NEXT: ret void |
| // |
| // |
| // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined. |
| // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK16-NEXT: entry: |
| // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK16: omp.precond.then: |
| // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK16-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 |
| // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] |
| // CHECK16-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK16: cond.true: |
| // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: br label [[COND_END:%.*]] |
| // CHECK16: cond.false: |
| // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK16-NEXT: br label [[COND_END]] |
| // CHECK16: cond.end: |
| // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] |
| // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK16: omp.inner.for.cond: |
| // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13 |
| // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] |
| // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK16: omp.inner.for.body: |
| // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !13 |
| // CHECK16-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 |
| // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13 |
| // CHECK16-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 |
| // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !13 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK16: omp.inner.for.inc: |
| // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !13 |
| // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] |
| // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] |
| // CHECK16: omp.inner.for.end: |
| // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK16: omp.loop.exit: |
| // CHECK16-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 |
| // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) |
| // CHECK16-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK16-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 |
| // CHECK16-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK16: .omp.final.then: |
| // CHECK16-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0 |
| // CHECK16-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 |
| // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 |
| // CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK16-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4 |
| // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK16: .omp.final.done: |
| // CHECK16-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK16: omp.precond.end: |
| // CHECK16-NEXT: ret void |
| // |
| // |
| // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..1 |
| // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK16-NEXT: entry: |
| // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[I4:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK16: omp.precond.then: |
| // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK16-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK16-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK16-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK16-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK16-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK16-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK16-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 |
| // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] |
| // CHECK16-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK16: cond.true: |
| // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: br label [[COND_END:%.*]] |
| // CHECK16: cond.false: |
| // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK16-NEXT: br label [[COND_END]] |
| // CHECK16: cond.end: |
| // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] |
| // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK16: omp.inner.for.cond: |
| // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17 |
| // CHECK16-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] |
| // CHECK16-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK16: omp.inner.for.body: |
| // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 |
| // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK16-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !17 |
| // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !17 |
| // CHECK16-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 |
| // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] |
| // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !17 |
| // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK16: omp.body.continue: |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK16: omp.inner.for.inc: |
| // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK16-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 |
| // CHECK16-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] |
| // CHECK16: omp.inner.for.end: |
| // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK16: omp.loop.exit: |
| // CHECK16-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 |
| // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) |
| // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK16-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 |
| // CHECK16-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK16: .omp.final.then: |
| // CHECK16-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0 |
| // CHECK16-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 |
| // CHECK16-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 |
| // CHECK16-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] |
| // CHECK16-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4 |
| // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK16: .omp.final.done: |
| // CHECK16-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK16: omp.precond.end: |
| // CHECK16-NEXT: ret void |
| // |
| // |
| // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159 |
| // CHECK16-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK16-NEXT: entry: |
| // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* |
| // CHECK16-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) |
| // CHECK16-NEXT: ret void |
| // |
| // |
| // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..2 |
| // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK16-NEXT: entry: |
| // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK16: omp.precond.then: |
| // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK16-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 |
| // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] |
| // CHECK16-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK16: cond.true: |
| // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: br label [[COND_END:%.*]] |
| // CHECK16: cond.false: |
| // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK16-NEXT: br label [[COND_END]] |
| // CHECK16: cond.end: |
| // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] |
| // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK16: omp.inner.for.cond: |
| // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 |
| // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22 |
| // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] |
| // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK16: omp.inner.for.body: |
| // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !22 |
| // CHECK16-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 |
| // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22 |
| // CHECK16-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 |
| // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !22 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK16: omp.inner.for.inc: |
| // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 |
| // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !22 |
| // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] |
| // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] |
| // CHECK16: omp.inner.for.end: |
| // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK16: omp.loop.exit: |
| // CHECK16-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 |
| // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) |
| // CHECK16-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK16-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 |
| // CHECK16-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK16: .omp.final.then: |
| // CHECK16-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0 |
| // CHECK16-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 |
| // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 |
| // CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK16-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4 |
| // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK16: .omp.final.done: |
| // CHECK16-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK16: omp.precond.end: |
| // CHECK16-NEXT: ret void |
| // |
| // |
| // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..3 |
| // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK16-NEXT: entry: |
| // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[I4:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK16: omp.precond.then: |
| // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK16-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK16-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK16-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK16-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK16-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK16-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK16-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 |
| // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] |
| // CHECK16-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK16: cond.true: |
| // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: br label [[COND_END:%.*]] |
| // CHECK16: cond.false: |
| // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK16-NEXT: br label [[COND_END]] |
| // CHECK16: cond.end: |
| // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] |
| // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK16: omp.inner.for.cond: |
| // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 |
| // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25 |
| // CHECK16-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] |
| // CHECK16-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK16: omp.inner.for.body: |
| // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 |
| // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 |
| // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK16-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !25 |
| // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !25 |
| // CHECK16-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 |
| // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] |
| // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25 |
| // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK16: omp.body.continue: |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK16: omp.inner.for.inc: |
| // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 |
| // CHECK16-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 |
| // CHECK16-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] |
| // CHECK16: omp.inner.for.end: |
| // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK16: omp.loop.exit: |
| // CHECK16-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 |
| // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) |
| // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK16-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 |
| // CHECK16-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK16: .omp.final.then: |
| // CHECK16-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0 |
| // CHECK16-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 |
| // CHECK16-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 |
| // CHECK16-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] |
| // CHECK16-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4 |
| // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK16: .omp.final.done: |
| // CHECK16-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK16: omp.precond.end: |
| // CHECK16-NEXT: ret void |
| // |
| // |
| // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164 |
| // CHECK16-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK16-NEXT: entry: |
| // CHECK16-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* |
| // CHECK16-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* |
| // CHECK16-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK16-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 |
| // CHECK16-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 |
| // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) |
| // CHECK16-NEXT: ret void |
| // |
| // |
| // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..5 |
| // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK16-NEXT: entry: |
| // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[I4:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK16-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK16-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK16: omp.precond.then: |
| // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK16-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 |
| // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) |
| // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK16-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] |
| // CHECK16-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK16: cond.true: |
| // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK16-NEXT: br label [[COND_END:%.*]] |
| // CHECK16: cond.false: |
| // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK16-NEXT: br label [[COND_END]] |
| // CHECK16: cond.end: |
| // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] |
| // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK16: omp.inner.for.cond: |
| // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 |
| // CHECK16-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] |
| // CHECK16-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK16: omp.inner.for.body: |
| // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 |
| // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 |
| // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !28 |
| // CHECK16-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK16-NEXT: store i32 [[TMP21]], i32* [[CONV7]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !28 |
| // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]]), !llvm.access.group !28 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK16: omp.inner.for.inc: |
| // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] |
| // CHECK16-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] |
| // CHECK16-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] |
| // CHECK16-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] |
| // CHECK16-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] |
| // CHECK16: cond.true12: |
| // CHECK16-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: br label [[COND_END14:%.*]] |
| // CHECK16: cond.false13: |
| // CHECK16-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: br label [[COND_END14]] |
| // CHECK16: cond.end14: |
| // CHECK16-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ] |
| // CHECK16-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] |
| // CHECK16: omp.inner.for.end: |
| // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK16: omp.loop.exit: |
| // CHECK16-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 |
| // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) |
| // CHECK16-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK16-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 |
| // CHECK16-NEXT: br i1 [[TMP37]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK16: .omp.final.then: |
| // CHECK16-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: [[SUB16:%.*]] = sub nsw i32 [[TMP38]], 0 |
| // CHECK16-NEXT: [[DIV17:%.*]] = sdiv i32 [[SUB16]], 1 |
| // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV17]], 1 |
| // CHECK16-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK16-NEXT: store i32 [[ADD18]], i32* [[I4]], align 4 |
| // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK16: .omp.final.done: |
| // CHECK16-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK16: omp.precond.end: |
| // CHECK16-NEXT: ret void |
| // |
| // |
| // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..6 |
| // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK16-NEXT: entry: |
| // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[I6:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK16-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK16-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK16: omp.precond.then: |
| // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK16-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK16-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK16-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK16-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK16-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK16-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK16-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 |
| // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK16-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] |
| // CHECK16-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK16: cond.true: |
| // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK16-NEXT: br label [[COND_END:%.*]] |
| // CHECK16: cond.false: |
| // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK16-NEXT: br label [[COND_END]] |
| // CHECK16: cond.end: |
| // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] |
| // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK16: omp.inner.for.cond: |
| // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31 |
| // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !31 |
| // CHECK16-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] |
| // CHECK16-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK16: omp.inner.for.body: |
| // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31 |
| // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 |
| // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK16-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !31 |
| // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !31 |
| // CHECK16-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 |
| // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] |
| // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !31 |
| // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK16: omp.body.continue: |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK16: omp.inner.for.inc: |
| // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31 |
| // CHECK16-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 |
| // CHECK16-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]] |
| // CHECK16: omp.inner.for.end: |
| // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK16: omp.loop.exit: |
| // CHECK16-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 |
| // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) |
| // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK16-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 |
| // CHECK16-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK16: .omp.final.then: |
| // CHECK16-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP25]], 0 |
| // CHECK16-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 |
| // CHECK16-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 |
| // CHECK16-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] |
| // CHECK16-NEXT: store i32 [[ADD13]], i32* [[I6]], align 4 |
| // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK16: .omp.final.done: |
| // CHECK16-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK16: omp.precond.end: |
| // CHECK16-NEXT: ret void |
| // |
| // |
| // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169 |
| // CHECK16-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK16-NEXT: entry: |
| // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* |
| // CHECK16-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) |
| // CHECK16-NEXT: ret void |
| // |
| // |
| // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..8 |
| // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK16-NEXT: entry: |
| // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK16: omp.precond.then: |
| // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK16-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 |
| // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] |
| // CHECK16-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK16: cond.true: |
| // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: br label [[COND_END:%.*]] |
| // CHECK16: cond.false: |
| // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK16-NEXT: br label [[COND_END]] |
| // CHECK16: cond.end: |
| // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] |
| // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK16: omp.inner.for.cond: |
| // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34 |
| // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34 |
| // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] |
| // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK16: omp.inner.for.body: |
| // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !34 |
| // CHECK16-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 |
| // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34 |
| // CHECK16-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 |
| // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !34 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK16: omp.inner.for.inc: |
| // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34 |
| // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34 |
| // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] |
| // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]] |
| // CHECK16: omp.inner.for.end: |
| // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK16: omp.loop.exit: |
| // CHECK16-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 |
| // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) |
| // CHECK16-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK16-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 |
| // CHECK16-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK16: .omp.final.then: |
| // CHECK16-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0 |
| // CHECK16-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 |
| // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 |
| // CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK16-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4 |
| // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK16: .omp.final.done: |
| // CHECK16-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK16: omp.precond.end: |
| // CHECK16-NEXT: ret void |
| // |
| // |
| // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..9 |
| // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK16-NEXT: entry: |
| // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[I4:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK16: omp.precond.then: |
| // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 |
| // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK16-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 |
| // CHECK16-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 |
| // CHECK16-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 |
| // CHECK16-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 |
| // CHECK16-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 |
| // CHECK16-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 |
| // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 |
| // CHECK16-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 |
| // CHECK16-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) |
| // CHECK16-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK16: omp.dispatch.cond: |
| // CHECK16-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 |
| // CHECK16-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) |
| // CHECK16-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 |
| // CHECK16-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] |
| // CHECK16: omp.dispatch.body: |
| // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK16: omp.inner.for.cond: |
| // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37 |
| // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !37 |
| // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] |
| // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK16: omp.inner.for.body: |
| // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37 |
| // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 |
| // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK16-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !37 |
| // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !37 |
| // CHECK16-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 |
| // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] |
| // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !37 |
| // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK16: omp.body.continue: |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK16: omp.inner.for.inc: |
| // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37 |
| // CHECK16-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 |
| // CHECK16-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]] |
| // CHECK16: omp.inner.for.end: |
| // CHECK16-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK16: omp.dispatch.inc: |
| // CHECK16-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK16: omp.dispatch.end: |
| // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK16-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 |
| // CHECK16-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK16: .omp.final.then: |
| // CHECK16-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0 |
| // CHECK16-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 |
| // CHECK16-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 |
| // CHECK16-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] |
| // CHECK16-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4 |
| // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK16: .omp.final.done: |
| // CHECK16-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK16: omp.precond.end: |
| // CHECK16-NEXT: ret void |
| // |
| // |
| // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174 |
| // CHECK16-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { |
| // CHECK16-NEXT: entry: |
| // CHECK16-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* |
| // CHECK16-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* |
| // CHECK16-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 |
| // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 |
| // CHECK16-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK16-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 |
| // CHECK16-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 |
| // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) |
| // CHECK16-NEXT: ret void |
| // |
| // |
| // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..11 |
| // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK16-NEXT: entry: |
| // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[I4:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 |
| // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* |
| // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 |
| // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 |
| // CHECK16-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 |
| // CHECK16-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 |
| // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] |
| // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK16: omp.precond.then: |
| // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 |
| // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK16-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 |
| // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK16-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] |
| // CHECK16-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK16: cond.true: |
| // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 |
| // CHECK16-NEXT: br label [[COND_END:%.*]] |
| // CHECK16: cond.false: |
| // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK16-NEXT: br label [[COND_END]] |
| // CHECK16: cond.end: |
| // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] |
| // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 |
| // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 |
| // CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK16: omp.inner.for.cond: |
| // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 |
| // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40 |
| // CHECK16-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] |
| // CHECK16-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK16: omp.inner.for.body: |
| // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !40 |
| // CHECK16-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 |
| // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40 |
| // CHECK16-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 |
| // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !40 |
| // CHECK16-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* |
| // CHECK16-NEXT: store i32 [[TMP20]], i32* [[CONV7]], align 4, !llvm.access.group !40 |
| // CHECK16-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !40 |
| // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]]), !llvm.access.group !40 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK16: omp.inner.for.inc: |
| // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 |
| // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !40 |
| // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] |
| // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 |
| // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]] |
| // CHECK16: omp.inner.for.end: |
| // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK16: omp.loop.exit: |
| // CHECK16-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK16-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 |
| // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) |
| // CHECK16-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 |
| // CHECK16-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 |
| // CHECK16-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] |
| // CHECK16: .omp.final.then: |
| // CHECK16-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 |
| // CHECK16-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP28]], 0 |
| // CHECK16-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 |
| // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV9]], 1 |
| // CHECK16-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK16-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4 |
| // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]] |
| // CHECK16: .omp.final.done: |
| // CHECK16-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK16: omp.precond.end: |
| // CHECK16-NEXT: ret void |
| // |
| // |
| // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..12 |
| // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { |
| // CHECK16-NEXT: entry: |
| // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 |
| // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
|
