[AArch64][SDAG] Lower f16->s16 FP_TO_INT_SAT to *v1f16 (#154822) Conversions from f16 to s16 performed by FP_TO_INT_SAT can be done directly within FPRs, e.g. `fcvtzs h0, h0`. Generating this format reduces the number of instruction required for correct behaviour, as it sidesteps the issues with incorrect saturation that arise when using `fcvtzs w0, h0` for the same casts. Add new AArch64ISD::FCVTZS_HALF and AArch64ISD::FCVTZU_HALF nodes to represent the necessary instruction sequence. Related to https://github.com/llvm/llvm-project/issues/154343. --------- Signed-off-by: Kajetan Puchalski <kajetan.puchalski@arm.com>
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