| commit | 6b54c92be02079eff4f4edfbe667e60c3a1949df | [log] [tgz] |
|---|---|---|
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | Fri Sep 19 20:08:51 2025 +0900 |
| committer | GitHub <noreply@github.com> | Fri Sep 19 20:08:51 2025 +0900 |
| tree | e21c0ca4ca2ce493263b0879a21632b140ac46f5 | |
| parent | b6231f5197820026adc452707e920847364f2e6f [diff] |
CodeGen: Add RegisterClass by HwMode (#158269) This is a generalization of the LookupPtrRegClass mechanism. AMDGPU has several use cases for swapping the register class of instruction operands based on the subtarget, but none of them really fit into the box of being pointer-like. The current system requires manual management of an arbitrary integer ID. For the AMDGPU use case, this would end up being around 40 new entries to manage. This just introduces the base infrastructure. I have ports of all the target specific usage of PointerLikeRegClass ready.
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