tree 0c50f9f910cc888deb47dda424c308839902b74b
parent 7456636311f0cd7272b3021f07b55c3a769b44e6
author Guy David <guyda96@gmail.com> 1778425482 +0300
committer GitHub <noreply@github.com> 1778425482 +0300
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[AArch64] Improve post-inc stores of SIMD/FP values (#151372)

Add patterns to match post-increment truncating stores from lane 0 of
wide integer vectors (v4i32/v2i64) to narrower types (i8/i16/i32). This
avoids transferring the value through a GPR when storing.

Also remove the pre-legaliztion early-exit in `combineStoreValueFPToInt`
as it prevented the optimization from applying in some cases.