)]}'
{
  "commit": "6892c175c565e59cf485ada6b1febd41b4666414",
  "tree": "7a8c3e41808e3a977abf81a72a4c89bbabac41f4",
  "parents": [
    "ae2f8167eefbc78c6b6408c9ee3b7c7965ed596a"
  ],
  "author": {
    "name": "Petar Avramovic",
    "email": "Petar.Avramovic@amd.com",
    "time": "Wed Dec 13 16:42:56 2023 +0100"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Wed Dec 13 16:42:56 2023 +0100"
  },
  "message": "AMDGPU/GlobalISel: add AMDGPUGlobalISelDivergenceLowering pass (#75340)\n\nAdd empty AMDGPUGlobalISelDivergenceLowering pass. This pass will\r\nimplement\r\n- selection of divergent i1 phis as lane mask phis, requires lane mask\r\nmerging in some cases\r\n- lower uses of divergent i1 values outside of the cycle using lane mask\r\nmerging\r\n- lowering of all cases of temporal divergence:\r\n- lower uses of uniform i1 values outside of the cycle using lane mask\r\nmerging\r\n- lower uses of uniform non-i1 values outside of the cycle using a copy\r\nto vgpr inside of the cycle\r\n\r\nAdd very detailed set of regression tests for cases mentioned above.\r\n\r\npatch 1 from: https://github.com/llvm/llvm-project/pull/73337",
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