| commit | 65b0cc610f80d9b9724a98cf7c5bcfd38e1cf799 | [log] [tgz] |
|---|---|---|
| author | Craig Topper <craig.topper@sifive.com> | Mon Apr 15 21:54:26 2024 -0700 |
| committer | GitHub <noreply@github.com> | Mon Apr 15 21:54:26 2024 -0700 |
| tree | 322d1a61b5aa7d3c2be3eecfaea88d8a83a7b283 | |
| parent | fe48bf672e1ab293368a3212203db94a4e21c533 [diff] |
[RISCV] Add FeatureStdExtI to all CPUs in RISCVProcessors.td. NFC (#88805) This is currently being implied in RISCVISAInfo.cpp. Make it explicit. I'm planning to move all extension information to RISCVFeatures.td and have tablegen create the tables for RISCVISAInfo.cpp. This requires making the creation of RISCVTargetParserDef.inc in tablegen independent of RISCVISAInfo.cpp. So we need an accurate extension list for CPUs in tablegen.
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