blob: 34e48136df37a42c9223eed11a43c33eb5e492d7 [file] [log] [blame]
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt < %s -passes=sccp -S | FileCheck %s
define i1 @relax_range_check(i8 range(i8 0, 5) %x) {
; CHECK-LABEL: define i1 @relax_range_check(
; CHECK-SAME: i8 range(i8 0, 5) [[X:%.*]]) {
; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[X]], -3
; CHECK-NEXT: [[RET:%.*]] = icmp uge i8 [[X]], 3
; CHECK-NEXT: ret i1 [[RET]]
;
%add = add i8 %x, -3
%ret = icmp ult i8 %add, 2
ret i1 %ret
}
define i1 @relax_range_check_highbits_check(i8 range(i8 2, 0) %x) {
; CHECK-LABEL: define i1 @relax_range_check_highbits_check(
; CHECK-SAME: i8 range(i8 2, 0) [[X:%.*]]) {
; CHECK-NEXT: [[AND:%.*]] = and i8 [[X]], -2
; CHECK-NEXT: [[RET:%.*]] = icmp ult i8 [[X]], 4
; CHECK-NEXT: ret i1 [[RET]]
;
%and = and i8 %x, -2
%ret = icmp eq i8 %and, 2
ret i1 %ret
}
; Negative tests.
define i1 @relax_range_check_one_instruction(i8 range(i8 0, 5) %x) {
; CHECK-LABEL: define i1 @relax_range_check_one_instruction(
; CHECK-SAME: i8 range(i8 0, 5) [[X:%.*]]) {
; CHECK-NEXT: [[RET:%.*]] = icmp ult i8 [[X]], 2
; CHECK-NEXT: ret i1 [[RET]]
;
%ret = icmp ult i8 %x, 2
ret i1 %ret
}
define i1 @relax_range_check_not_profitable(i8 range(i8 0, 6) %x) {
; CHECK-LABEL: define i1 @relax_range_check_not_profitable(
; CHECK-SAME: i8 range(i8 0, 6) [[X:%.*]]) {
; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[X]], -3
; CHECK-NEXT: [[RET:%.*]] = icmp ult i8 [[ADD]], 2
; CHECK-NEXT: ret i1 [[RET]]
;
%add = add i8 %x, -3
%ret = icmp ult i8 %add, 2
ret i1 %ret
}
define i1 @relax_range_check_unknown_range(i64 %x) {
; CHECK-LABEL: define i1 @relax_range_check_unknown_range(
; CHECK-SAME: i64 [[X:%.*]]) {
; CHECK-NEXT: [[AND:%.*]] = and i64 [[X]], -67108864
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[AND]], 0
; CHECK-NEXT: ret i1 [[TMP1]]
;
%and = and i64 %x, -67108864
%test = icmp eq i64 %and, 0
ret i1 %test
}
define i1 @relax_range_check_highbits_check_multiuse(i8 range(i8 2, 0) %x) {
; CHECK-LABEL: define i1 @relax_range_check_highbits_check_multiuse(
; CHECK-SAME: i8 range(i8 2, 0) [[X:%.*]]) {
; CHECK-NEXT: [[AND:%.*]] = and i8 [[X]], -2
; CHECK-NEXT: call void @use(i8 [[AND]])
; CHECK-NEXT: [[RET:%.*]] = icmp eq i8 [[AND]], 2
; CHECK-NEXT: ret i1 [[RET]]
;
%and = and i8 %x, -2
call void @use(i8 %and)
%ret = icmp eq i8 %and, 2
ret i1 %ret
}
define i1 @relax_range_check_multiuse(i8 range(i8 0, 5) %x) {
; CHECK-LABEL: define i1 @relax_range_check_multiuse(
; CHECK-SAME: i8 range(i8 0, 5) [[X:%.*]]) {
; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[X]], -3
; CHECK-NEXT: call void @use(i8 [[ADD]])
; CHECK-NEXT: [[RET:%.*]] = icmp ult i8 [[ADD]], 2
; CHECK-NEXT: ret i1 [[RET]]
;
%add = add i8 %x, -3
call void @use(i8 %add)
%ret = icmp ult i8 %add, 2
ret i1 %ret
}
define i1 @range_check_to_icmp_eq1(i32 range(i32 0, 4) %x) {
; CHECK-LABEL: define i1 @range_check_to_icmp_eq1(
; CHECK-SAME: i32 range(i32 0, 4) [[X:%.*]]) {
; CHECK-NEXT: [[OFF:%.*]] = add nsw i32 [[X]], -3
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[X]], 3
; CHECK-NEXT: ret i1 [[TMP1]]
;
%off = add nsw i32 %x, -3
%cmp = icmp ult i32 %off, 2
ret i1 %cmp
}
define i1 @range_check_to_icmp_eq2(i32 range(i32 -1, 2) %x) {
; CHECK-LABEL: define i1 @range_check_to_icmp_eq2(
; CHECK-SAME: i32 range(i32 -1, 2) [[X:%.*]]) {
; CHECK-NEXT: [[OFF:%.*]] = add nsw i32 [[X]], -1
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%off = add nsw i32 %x, -1
%cmp = icmp ult i32 %off, -2
ret i1 %cmp
}
declare void @use(i8)