; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2-SSSE3,SSE2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSE2-SSSE3,SSSE3
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-SLOW
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-FAST-ALL
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-FAST-PERLANE
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512F
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512VL
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512VL
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BW
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BW
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BWVL
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BWVL

define <8 x i32> @trunc8i64_8i32(<8 x i64> %a) {
; SSE-LABEL: trunc8i64_8i32:
; SSE:       # %bb.0: # %entry
; SSE-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE-NEXT:    shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE-NEXT:    movaps %xmm2, %xmm1
; SSE-NEXT:    retq
;
; AVX1-LABEL: trunc8i64_8i32:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3]
; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT:    vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm2[0,2],ymm0[4,6],ymm2[4,6]
; AVX1-NEXT:    retq
;
; AVX2-SLOW-LABEL: trunc8i64_8i32:
; AVX2-SLOW:       # %bb.0: # %entry
; AVX2-SLOW-NEXT:    vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3]
; AVX2-SLOW-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX2-SLOW-NEXT:    vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm2[0,2],ymm0[4,6],ymm2[4,6]
; AVX2-SLOW-NEXT:    retq
;
; AVX2-FAST-ALL-LABEL: trunc8i64_8i32:
; AVX2-FAST-ALL:       # %bb.0: # %entry
; AVX2-FAST-ALL-NEXT:    vmovaps {{.*#+}} ymm2 = [0,2,4,6,4,6,6,7]
; AVX2-FAST-ALL-NEXT:    vpermps %ymm0, %ymm2, %ymm0
; AVX2-FAST-ALL-NEXT:    vpermps %ymm1, %ymm2, %ymm1
; AVX2-FAST-ALL-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX2-FAST-ALL-NEXT:    retq
;
; AVX2-FAST-PERLANE-LABEL: trunc8i64_8i32:
; AVX2-FAST-PERLANE:       # %bb.0: # %entry
; AVX2-FAST-PERLANE-NEXT:    vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3]
; AVX2-FAST-PERLANE-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX2-FAST-PERLANE-NEXT:    vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm2[0,2],ymm0[4,6],ymm2[4,6]
; AVX2-FAST-PERLANE-NEXT:    retq
;
; AVX512-LABEL: trunc8i64_8i32:
; AVX512:       # %bb.0: # %entry
; AVX512-NEXT:    vpmovqd %zmm0, %ymm0
; AVX512-NEXT:    retq
entry:
  %0 = trunc <8 x i64> %a to <8 x i32>
  ret <8 x i32> %0
}

define <8 x i32> @trunc8i64_8i32_ashr(<8 x i64> %a) {
; SSE-LABEL: trunc8i64_8i32_ashr:
; SSE:       # %bb.0: # %entry
; SSE-NEXT:    shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3]
; SSE-NEXT:    shufps {{.*#+}} xmm2 = xmm2[1,3],xmm3[1,3]
; SSE-NEXT:    movaps %xmm2, %xmm1
; SSE-NEXT:    retq
;
; AVX1-LABEL: trunc8i64_8i32_ashr:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3]
; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT:    vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm2[1,3],ymm0[5,7],ymm2[5,7]
; AVX1-NEXT:    retq
;
; AVX2-SLOW-LABEL: trunc8i64_8i32_ashr:
; AVX2-SLOW:       # %bb.0: # %entry
; AVX2-SLOW-NEXT:    vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3]
; AVX2-SLOW-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX2-SLOW-NEXT:    vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm2[1,3],ymm0[5,7],ymm2[5,7]
; AVX2-SLOW-NEXT:    retq
;
; AVX2-FAST-ALL-LABEL: trunc8i64_8i32_ashr:
; AVX2-FAST-ALL:       # %bb.0: # %entry
; AVX2-FAST-ALL-NEXT:    vmovaps {{.*#+}} xmm2 = [1,3,5,7]
; AVX2-FAST-ALL-NEXT:    vpermps %ymm0, %ymm2, %ymm0
; AVX2-FAST-ALL-NEXT:    vpermps %ymm1, %ymm2, %ymm1
; AVX2-FAST-ALL-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX2-FAST-ALL-NEXT:    retq
;
; AVX2-FAST-PERLANE-LABEL: trunc8i64_8i32_ashr:
; AVX2-FAST-PERLANE:       # %bb.0: # %entry
; AVX2-FAST-PERLANE-NEXT:    vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3]
; AVX2-FAST-PERLANE-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX2-FAST-PERLANE-NEXT:    vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm2[1,3],ymm0[5,7],ymm2[5,7]
; AVX2-FAST-PERLANE-NEXT:    retq
;
; AVX512-LABEL: trunc8i64_8i32_ashr:
; AVX512:       # %bb.0: # %entry
; AVX512-NEXT:    vpsrlq $32, %zmm0, %zmm0
; AVX512-NEXT:    vpmovqd %zmm0, %ymm0
; AVX512-NEXT:    retq
entry:
  %0 = ashr <8 x i64> %a, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32>
  %1 = trunc <8 x i64> %0 to <8 x i32>
  ret <8 x i32> %1
}

define <8 x i32> @trunc8i64_8i32_lshr(<8 x i64> %a) {
; SSE-LABEL: trunc8i64_8i32_lshr:
; SSE:       # %bb.0: # %entry
; SSE-NEXT:    shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3]
; SSE-NEXT:    shufps {{.*#+}} xmm2 = xmm2[1,3],xmm3[1,3]
; SSE-NEXT:    movaps %xmm2, %xmm1
; SSE-NEXT:    retq
;
; AVX1-LABEL: trunc8i64_8i32_lshr:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3]
; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT:    vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm2[1,3],ymm0[5,7],ymm2[5,7]
; AVX1-NEXT:    retq
;
; AVX2-SLOW-LABEL: trunc8i64_8i32_lshr:
; AVX2-SLOW:       # %bb.0: # %entry
; AVX2-SLOW-NEXT:    vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3]
; AVX2-SLOW-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX2-SLOW-NEXT:    vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm2[1,3],ymm0[5,7],ymm2[5,7]
; AVX2-SLOW-NEXT:    retq
;
; AVX2-FAST-ALL-LABEL: trunc8i64_8i32_lshr:
; AVX2-FAST-ALL:       # %bb.0: # %entry
; AVX2-FAST-ALL-NEXT:    vmovaps {{.*#+}} xmm2 = [1,3,5,7]
; AVX2-FAST-ALL-NEXT:    vpermps %ymm0, %ymm2, %ymm0
; AVX2-FAST-ALL-NEXT:    vpermps %ymm1, %ymm2, %ymm1
; AVX2-FAST-ALL-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX2-FAST-ALL-NEXT:    retq
;
; AVX2-FAST-PERLANE-LABEL: trunc8i64_8i32_lshr:
; AVX2-FAST-PERLANE:       # %bb.0: # %entry
; AVX2-FAST-PERLANE-NEXT:    vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3]
; AVX2-FAST-PERLANE-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX2-FAST-PERLANE-NEXT:    vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm2[1,3],ymm0[5,7],ymm2[5,7]
; AVX2-FAST-PERLANE-NEXT:    retq
;
; AVX512-LABEL: trunc8i64_8i32_lshr:
; AVX512:       # %bb.0: # %entry
; AVX512-NEXT:    vpsrlq $32, %zmm0, %zmm0
; AVX512-NEXT:    vpmovqd %zmm0, %ymm0
; AVX512-NEXT:    retq
entry:
  %0 = lshr <8 x i64> %a, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32>
  %1 = trunc <8 x i64> %0 to <8 x i32>
  ret <8 x i32> %1
}

define <8 x i16> @trunc8i64_8i16(<8 x i64> %a) {
; SSE2-SSSE3-LABEL: trunc8i64_8i16:
; SSE2-SSSE3:       # %bb.0: # %entry
; SSE2-SSSE3-NEXT:    shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE2-SSSE3-NEXT:    pslld $16, %xmm2
; SSE2-SSSE3-NEXT:    psrad $16, %xmm2
; SSE2-SSSE3-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE2-SSSE3-NEXT:    pslld $16, %xmm0
; SSE2-SSSE3-NEXT:    psrad $16, %xmm0
; SSE2-SSSE3-NEXT:    packssdw %xmm2, %xmm0
; SSE2-SSSE3-NEXT:    retq
;
; SSE41-LABEL: trunc8i64_8i16:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    pxor %xmm4, %xmm4
; SSE41-NEXT:    pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7]
; SSE41-NEXT:    pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7]
; SSE41-NEXT:    packusdw %xmm3, %xmm2
; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1,2,3],xmm1[4],xmm4[5,6,7]
; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1,2,3],xmm0[4],xmm4[5,6,7]
; SSE41-NEXT:    packusdw %xmm1, %xmm0
; SSE41-NEXT:    packusdw %xmm2, %xmm0
; SSE41-NEXT:    retq
;
; AVX1-LABEL: trunc8i64_8i16:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vbroadcastsd {{.*#+}} ymm2 = [65535,65535,65535,65535]
; AVX1-NEXT:    vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT:    vpackusdw %xmm3, %xmm1, %xmm1
; AVX1-NEXT:    vandps %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vzeroupper
; AVX1-NEXT:    retq
;
; AVX2-LABEL: trunc8i64_8i16:
; AVX2:       # %bb.0: # %entry
; AVX2-NEXT:    vpxor %xmm2, %xmm2, %xmm2
; AVX2-NEXT:    vpblendw {{.*#+}} ymm1 = ymm1[0],ymm2[1,2,3],ymm1[4],ymm2[5,6,7],ymm1[8],ymm2[9,10,11],ymm1[12],ymm2[13,14,15]
; AVX2-NEXT:    vpblendw {{.*#+}} ymm0 = ymm0[0],ymm2[1,2,3],ymm0[4],ymm2[5,6,7],ymm0[8],ymm2[9,10,11],ymm0[12],ymm2[13,14,15]
; AVX2-NEXT:    vpackusdw %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,1,3]
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512-LABEL: trunc8i64_8i16:
; AVX512:       # %bb.0: # %entry
; AVX512-NEXT:    vpmovqw %zmm0, %xmm0
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    retq
entry:
  %0 = trunc <8 x i64> %a to <8 x i16>
  ret <8 x i16> %0
}

define void @trunc8i64_8i8(<8 x i64> %a) {
; SSE2-SSSE3-LABEL: trunc8i64_8i8:
; SSE2-SSSE3:       # %bb.0: # %entry
; SSE2-SSSE3-NEXT:    movdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0]
; SSE2-SSSE3-NEXT:    pand %xmm4, %xmm3
; SSE2-SSSE3-NEXT:    pand %xmm4, %xmm2
; SSE2-SSSE3-NEXT:    packuswb %xmm3, %xmm2
; SSE2-SSSE3-NEXT:    pand %xmm4, %xmm1
; SSE2-SSSE3-NEXT:    pand %xmm4, %xmm0
; SSE2-SSSE3-NEXT:    packuswb %xmm1, %xmm0
; SSE2-SSSE3-NEXT:    packuswb %xmm2, %xmm0
; SSE2-SSSE3-NEXT:    packuswb %xmm0, %xmm0
; SSE2-SSSE3-NEXT:    movq %xmm0, (%rax)
; SSE2-SSSE3-NEXT:    retq
;
; SSE41-LABEL: trunc8i64_8i8:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    pmovzxbq {{.*#+}} xmm4 = [255,255]
; SSE41-NEXT:    pand %xmm4, %xmm3
; SSE41-NEXT:    pand %xmm4, %xmm2
; SSE41-NEXT:    packusdw %xmm3, %xmm2
; SSE41-NEXT:    pand %xmm4, %xmm1
; SSE41-NEXT:    pand %xmm4, %xmm0
; SSE41-NEXT:    packusdw %xmm1, %xmm0
; SSE41-NEXT:    packusdw %xmm2, %xmm0
; SSE41-NEXT:    packuswb %xmm0, %xmm0
; SSE41-NEXT:    movq %xmm0, (%rax)
; SSE41-NEXT:    retq
;
; AVX1-LABEL: trunc8i64_8i8:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vbroadcastsd {{.*#+}} ymm2 = [255,255,255,255]
; AVX1-NEXT:    vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT:    vpackusdw %xmm3, %xmm1, %xmm1
; AVX1-NEXT:    vandps %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vpackuswb %xmm0, %xmm0, %xmm0
; AVX1-NEXT:    vmovq %xmm0, (%rax)
; AVX1-NEXT:    vzeroupper
; AVX1-NEXT:    retq
;
; AVX2-LABEL: trunc8i64_8i8:
; AVX2:       # %bb.0: # %entry
; AVX2-NEXT:    vpbroadcastq {{.*#+}} ymm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0]
; AVX2-NEXT:    vpand %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpand %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpackusdw %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,1,3]
; AVX2-NEXT:    vpackuswb %xmm0, %xmm0, %xmm0
; AVX2-NEXT:    vmovq %xmm0, (%rax)
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512-LABEL: trunc8i64_8i8:
; AVX512:       # %bb.0: # %entry
; AVX512-NEXT:    vpmovqb %zmm0, (%rax)
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    retq
entry:
  %0 = trunc <8 x i64> %a to <8 x i8>
  store <8 x i8> %0, ptr undef, align 4
  ret void
}

define <8 x i16> @trunc8i32_8i16(<8 x i32> %a) {
; SSE2-LABEL: trunc8i32_8i16:
; SSE2:       # %bb.0: # %entry
; SSE2-NEXT:    pslld $16, %xmm1
; SSE2-NEXT:    psrad $16, %xmm1
; SSE2-NEXT:    pslld $16, %xmm0
; SSE2-NEXT:    psrad $16, %xmm0
; SSE2-NEXT:    packssdw %xmm1, %xmm0
; SSE2-NEXT:    retq
;
; SSSE3-LABEL: trunc8i32_8i16:
; SSSE3:       # %bb.0: # %entry
; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
; SSSE3-NEXT:    pshufb %xmm2, %xmm1
; SSSE3-NEXT:    pshufb %xmm2, %xmm0
; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSSE3-NEXT:    retq
;
; SSE41-LABEL: trunc8i32_8i16:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    pxor %xmm2, %xmm2
; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7]
; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7]
; SSE41-NEXT:    packusdw %xmm1, %xmm0
; SSE41-NEXT:    retq
;
; AVX1-LABEL: trunc8i32_8i16:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vzeroupper
; AVX1-NEXT:    retq
;
; AVX2-LABEL: trunc8i32_8i16:
; AVX2:       # %bb.0: # %entry
; AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u,16,17,20,21,24,25,28,29,u,u,u,u,u,u,u,u]
; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
; AVX2-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: trunc8i32_8i16:
; AVX512F:       # %bb.0: # %entry
; AVX512F-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: trunc8i32_8i16:
; AVX512VL:       # %bb.0: # %entry
; AVX512VL-NEXT:    vpmovdw %ymm0, %xmm0
; AVX512VL-NEXT:    vzeroupper
; AVX512VL-NEXT:    retq
;
; AVX512BW-LABEL: trunc8i32_8i16:
; AVX512BW:       # %bb.0: # %entry
; AVX512BW-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512BW-NEXT:    vpmovdw %zmm0, %ymm0
; AVX512BW-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512BW-NEXT:    vzeroupper
; AVX512BW-NEXT:    retq
;
; AVX512BWVL-LABEL: trunc8i32_8i16:
; AVX512BWVL:       # %bb.0: # %entry
; AVX512BWVL-NEXT:    vpmovdw %ymm0, %xmm0
; AVX512BWVL-NEXT:    vzeroupper
; AVX512BWVL-NEXT:    retq
entry:
  %0 = trunc <8 x i32> %a to <8 x i16>
  ret <8 x i16> %0
}

define <8 x i16> @trunc8i32_8i16_ashr(<8 x i32> %a) {
; SSE2-SSSE3-LABEL: trunc8i32_8i16_ashr:
; SSE2-SSSE3:       # %bb.0: # %entry
; SSE2-SSSE3-NEXT:    psrad $16, %xmm1
; SSE2-SSSE3-NEXT:    psrad $16, %xmm0
; SSE2-SSSE3-NEXT:    packssdw %xmm1, %xmm0
; SSE2-SSSE3-NEXT:    retq
;
; SSE41-LABEL: trunc8i32_8i16_ashr:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    psrld $16, %xmm1
; SSE41-NEXT:    psrld $16, %xmm0
; SSE41-NEXT:    packusdw %xmm1, %xmm0
; SSE41-NEXT:    retq
;
; AVX1-LABEL: trunc8i32_8i16_ashr:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT:    vpsrld $16, %xmm1, %xmm1
; AVX1-NEXT:    vpsrld $16, %xmm0, %xmm0
; AVX1-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vzeroupper
; AVX1-NEXT:    retq
;
; AVX2-LABEL: trunc8i32_8i16_ashr:
; AVX2:       # %bb.0: # %entry
; AVX2-NEXT:    vpsrld $16, %ymm0, %ymm0
; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: trunc8i32_8i16_ashr:
; AVX512F:       # %bb.0: # %entry
; AVX512F-NEXT:    vpsrld $16, %ymm0, %ymm0
; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: trunc8i32_8i16_ashr:
; AVX512VL:       # %bb.0: # %entry
; AVX512VL-NEXT:    vpsrld $16, %ymm0, %ymm0
; AVX512VL-NEXT:    vpmovdw %ymm0, %xmm0
; AVX512VL-NEXT:    vzeroupper
; AVX512VL-NEXT:    retq
;
; AVX512BW-LABEL: trunc8i32_8i16_ashr:
; AVX512BW:       # %bb.0: # %entry
; AVX512BW-NEXT:    vpsrld $16, %ymm0, %ymm0
; AVX512BW-NEXT:    vpmovdw %zmm0, %ymm0
; AVX512BW-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512BW-NEXT:    vzeroupper
; AVX512BW-NEXT:    retq
;
; AVX512BWVL-LABEL: trunc8i32_8i16_ashr:
; AVX512BWVL:       # %bb.0: # %entry
; AVX512BWVL-NEXT:    vpsrld $16, %ymm0, %ymm0
; AVX512BWVL-NEXT:    vpmovdw %ymm0, %xmm0
; AVX512BWVL-NEXT:    vzeroupper
; AVX512BWVL-NEXT:    retq
entry:
  %0 = ashr <8 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
  %1 = trunc <8 x i32> %0 to <8 x i16>
  ret <8 x i16> %1
}

define <8 x i16> @trunc8i32_8i16_lshr(<8 x i32> %a) {
; SSE2-SSSE3-LABEL: trunc8i32_8i16_lshr:
; SSE2-SSSE3:       # %bb.0: # %entry
; SSE2-SSSE3-NEXT:    psrad $16, %xmm1
; SSE2-SSSE3-NEXT:    psrad $16, %xmm0
; SSE2-SSSE3-NEXT:    packssdw %xmm1, %xmm0
; SSE2-SSSE3-NEXT:    retq
;
; SSE41-LABEL: trunc8i32_8i16_lshr:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    psrld $16, %xmm1
; SSE41-NEXT:    psrld $16, %xmm0
; SSE41-NEXT:    packusdw %xmm1, %xmm0
; SSE41-NEXT:    retq
;
; AVX1-LABEL: trunc8i32_8i16_lshr:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT:    vpsrld $16, %xmm1, %xmm1
; AVX1-NEXT:    vpsrld $16, %xmm0, %xmm0
; AVX1-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vzeroupper
; AVX1-NEXT:    retq
;
; AVX2-LABEL: trunc8i32_8i16_lshr:
; AVX2:       # %bb.0: # %entry
; AVX2-NEXT:    vpsrld $16, %ymm0, %ymm0
; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: trunc8i32_8i16_lshr:
; AVX512F:       # %bb.0: # %entry
; AVX512F-NEXT:    vpsrld $16, %ymm0, %ymm0
; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: trunc8i32_8i16_lshr:
; AVX512VL:       # %bb.0: # %entry
; AVX512VL-NEXT:    vpsrld $16, %ymm0, %ymm0
; AVX512VL-NEXT:    vpmovdw %ymm0, %xmm0
; AVX512VL-NEXT:    vzeroupper
; AVX512VL-NEXT:    retq
;
; AVX512BW-LABEL: trunc8i32_8i16_lshr:
; AVX512BW:       # %bb.0: # %entry
; AVX512BW-NEXT:    vpsrld $16, %ymm0, %ymm0
; AVX512BW-NEXT:    vpmovdw %zmm0, %ymm0
; AVX512BW-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512BW-NEXT:    vzeroupper
; AVX512BW-NEXT:    retq
;
; AVX512BWVL-LABEL: trunc8i32_8i16_lshr:
; AVX512BWVL:       # %bb.0: # %entry
; AVX512BWVL-NEXT:    vpsrld $16, %ymm0, %ymm0
; AVX512BWVL-NEXT:    vpmovdw %ymm0, %xmm0
; AVX512BWVL-NEXT:    vzeroupper
; AVX512BWVL-NEXT:    retq
entry:
  %0 = lshr <8 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
  %1 = trunc <8 x i32> %0 to <8 x i16>
  ret <8 x i16> %1
}

define void @trunc8i32_8i8(<8 x i32> %a) {
; SSE2-SSSE3-LABEL: trunc8i32_8i8:
; SSE2-SSSE3:       # %bb.0: # %entry
; SSE2-SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
; SSE2-SSSE3-NEXT:    pand %xmm2, %xmm1
; SSE2-SSSE3-NEXT:    pand %xmm2, %xmm0
; SSE2-SSSE3-NEXT:    packuswb %xmm1, %xmm0
; SSE2-SSSE3-NEXT:    packuswb %xmm0, %xmm0
; SSE2-SSSE3-NEXT:    movq %xmm0, (%rax)
; SSE2-SSSE3-NEXT:    retq
;
; SSE41-LABEL: trunc8i32_8i8:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    pmovzxbd {{.*#+}} xmm2 = [255,255,255,255]
; SSE41-NEXT:    pand %xmm2, %xmm1
; SSE41-NEXT:    pand %xmm2, %xmm0
; SSE41-NEXT:    packusdw %xmm1, %xmm0
; SSE41-NEXT:    packuswb %xmm0, %xmm0
; SSE41-NEXT:    movq %xmm0, (%rax)
; SSE41-NEXT:    retq
;
; AVX1-LABEL: trunc8i32_8i8:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT:    vmovd {{.*#+}} xmm2 = [0,4,8,12,0,0,0,0,0,0,0,0,0,0,0,0]
; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
; AVX1-NEXT:    vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; AVX1-NEXT:    vmovq %xmm0, (%rax)
; AVX1-NEXT:    vzeroupper
; AVX1-NEXT:    retq
;
; AVX2-LABEL: trunc8i32_8i8:
; AVX2:       # %bb.0: # %entry
; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT:    vmovd {{.*#+}} xmm2 = [0,4,8,12,0,0,0,0,0,0,0,0,0,0,0,0]
; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
; AVX2-NEXT:    vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; AVX2-NEXT:    vmovq %xmm0, (%rax)
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: trunc8i32_8i8:
; AVX512F:       # %bb.0: # %entry
; AVX512F-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512F-NEXT:    vpmovdb %zmm0, %xmm0
; AVX512F-NEXT:    vmovq %xmm0, (%rax)
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: trunc8i32_8i8:
; AVX512VL:       # %bb.0: # %entry
; AVX512VL-NEXT:    vpmovdb %ymm0, (%rax)
; AVX512VL-NEXT:    vzeroupper
; AVX512VL-NEXT:    retq
;
; AVX512BW-LABEL: trunc8i32_8i8:
; AVX512BW:       # %bb.0: # %entry
; AVX512BW-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512BW-NEXT:    vpmovdb %zmm0, %xmm0
; AVX512BW-NEXT:    vmovq %xmm0, (%rax)
; AVX512BW-NEXT:    vzeroupper
; AVX512BW-NEXT:    retq
;
; AVX512BWVL-LABEL: trunc8i32_8i8:
; AVX512BWVL:       # %bb.0: # %entry
; AVX512BWVL-NEXT:    vpmovdb %ymm0, (%rax)
; AVX512BWVL-NEXT:    vzeroupper
; AVX512BWVL-NEXT:    retq
entry:
  %0 = trunc <8 x i32> %a to <8 x i8>
  store <8 x i8> %0, ptr undef, align 4
  ret void
}

define void @trunc16i32_16i16(<16 x i32> %a) {
; SSE2-LABEL: trunc16i32_16i16:
; SSE2:       # %bb.0: # %entry
; SSE2-NEXT:    pslld $16, %xmm1
; SSE2-NEXT:    psrad $16, %xmm1
; SSE2-NEXT:    pslld $16, %xmm0
; SSE2-NEXT:    psrad $16, %xmm0
; SSE2-NEXT:    packssdw %xmm1, %xmm0
; SSE2-NEXT:    pslld $16, %xmm3
; SSE2-NEXT:    psrad $16, %xmm3
; SSE2-NEXT:    pslld $16, %xmm2
; SSE2-NEXT:    psrad $16, %xmm2
; SSE2-NEXT:    packssdw %xmm3, %xmm2
; SSE2-NEXT:    movdqu %xmm2, (%rax)
; SSE2-NEXT:    movdqu %xmm0, (%rax)
; SSE2-NEXT:    retq
;
; SSSE3-LABEL: trunc16i32_16i16:
; SSSE3:       # %bb.0: # %entry
; SSSE3-NEXT:    movdqa {{.*#+}} xmm4 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
; SSSE3-NEXT:    pshufb %xmm4, %xmm1
; SSSE3-NEXT:    pshufb %xmm4, %xmm0
; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSSE3-NEXT:    pshufb %xmm4, %xmm3
; SSSE3-NEXT:    pshufb %xmm4, %xmm2
; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
; SSSE3-NEXT:    movdqu %xmm2, (%rax)
; SSSE3-NEXT:    movdqu %xmm0, (%rax)
; SSSE3-NEXT:    retq
;
; SSE41-LABEL: trunc16i32_16i16:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    pxor %xmm4, %xmm4
; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1],xmm1[2],xmm4[3],xmm1[4],xmm4[5],xmm1[6],xmm4[7]
; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1],xmm0[2],xmm4[3],xmm0[4],xmm4[5],xmm0[6],xmm4[7]
; SSE41-NEXT:    packusdw %xmm1, %xmm0
; SSE41-NEXT:    pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1],xmm3[2],xmm4[3],xmm3[4],xmm4[5],xmm3[6],xmm4[7]
; SSE41-NEXT:    pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1],xmm2[2],xmm4[3],xmm2[4],xmm4[5],xmm2[6],xmm4[7]
; SSE41-NEXT:    packusdw %xmm3, %xmm2
; SSE41-NEXT:    movdqu %xmm2, (%rax)
; SSE41-NEXT:    movdqu %xmm0, (%rax)
; SSE41-NEXT:    retq
;
; AVX1-LABEL: trunc16i32_16i16:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vbroadcastss {{.*#+}} ymm2 = [65535,65535,65535,65535,65535,65535,65535,65535]
; AVX1-NEXT:    vandps %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT:    vpackusdw %xmm3, %xmm0, %xmm0
; AVX1-NEXT:    vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT:    vpackusdw %xmm2, %xmm1, %xmm1
; AVX1-NEXT:    vmovdqu %xmm1, (%rax)
; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
; AVX1-NEXT:    vzeroupper
; AVX1-NEXT:    retq
;
; AVX2-LABEL: trunc16i32_16i16:
; AVX2:       # %bb.0: # %entry
; AVX2-NEXT:    vpxor %xmm2, %xmm2, %xmm2
; AVX2-NEXT:    vpblendw {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2],ymm2[3],ymm1[4],ymm2[5],ymm1[6],ymm2[7],ymm1[8],ymm2[9],ymm1[10],ymm2[11],ymm1[12],ymm2[13],ymm1[14],ymm2[15]
; AVX2-NEXT:    vpblendw {{.*#+}} ymm0 = ymm0[0],ymm2[1],ymm0[2],ymm2[3],ymm0[4],ymm2[5],ymm0[6],ymm2[7],ymm0[8],ymm2[9],ymm0[10],ymm2[11],ymm0[12],ymm2[13],ymm0[14],ymm2[15]
; AVX2-NEXT:    vpackusdw %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
; AVX2-NEXT:    vmovdqu %ymm0, (%rax)
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512-LABEL: trunc16i32_16i16:
; AVX512:       # %bb.0: # %entry
; AVX512-NEXT:    vpmovdw %zmm0, (%rax)
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    retq
entry:
  %0 = trunc <16 x i32> %a to <16 x i16>
  store <16 x i16> %0, ptr undef, align 4
  ret void
}

define void @trunc16i32_16i16_ashr(<16 x i32> %a) {
; SSE2-SSSE3-LABEL: trunc16i32_16i16_ashr:
; SSE2-SSSE3:       # %bb.0: # %entry
; SSE2-SSSE3-NEXT:    psrad $16, %xmm1
; SSE2-SSSE3-NEXT:    psrad $16, %xmm0
; SSE2-SSSE3-NEXT:    packssdw %xmm1, %xmm0
; SSE2-SSSE3-NEXT:    psrad $16, %xmm3
; SSE2-SSSE3-NEXT:    psrad $16, %xmm2
; SSE2-SSSE3-NEXT:    packssdw %xmm3, %xmm2
; SSE2-SSSE3-NEXT:    movdqu %xmm2, (%rax)
; SSE2-SSSE3-NEXT:    movdqu %xmm0, (%rax)
; SSE2-SSSE3-NEXT:    retq
;
; SSE41-LABEL: trunc16i32_16i16_ashr:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    psrld $16, %xmm3
; SSE41-NEXT:    psrld $16, %xmm2
; SSE41-NEXT:    packusdw %xmm3, %xmm2
; SSE41-NEXT:    psrld $16, %xmm1
; SSE41-NEXT:    psrld $16, %xmm0
; SSE41-NEXT:    packusdw %xmm1, %xmm0
; SSE41-NEXT:    movdqu %xmm2, (%rax)
; SSE41-NEXT:    movdqu %xmm0, (%rax)
; SSE41-NEXT:    retq
;
; AVX1-LABEL: trunc16i32_16i16_ashr:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT:    vpsrld $16, %xmm2, %xmm2
; AVX1-NEXT:    vpsrld $16, %xmm1, %xmm1
; AVX1-NEXT:    vpackusdw %xmm2, %xmm1, %xmm1
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT:    vpsrld $16, %xmm2, %xmm2
; AVX1-NEXT:    vpsrld $16, %xmm0, %xmm0
; AVX1-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT:    vmovdqu %xmm1, (%rax)
; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
; AVX1-NEXT:    vzeroupper
; AVX1-NEXT:    retq
;
; AVX2-LABEL: trunc16i32_16i16_ashr:
; AVX2:       # %bb.0: # %entry
; AVX2-NEXT:    vpsrld $16, %ymm1, %ymm1
; AVX2-NEXT:    vpsrld $16, %ymm0, %ymm0
; AVX2-NEXT:    vpackusdw %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
; AVX2-NEXT:    vmovdqu %ymm0, (%rax)
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512-LABEL: trunc16i32_16i16_ashr:
; AVX512:       # %bb.0: # %entry
; AVX512-NEXT:    vpsrld $16, %zmm0, %zmm0
; AVX512-NEXT:    vpmovdw %zmm0, (%rax)
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    retq
entry:
  %0 = ashr <16 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
  %1 = trunc <16 x i32> %0 to <16 x i16>
  store <16 x i16> %1, ptr undef, align 4
  ret void
}

define void @trunc16i32_16i16_lshr(<16 x i32> %a) {
; SSE2-SSSE3-LABEL: trunc16i32_16i16_lshr:
; SSE2-SSSE3:       # %bb.0: # %entry
; SSE2-SSSE3-NEXT:    psrad $16, %xmm1
; SSE2-SSSE3-NEXT:    psrad $16, %xmm0
; SSE2-SSSE3-NEXT:    packssdw %xmm1, %xmm0
; SSE2-SSSE3-NEXT:    psrad $16, %xmm3
; SSE2-SSSE3-NEXT:    psrad $16, %xmm2
; SSE2-SSSE3-NEXT:    packssdw %xmm3, %xmm2
; SSE2-SSSE3-NEXT:    movdqu %xmm2, (%rax)
; SSE2-SSSE3-NEXT:    movdqu %xmm0, (%rax)
; SSE2-SSSE3-NEXT:    retq
;
; SSE41-LABEL: trunc16i32_16i16_lshr:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    psrld $16, %xmm3
; SSE41-NEXT:    psrld $16, %xmm2
; SSE41-NEXT:    packusdw %xmm3, %xmm2
; SSE41-NEXT:    psrld $16, %xmm1
; SSE41-NEXT:    psrld $16, %xmm0
; SSE41-NEXT:    packusdw %xmm1, %xmm0
; SSE41-NEXT:    movdqu %xmm2, (%rax)
; SSE41-NEXT:    movdqu %xmm0, (%rax)
; SSE41-NEXT:    retq
;
; AVX1-LABEL: trunc16i32_16i16_lshr:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT:    vpsrld $16, %xmm2, %xmm2
; AVX1-NEXT:    vpsrld $16, %xmm1, %xmm1
; AVX1-NEXT:    vpackusdw %xmm2, %xmm1, %xmm1
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT:    vpsrld $16, %xmm2, %xmm2
; AVX1-NEXT:    vpsrld $16, %xmm0, %xmm0
; AVX1-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT:    vmovdqu %xmm1, (%rax)
; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
; AVX1-NEXT:    vzeroupper
; AVX1-NEXT:    retq
;
; AVX2-LABEL: trunc16i32_16i16_lshr:
; AVX2:       # %bb.0: # %entry
; AVX2-NEXT:    vpsrld $16, %ymm1, %ymm1
; AVX2-NEXT:    vpsrld $16, %ymm0, %ymm0
; AVX2-NEXT:    vpackusdw %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
; AVX2-NEXT:    vmovdqu %ymm0, (%rax)
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512-LABEL: trunc16i32_16i16_lshr:
; AVX512:       # %bb.0: # %entry
; AVX512-NEXT:    vpsrld $16, %zmm0, %zmm0
; AVX512-NEXT:    vpmovdw %zmm0, (%rax)
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    retq
entry:
  %0 = lshr <16 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
  %1 = trunc <16 x i32> %0 to <16 x i16>
  store <16 x i16> %1, ptr undef, align 4
  ret void
}

define void @trunc16i32_16i8(<16 x i32> %a) {
; SSE2-SSSE3-LABEL: trunc16i32_16i8:
; SSE2-SSSE3:       # %bb.0: # %entry
; SSE2-SSSE3-NEXT:    movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
; SSE2-SSSE3-NEXT:    pand %xmm4, %xmm3
; SSE2-SSSE3-NEXT:    pand %xmm4, %xmm2
; SSE2-SSSE3-NEXT:    packuswb %xmm3, %xmm2
; SSE2-SSSE3-NEXT:    pand %xmm4, %xmm1
; SSE2-SSSE3-NEXT:    pand %xmm4, %xmm0
; SSE2-SSSE3-NEXT:    packuswb %xmm1, %xmm0
; SSE2-SSSE3-NEXT:    packuswb %xmm2, %xmm0
; SSE2-SSSE3-NEXT:    movdqu %xmm0, (%rax)
; SSE2-SSSE3-NEXT:    retq
;
; SSE41-LABEL: trunc16i32_16i8:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    pmovzxbd {{.*#+}} xmm4 = [255,255,255,255]
; SSE41-NEXT:    pand %xmm4, %xmm3
; SSE41-NEXT:    pand %xmm4, %xmm2
; SSE41-NEXT:    packusdw %xmm3, %xmm2
; SSE41-NEXT:    pand %xmm4, %xmm1
; SSE41-NEXT:    pand %xmm4, %xmm0
; SSE41-NEXT:    packusdw %xmm1, %xmm0
; SSE41-NEXT:    packuswb %xmm2, %xmm0
; SSE41-NEXT:    movdqu %xmm0, (%rax)
; SSE41-NEXT:    retq
;
; AVX1-LABEL: trunc16i32_16i8:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vbroadcastss {{.*#+}} ymm2 = [255,255,255,255,255,255,255,255]
; AVX1-NEXT:    vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT:    vpackusdw %xmm3, %xmm1, %xmm1
; AVX1-NEXT:    vandps %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
; AVX1-NEXT:    vzeroupper
; AVX1-NEXT:    retq
;
; AVX2-LABEL: trunc16i32_16i8:
; AVX2:       # %bb.0: # %entry
; AVX2-NEXT:    vpbroadcastd {{.*#+}} ymm2 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
; AVX2-NEXT:    vpand %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpand %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpackusdw %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,1,3]
; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512-LABEL: trunc16i32_16i8:
; AVX512:       # %bb.0: # %entry
; AVX512-NEXT:    vpmovdb %zmm0, (%rax)
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    retq
entry:
  %0 = trunc <16 x i32> %a to <16 x i8>
  store <16 x i8> %0, ptr undef, align 4
  ret void
}

define void @trunc16i32_16i8_ashr(<16 x i32> %a) {
; SSE2-SSSE3-LABEL: trunc16i32_16i8_ashr:
; SSE2-SSSE3:       # %bb.0: # %entry
; SSE2-SSSE3-NEXT:    psrld $24, %xmm1
; SSE2-SSSE3-NEXT:    psrld $24, %xmm0
; SSE2-SSSE3-NEXT:    packuswb %xmm1, %xmm0
; SSE2-SSSE3-NEXT:    psrld $24, %xmm3
; SSE2-SSSE3-NEXT:    psrld $24, %xmm2
; SSE2-SSSE3-NEXT:    packuswb %xmm3, %xmm2
; SSE2-SSSE3-NEXT:    packuswb %xmm2, %xmm0
; SSE2-SSSE3-NEXT:    movdqu %xmm0, (%rax)
; SSE2-SSSE3-NEXT:    retq
;
; SSE41-LABEL: trunc16i32_16i8_ashr:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    psrld $24, %xmm1
; SSE41-NEXT:    psrld $24, %xmm0
; SSE41-NEXT:    packusdw %xmm1, %xmm0
; SSE41-NEXT:    psrld $24, %xmm3
; SSE41-NEXT:    psrld $24, %xmm2
; SSE41-NEXT:    packusdw %xmm3, %xmm2
; SSE41-NEXT:    packuswb %xmm2, %xmm0
; SSE41-NEXT:    movdqu %xmm0, (%rax)
; SSE41-NEXT:    retq
;
; AVX1-LABEL: trunc16i32_16i8_ashr:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT:    vpsrld $24, %xmm2, %xmm2
; AVX1-NEXT:    vpsrld $24, %xmm0, %xmm0
; AVX1-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT:    vpsrld $24, %xmm2, %xmm2
; AVX1-NEXT:    vpsrld $24, %xmm1, %xmm1
; AVX1-NEXT:    vpackusdw %xmm2, %xmm1, %xmm1
; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
; AVX1-NEXT:    vzeroupper
; AVX1-NEXT:    retq
;
; AVX2-LABEL: trunc16i32_16i8_ashr:
; AVX2:       # %bb.0: # %entry
; AVX2-NEXT:    vpsrld $24, %ymm1, %ymm1
; AVX2-NEXT:    vpsrld $24, %ymm0, %ymm0
; AVX2-NEXT:    vpackusdw %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,1,3]
; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512-LABEL: trunc16i32_16i8_ashr:
; AVX512:       # %bb.0: # %entry
; AVX512-NEXT:    vpsrld $24, %zmm0, %zmm0
; AVX512-NEXT:    vpmovdb %zmm0, (%rax)
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    retq
entry:
  %0 = ashr <16 x i32> %a, <i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24>
  %1 = trunc <16 x i32> %0 to <16 x i8>
  store <16 x i8> %1, ptr undef, align 4
  ret void
}

define void @trunc16i32_16i8_lshr(<16 x i32> %a) {
; SSE2-SSSE3-LABEL: trunc16i32_16i8_lshr:
; SSE2-SSSE3:       # %bb.0: # %entry
; SSE2-SSSE3-NEXT:    psrld $24, %xmm1
; SSE2-SSSE3-NEXT:    psrld $24, %xmm0
; SSE2-SSSE3-NEXT:    packuswb %xmm1, %xmm0
; SSE2-SSSE3-NEXT:    psrld $24, %xmm3
; SSE2-SSSE3-NEXT:    psrld $24, %xmm2
; SSE2-SSSE3-NEXT:    packuswb %xmm3, %xmm2
; SSE2-SSSE3-NEXT:    packuswb %xmm2, %xmm0
; SSE2-SSSE3-NEXT:    movdqu %xmm0, (%rax)
; SSE2-SSSE3-NEXT:    retq
;
; SSE41-LABEL: trunc16i32_16i8_lshr:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    psrld $24, %xmm1
; SSE41-NEXT:    psrld $24, %xmm0
; SSE41-NEXT:    packusdw %xmm1, %xmm0
; SSE41-NEXT:    psrld $24, %xmm3
; SSE41-NEXT:    psrld $24, %xmm2
; SSE41-NEXT:    packusdw %xmm3, %xmm2
; SSE41-NEXT:    packuswb %xmm2, %xmm0
; SSE41-NEXT:    movdqu %xmm0, (%rax)
; SSE41-NEXT:    retq
;
; AVX1-LABEL: trunc16i32_16i8_lshr:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT:    vpsrld $24, %xmm2, %xmm2
; AVX1-NEXT:    vpsrld $24, %xmm0, %xmm0
; AVX1-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT:    vpsrld $24, %xmm2, %xmm2
; AVX1-NEXT:    vpsrld $24, %xmm1, %xmm1
; AVX1-NEXT:    vpackusdw %xmm2, %xmm1, %xmm1
; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
; AVX1-NEXT:    vzeroupper
; AVX1-NEXT:    retq
;
; AVX2-LABEL: trunc16i32_16i8_lshr:
; AVX2:       # %bb.0: # %entry
; AVX2-NEXT:    vpsrld $24, %ymm1, %ymm1
; AVX2-NEXT:    vpsrld $24, %ymm0, %ymm0
; AVX2-NEXT:    vpackusdw %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,1,3]
; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512-LABEL: trunc16i32_16i8_lshr:
; AVX512:       # %bb.0: # %entry
; AVX512-NEXT:    vpsrld $24, %zmm0, %zmm0
; AVX512-NEXT:    vpmovdb %zmm0, (%rax)
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    retq
entry:
  %0 = lshr <16 x i32> %a, <i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24>
  %1 = trunc <16 x i32> %0 to <16 x i8>
  store <16 x i8> %1, ptr undef, align 4
  ret void
}

;PR25684
define void @trunc16i16_16i8(<16 x i16> %a) {
; SSE2-SSSE3-LABEL: trunc16i16_16i8:
; SSE2-SSSE3:       # %bb.0: # %entry
; SSE2-SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0]
; SSE2-SSSE3-NEXT:    pand %xmm2, %xmm1
; SSE2-SSSE3-NEXT:    pand %xmm2, %xmm0
; SSE2-SSSE3-NEXT:    packuswb %xmm1, %xmm0
; SSE2-SSSE3-NEXT:    movdqu %xmm0, (%rax)
; SSE2-SSSE3-NEXT:    retq
;
; SSE41-LABEL: trunc16i16_16i8:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    pmovzxbw {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
; SSE41-NEXT:    pand %xmm2, %xmm1
; SSE41-NEXT:    pand %xmm2, %xmm0
; SSE41-NEXT:    packuswb %xmm1, %xmm0
; SSE41-NEXT:    movdqu %xmm0, (%rax)
; SSE41-NEXT:    retq
;
; AVX1-LABEL: trunc16i16_16i8:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
; AVX1-NEXT:    vzeroupper
; AVX1-NEXT:    retq
;
; AVX2-LABEL: trunc16i16_16i8:
; AVX2:       # %bb.0: # %entry
; AVX2-NEXT:    vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: trunc16i16_16i8:
; AVX512F:       # %bb.0: # %entry
; AVX512F-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
; AVX512F-NEXT:    vpmovdb %zmm0, (%rax)
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: trunc16i16_16i8:
; AVX512VL:       # %bb.0: # %entry
; AVX512VL-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
; AVX512VL-NEXT:    vpmovdb %zmm0, (%rax)
; AVX512VL-NEXT:    vzeroupper
; AVX512VL-NEXT:    retq
;
; AVX512BW-LABEL: trunc16i16_16i8:
; AVX512BW:       # %bb.0: # %entry
; AVX512BW-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512BW-NEXT:    vpmovwb %zmm0, %ymm0
; AVX512BW-NEXT:    vmovdqu %xmm0, (%rax)
; AVX512BW-NEXT:    vzeroupper
; AVX512BW-NEXT:    retq
;
; AVX512BWVL-LABEL: trunc16i16_16i8:
; AVX512BWVL:       # %bb.0: # %entry
; AVX512BWVL-NEXT:    vpmovwb %ymm0, (%rax)
; AVX512BWVL-NEXT:    vzeroupper
; AVX512BWVL-NEXT:    retq
entry:
  %0 = trunc <16 x i16> %a to <16 x i8>
  store <16 x i8> %0, ptr undef, align 4
  ret void
}

define void @trunc16i16_16i8_ashr(<16 x i16> %a) {
; SSE-LABEL: trunc16i16_16i8_ashr:
; SSE:       # %bb.0: # %entry
; SSE-NEXT:    psrlw $8, %xmm1
; SSE-NEXT:    psrlw $8, %xmm0
; SSE-NEXT:    packuswb %xmm1, %xmm0
; SSE-NEXT:    movdqu %xmm0, (%rax)
; SSE-NEXT:    retq
;
; AVX1-LABEL: trunc16i16_16i8_ashr:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT:    vpsrlw $8, %xmm1, %xmm1
; AVX1-NEXT:    vpsrlw $8, %xmm0, %xmm0
; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
; AVX1-NEXT:    vzeroupper
; AVX1-NEXT:    retq
;
; AVX2-LABEL: trunc16i16_16i8_ashr:
; AVX2:       # %bb.0: # %entry
; AVX2-NEXT:    vpsrlw $8, %ymm0, %ymm0
; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: trunc16i16_16i8_ashr:
; AVX512F:       # %bb.0: # %entry
; AVX512F-NEXT:    vpsrlw $8, %ymm0, %ymm0
; AVX512F-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
; AVX512F-NEXT:    vpmovdb %zmm0, (%rax)
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: trunc16i16_16i8_ashr:
; AVX512VL:       # %bb.0: # %entry
; AVX512VL-NEXT:    vpsrlw $8, %ymm0, %ymm0
; AVX512VL-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
; AVX512VL-NEXT:    vpmovdb %zmm0, (%rax)
; AVX512VL-NEXT:    vzeroupper
; AVX512VL-NEXT:    retq
;
; AVX512BW-LABEL: trunc16i16_16i8_ashr:
; AVX512BW:       # %bb.0: # %entry
; AVX512BW-NEXT:    vpsrlw $8, %ymm0, %ymm0
; AVX512BW-NEXT:    vpmovwb %zmm0, %ymm0
; AVX512BW-NEXT:    vmovdqu %xmm0, (%rax)
; AVX512BW-NEXT:    vzeroupper
; AVX512BW-NEXT:    retq
;
; AVX512BWVL-LABEL: trunc16i16_16i8_ashr:
; AVX512BWVL:       # %bb.0: # %entry
; AVX512BWVL-NEXT:    vpsrlw $8, %ymm0, %ymm0
; AVX512BWVL-NEXT:    vpmovwb %ymm0, (%rax)
; AVX512BWVL-NEXT:    vzeroupper
; AVX512BWVL-NEXT:    retq
entry:
  %0 = ashr <16 x i16> %a, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
  %1 = trunc <16 x i16> %0 to <16 x i8>
  store <16 x i8> %1, ptr undef, align 4
  ret void
}

define void @trunc16i16_16i8_lshr(<16 x i16> %a) {
; SSE-LABEL: trunc16i16_16i8_lshr:
; SSE:       # %bb.0: # %entry
; SSE-NEXT:    psrlw $8, %xmm1
; SSE-NEXT:    psrlw $8, %xmm0
; SSE-NEXT:    packuswb %xmm1, %xmm0
; SSE-NEXT:    movdqu %xmm0, (%rax)
; SSE-NEXT:    retq
;
; AVX1-LABEL: trunc16i16_16i8_lshr:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT:    vpsrlw $8, %xmm1, %xmm1
; AVX1-NEXT:    vpsrlw $8, %xmm0, %xmm0
; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
; AVX1-NEXT:    vzeroupper
; AVX1-NEXT:    retq
;
; AVX2-LABEL: trunc16i16_16i8_lshr:
; AVX2:       # %bb.0: # %entry
; AVX2-NEXT:    vpsrlw $8, %ymm0, %ymm0
; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: trunc16i16_16i8_lshr:
; AVX512F:       # %bb.0: # %entry
; AVX512F-NEXT:    vpsrlw $8, %ymm0, %ymm0
; AVX512F-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
; AVX512F-NEXT:    vpmovdb %zmm0, (%rax)
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: trunc16i16_16i8_lshr:
; AVX512VL:       # %bb.0: # %entry
; AVX512VL-NEXT:    vpsrlw $8, %ymm0, %ymm0
; AVX512VL-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
; AVX512VL-NEXT:    vpmovdb %zmm0, (%rax)
; AVX512VL-NEXT:    vzeroupper
; AVX512VL-NEXT:    retq
;
; AVX512BW-LABEL: trunc16i16_16i8_lshr:
; AVX512BW:       # %bb.0: # %entry
; AVX512BW-NEXT:    vpsrlw $8, %ymm0, %ymm0
; AVX512BW-NEXT:    vpmovwb %zmm0, %ymm0
; AVX512BW-NEXT:    vmovdqu %xmm0, (%rax)
; AVX512BW-NEXT:    vzeroupper
; AVX512BW-NEXT:    retq
;
; AVX512BWVL-LABEL: trunc16i16_16i8_lshr:
; AVX512BWVL:       # %bb.0: # %entry
; AVX512BWVL-NEXT:    vpsrlw $8, %ymm0, %ymm0
; AVX512BWVL-NEXT:    vpmovwb %ymm0, (%rax)
; AVX512BWVL-NEXT:    vzeroupper
; AVX512BWVL-NEXT:    retq
entry:
  %0 = lshr <16 x i16> %a, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
  %1 = trunc <16 x i16> %0 to <16 x i8>
  store <16 x i8> %1, ptr undef, align 4
  ret void
}

define void @trunc32i16_32i8(<32 x i16> %a) {
; SSE2-SSSE3-LABEL: trunc32i16_32i8:
; SSE2-SSSE3:       # %bb.0: # %entry
; SSE2-SSSE3-NEXT:    movdqa {{.*#+}} xmm4 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0]
; SSE2-SSSE3-NEXT:    pand %xmm4, %xmm1
; SSE2-SSSE3-NEXT:    pand %xmm4, %xmm0
; SSE2-SSSE3-NEXT:    packuswb %xmm1, %xmm0
; SSE2-SSSE3-NEXT:    pand %xmm4, %xmm3
; SSE2-SSSE3-NEXT:    pand %xmm4, %xmm2
; SSE2-SSSE3-NEXT:    packuswb %xmm3, %xmm2
; SSE2-SSSE3-NEXT:    movdqu %xmm2, (%rax)
; SSE2-SSSE3-NEXT:    movdqu %xmm0, (%rax)
; SSE2-SSSE3-NEXT:    retq
;
; SSE41-LABEL: trunc32i16_32i8:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    pmovzxbw {{.*#+}} xmm4 = [255,255,255,255,255,255,255,255]
; SSE41-NEXT:    pand %xmm4, %xmm1
; SSE41-NEXT:    pand %xmm4, %xmm0
; SSE41-NEXT:    packuswb %xmm1, %xmm0
; SSE41-NEXT:    pand %xmm4, %xmm3
; SSE41-NEXT:    pand %xmm4, %xmm2
; SSE41-NEXT:    packuswb %xmm3, %xmm2
; SSE41-NEXT:    movdqu %xmm2, (%rax)
; SSE41-NEXT:    movdqu %xmm0, (%rax)
; SSE41-NEXT:    retq
;
; AVX1-LABEL: trunc32i16_32i8:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vbroadcastss {{.*#+}} ymm2 = [255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255]
; AVX1-NEXT:    vandps %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT:    vpackuswb %xmm3, %xmm0, %xmm0
; AVX1-NEXT:    vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT:    vpackuswb %xmm2, %xmm1, %xmm1
; AVX1-NEXT:    vmovdqu %xmm1, (%rax)
; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
; AVX1-NEXT:    vzeroupper
; AVX1-NEXT:    retq
;
; AVX2-LABEL: trunc32i16_32i8:
; AVX2:       # %bb.0: # %entry
; AVX2-NEXT:    vpbroadcastw {{.*#+}} ymm2 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0]
; AVX2-NEXT:    vpand %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpand %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpackuswb %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
; AVX2-NEXT:    vmovdqu %ymm0, (%rax)
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: trunc32i16_32i8:
; AVX512F:       # %bb.0: # %entry
; AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
; AVX512F-NEXT:    vpmovzxwd {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero
; AVX512F-NEXT:    vpmovdb %zmm1, (%rax)
; AVX512F-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
; AVX512F-NEXT:    vpmovdb %zmm0, (%rax)
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: trunc32i16_32i8:
; AVX512VL:       # %bb.0: # %entry
; AVX512VL-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
; AVX512VL-NEXT:    vpmovzxwd {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero
; AVX512VL-NEXT:    vpmovdb %zmm1, (%rax)
; AVX512VL-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
; AVX512VL-NEXT:    vpmovdb %zmm0, (%rax)
; AVX512VL-NEXT:    vzeroupper
; AVX512VL-NEXT:    retq
;
; AVX512BW-LABEL: trunc32i16_32i8:
; AVX512BW:       # %bb.0: # %entry
; AVX512BW-NEXT:    vpmovwb %zmm0, (%rax)
; AVX512BW-NEXT:    vzeroupper
; AVX512BW-NEXT:    retq
;
; AVX512BWVL-LABEL: trunc32i16_32i8:
; AVX512BWVL:       # %bb.0: # %entry
; AVX512BWVL-NEXT:    vpmovwb %zmm0, (%rax)
; AVX512BWVL-NEXT:    vzeroupper
; AVX512BWVL-NEXT:    retq
entry:
  %0 = trunc <32 x i16> %a to <32 x i8>
  store <32 x i8> %0, ptr undef, align 4
  ret void
}

define <8 x i32> @trunc2x4i64_8i32(<4 x i64> %a, <4 x i64> %b) {
; SSE-LABEL: trunc2x4i64_8i32:
; SSE:       # %bb.0: # %entry
; SSE-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE-NEXT:    shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE-NEXT:    movaps %xmm2, %xmm1
; SSE-NEXT:    retq
;
; AVX1-LABEL: trunc2x4i64_8i32:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3]
; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT:    vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm2[0,2],ymm0[4,6],ymm2[4,6]
; AVX1-NEXT:    retq
;
; AVX2-SLOW-LABEL: trunc2x4i64_8i32:
; AVX2-SLOW:       # %bb.0: # %entry
; AVX2-SLOW-NEXT:    vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3]
; AVX2-SLOW-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX2-SLOW-NEXT:    vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm2[0,2],ymm0[4,6],ymm2[4,6]
; AVX2-SLOW-NEXT:    retq
;
; AVX2-FAST-ALL-LABEL: trunc2x4i64_8i32:
; AVX2-FAST-ALL:       # %bb.0: # %entry
; AVX2-FAST-ALL-NEXT:    vmovaps {{.*#+}} ymm2 = [0,2,4,6,4,6,6,7]
; AVX2-FAST-ALL-NEXT:    vpermps %ymm0, %ymm2, %ymm0
; AVX2-FAST-ALL-NEXT:    vpermps %ymm1, %ymm2, %ymm1
; AVX2-FAST-ALL-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX2-FAST-ALL-NEXT:    retq
;
; AVX2-FAST-PERLANE-LABEL: trunc2x4i64_8i32:
; AVX2-FAST-PERLANE:       # %bb.0: # %entry
; AVX2-FAST-PERLANE-NEXT:    vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3]
; AVX2-FAST-PERLANE-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX2-FAST-PERLANE-NEXT:    vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm2[0,2],ymm0[4,6],ymm2[4,6]
; AVX2-FAST-PERLANE-NEXT:    retq
;
; AVX512-LABEL: trunc2x4i64_8i32:
; AVX512:       # %bb.0: # %entry
; AVX512-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512-NEXT:    vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; AVX512-NEXT:    vpmovqd %zmm0, %ymm0
; AVX512-NEXT:    retq
entry:
  %0 = trunc <4 x i64> %a to <4 x i32>
  %1 = trunc <4 x i64> %b to <4 x i32>
  %2 = shufflevector <4 x i32> %0, <4 x i32> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
  ret <8 x i32> %2
}

define <8 x i16> @trunc2x4i64_8i16(<4 x i64> %a, <4 x i64> %b) {
; SSE2-SSSE3-LABEL: trunc2x4i64_8i16:
; SSE2-SSSE3:       # %bb.0: # %entry
; SSE2-SSSE3-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE2-SSSE3-NEXT:    pslld $16, %xmm0
; SSE2-SSSE3-NEXT:    psrad $16, %xmm0
; SSE2-SSSE3-NEXT:    shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE2-SSSE3-NEXT:    pslld $16, %xmm2
; SSE2-SSSE3-NEXT:    psrad $16, %xmm2
; SSE2-SSSE3-NEXT:    packssdw %xmm2, %xmm0
; SSE2-SSSE3-NEXT:    retq
;
; SSE41-LABEL: trunc2x4i64_8i16:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    pxor %xmm4, %xmm4
; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1,2,3],xmm1[4],xmm4[5,6,7]
; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1,2,3],xmm0[4],xmm4[5,6,7]
; SSE41-NEXT:    packusdw %xmm1, %xmm0
; SSE41-NEXT:    pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7]
; SSE41-NEXT:    pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7]
; SSE41-NEXT:    packusdw %xmm3, %xmm2
; SSE41-NEXT:    packusdw %xmm2, %xmm0
; SSE41-NEXT:    retq
;
; AVX1-LABEL: trunc2x4i64_8i16:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT:    vpxor %xmm3, %xmm3, %xmm3
; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7]
; AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7]
; AVX1-NEXT:    vpackusdw %xmm2, %xmm1, %xmm1
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7]
; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7]
; AVX1-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vzeroupper
; AVX1-NEXT:    retq
;
; AVX2-LABEL: trunc2x4i64_8i16:
; AVX2:       # %bb.0: # %entry
; AVX2-NEXT:    vpxor %xmm2, %xmm2, %xmm2
; AVX2-NEXT:    vpblendw {{.*#+}} ymm1 = ymm1[0],ymm2[1,2,3],ymm1[4],ymm2[5,6,7],ymm1[8],ymm2[9,10,11],ymm1[12],ymm2[13,14,15]
; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm3
; AVX2-NEXT:    vpackusdw %xmm3, %xmm1, %xmm1
; AVX2-NEXT:    vpblendw {{.*#+}} ymm0 = ymm0[0],ymm2[1,2,3],ymm0[4],ymm2[5,6,7],ymm0[8],ymm2[9,10,11],ymm0[12],ymm2[13,14,15]
; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm2
; AVX2-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
; AVX2-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: trunc2x4i64_8i16:
; AVX512F:       # %bb.0: # %entry
; AVX512F-NEXT:    # kill: def $ymm1 killed $ymm1 def $zmm1
; AVX512F-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512F-NEXT:    vpmovqw %zmm0, %xmm0
; AVX512F-NEXT:    vpmovqw %zmm1, %xmm1
; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: trunc2x4i64_8i16:
; AVX512VL:       # %bb.0: # %entry
; AVX512VL-NEXT:    vpmovqw %ymm0, %xmm0
; AVX512VL-NEXT:    vpmovqw %ymm1, %xmm1
; AVX512VL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX512VL-NEXT:    vzeroupper
; AVX512VL-NEXT:    retq
;
; AVX512BW-LABEL: trunc2x4i64_8i16:
; AVX512BW:       # %bb.0: # %entry
; AVX512BW-NEXT:    # kill: def $ymm1 killed $ymm1 def $zmm1
; AVX512BW-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512BW-NEXT:    vpmovqw %zmm0, %xmm0
; AVX512BW-NEXT:    vpmovqw %zmm1, %xmm1
; AVX512BW-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX512BW-NEXT:    vzeroupper
; AVX512BW-NEXT:    retq
;
; AVX512BWVL-LABEL: trunc2x4i64_8i16:
; AVX512BWVL:       # %bb.0: # %entry
; AVX512BWVL-NEXT:    vpmovqw %ymm0, %xmm0
; AVX512BWVL-NEXT:    vpmovqw %ymm1, %xmm1
; AVX512BWVL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX512BWVL-NEXT:    vzeroupper
; AVX512BWVL-NEXT:    retq
entry:
  %0 = trunc <4 x i64> %a to <4 x i16>
  %1 = trunc <4 x i64> %b to <4 x i16>
  %2 = shufflevector <4 x i16> %0, <4 x i16> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
  ret <8 x i16> %2
}

define <4 x i32> @trunc2x2i64_4i32(<2 x i64> %a, <2 x i64> %b) {
; SSE-LABEL: trunc2x2i64_4i32:
; SSE:       # %bb.0: # %entry
; SSE-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE-NEXT:    retq
;
; AVX-LABEL: trunc2x2i64_4i32:
; AVX:       # %bb.0: # %entry
; AVX-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; AVX-NEXT:    retq
;
; AVX512F-LABEL: trunc2x2i64_4i32:
; AVX512F:       # %bb.0: # %entry
; AVX512F-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: trunc2x2i64_4i32:
; AVX512VL:       # %bb.0: # %entry
; AVX512VL-NEXT:    # kill: def $xmm0 killed $xmm0 def $ymm0
; AVX512VL-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512VL-NEXT:    vpmovqd %ymm0, %xmm0
; AVX512VL-NEXT:    vzeroupper
; AVX512VL-NEXT:    retq
;
; AVX512BW-LABEL: trunc2x2i64_4i32:
; AVX512BW:       # %bb.0: # %entry
; AVX512BW-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; AVX512BW-NEXT:    retq
;
; AVX512BWVL-LABEL: trunc2x2i64_4i32:
; AVX512BWVL:       # %bb.0: # %entry
; AVX512BWVL-NEXT:    # kill: def $xmm0 killed $xmm0 def $ymm0
; AVX512BWVL-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512BWVL-NEXT:    vpmovqd %ymm0, %xmm0
; AVX512BWVL-NEXT:    vzeroupper
; AVX512BWVL-NEXT:    retq
entry:
  %0 = trunc <2 x i64> %a to <2 x i32>
  %1 = trunc <2 x i64> %b to <2 x i32>
  %2 = shufflevector <2 x i32> %0, <2 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
  ret <4 x i32> %2
}

define i64 @trunc2i64_i64(<2 x i64> %inval) {
; SSE-LABEL: trunc2i64_i64:
; SSE:       # %bb.0: # %entry
; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE-NEXT:    movq %xmm0, %rax
; SSE-NEXT:    retq
;
; AVX-LABEL: trunc2i64_i64:
; AVX:       # %bb.0: # %entry
; AVX-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; AVX-NEXT:    vmovq %xmm0, %rax
; AVX-NEXT:    retq
;
; AVX512-LABEL: trunc2i64_i64:
; AVX512:       # %bb.0: # %entry
; AVX512-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; AVX512-NEXT:    vmovq %xmm0, %rax
; AVX512-NEXT:    retq
entry:
  %0 = trunc <2 x i64> %inval to <2 x i32>
  %1 = bitcast <2 x i32> %0 to i64
  ret i64 %1
}

define <8 x i16> @trunc2x4i32_8i16(<4 x i32> %a, <4 x i32> %b) {
; SSE2-LABEL: trunc2x4i32_8i16:
; SSE2:       # %bb.0: # %entry
; SSE2-NEXT:    pslld $16, %xmm1
; SSE2-NEXT:    psrad $16, %xmm1
; SSE2-NEXT:    pslld $16, %xmm0
; SSE2-NEXT:    psrad $16, %xmm0
; SSE2-NEXT:    packssdw %xmm1, %xmm0
; SSE2-NEXT:    retq
;
; SSSE3-LABEL: trunc2x4i32_8i16:
; SSSE3:       # %bb.0: # %entry
; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
; SSSE3-NEXT:    pshufb %xmm2, %xmm1
; SSSE3-NEXT:    pshufb %xmm2, %xmm0
; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSSE3-NEXT:    retq
;
; SSE41-LABEL: trunc2x4i32_8i16:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    pxor %xmm2, %xmm2
; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7]
; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7]
; SSE41-NEXT:    packusdw %xmm1, %xmm0
; SSE41-NEXT:    retq
;
; AVX-LABEL: trunc2x4i32_8i16:
; AVX:       # %bb.0: # %entry
; AVX-NEXT:    vpxor %xmm2, %xmm2, %xmm2
; AVX-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7]
; AVX-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7]
; AVX-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
; AVX-NEXT:    retq
;
; AVX512F-LABEL: trunc2x4i32_8i16:
; AVX512F:       # %bb.0: # %entry
; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 def $ymm0
; AVX512F-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: trunc2x4i32_8i16:
; AVX512VL:       # %bb.0: # %entry
; AVX512VL-NEXT:    # kill: def $xmm0 killed $xmm0 def $ymm0
; AVX512VL-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512VL-NEXT:    vpmovdw %ymm0, %xmm0
; AVX512VL-NEXT:    vzeroupper
; AVX512VL-NEXT:    retq
;
; AVX512BW-LABEL: trunc2x4i32_8i16:
; AVX512BW:       # %bb.0: # %entry
; AVX512BW-NEXT:    # kill: def $xmm0 killed $xmm0 def $ymm0
; AVX512BW-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512BW-NEXT:    vpmovdw %zmm0, %ymm0
; AVX512BW-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512BW-NEXT:    vzeroupper
; AVX512BW-NEXT:    retq
;
; AVX512BWVL-LABEL: trunc2x4i32_8i16:
; AVX512BWVL:       # %bb.0: # %entry
; AVX512BWVL-NEXT:    # kill: def $xmm0 killed $xmm0 def $ymm0
; AVX512BWVL-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512BWVL-NEXT:    vpmovdw %ymm0, %xmm0
; AVX512BWVL-NEXT:    vzeroupper
; AVX512BWVL-NEXT:    retq
entry:
  %0 = trunc <4 x i32> %a to <4 x i16>
  %1 = trunc <4 x i32> %b to <4 x i16>
  %2 = shufflevector <4 x i16> %0, <4 x i16> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
  ret <8 x i16> %2
}

; PR15524 http://llvm.org/bugs/show_bug.cgi?id=15524
define i64 @trunc4i32_i64(<4 x i32> %inval) {
; SSE2-LABEL: trunc4i32_i64:
; SSE2:       # %bb.0: # %entry
; SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE2-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE2-NEXT:    movq %xmm0, %rax
; SSE2-NEXT:    retq
;
; SSSE3-LABEL: trunc4i32_i64:
; SSSE3:       # %bb.0: # %entry
; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u]
; SSSE3-NEXT:    movq %xmm0, %rax
; SSSE3-NEXT:    retq
;
; SSE41-LABEL: trunc4i32_i64:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u]
; SSE41-NEXT:    movq %xmm0, %rax
; SSE41-NEXT:    retq
;
; AVX-LABEL: trunc4i32_i64:
; AVX:       # %bb.0: # %entry
; AVX-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u]
; AVX-NEXT:    vmovq %xmm0, %rax
; AVX-NEXT:    retq
;
; AVX512F-LABEL: trunc4i32_i64:
; AVX512F:       # %bb.0: # %entry
; AVX512F-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u]
; AVX512F-NEXT:    vmovq %xmm0, %rax
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: trunc4i32_i64:
; AVX512VL:       # %bb.0: # %entry
; AVX512VL-NEXT:    vpmovdw %xmm0, %xmm0
; AVX512VL-NEXT:    vmovq %xmm0, %rax
; AVX512VL-NEXT:    retq
;
; AVX512BW-LABEL: trunc4i32_i64:
; AVX512BW:       # %bb.0: # %entry
; AVX512BW-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u]
; AVX512BW-NEXT:    vmovq %xmm0, %rax
; AVX512BW-NEXT:    retq
;
; AVX512BWVL-LABEL: trunc4i32_i64:
; AVX512BWVL:       # %bb.0: # %entry
; AVX512BWVL-NEXT:    vpmovdw %xmm0, %xmm0
; AVX512BWVL-NEXT:    vmovq %xmm0, %rax
; AVX512BWVL-NEXT:    retq
entry:
  %0 = trunc <4 x i32> %inval to <4 x i16>
  %1 = bitcast <4 x i16> %0 to i64
  ret i64 %1
}

define <32 x i8> @trunc2x16i16_32i8(<16 x i16> %a, <16 x i16> %b) {
; SSE2-SSSE3-LABEL: trunc2x16i16_32i8:
; SSE2-SSSE3:       # %bb.0: # %entry
; SSE2-SSSE3-NEXT:    movdqa {{.*#+}} xmm4 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0]
; SSE2-SSSE3-NEXT:    pand %xmm4, %xmm1
; SSE2-SSSE3-NEXT:    pand %xmm4, %xmm0
; SSE2-SSSE3-NEXT:    packuswb %xmm1, %xmm0
; SSE2-SSSE3-NEXT:    pand %xmm4, %xmm3
; SSE2-SSSE3-NEXT:    pand %xmm2, %xmm4
; SSE2-SSSE3-NEXT:    packuswb %xmm3, %xmm4
; SSE2-SSSE3-NEXT:    movdqa %xmm4, %xmm1
; SSE2-SSSE3-NEXT:    retq
;
; SSE41-LABEL: trunc2x16i16_32i8:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    pmovzxbw {{.*#+}} xmm4 = [255,255,255,255,255,255,255,255]
; SSE41-NEXT:    pand %xmm4, %xmm1
; SSE41-NEXT:    pand %xmm4, %xmm0
; SSE41-NEXT:    packuswb %xmm1, %xmm0
; SSE41-NEXT:    pand %xmm4, %xmm3
; SSE41-NEXT:    pand %xmm2, %xmm4
; SSE41-NEXT:    packuswb %xmm3, %xmm4
; SSE41-NEXT:    movdqa %xmm4, %xmm1
; SSE41-NEXT:    retq
;
; AVX1-LABEL: trunc2x16i16_32i8:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vbroadcastss {{.*#+}} ymm2 = [255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255]
; AVX1-NEXT:    vandps %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT:    vpackuswb %xmm3, %xmm0, %xmm0
; AVX1-NEXT:    vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT:    vpackuswb %xmm2, %xmm1, %xmm1
; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT:    retq
;
; AVX2-LABEL: trunc2x16i16_32i8:
; AVX2:       # %bb.0: # %entry
; AVX2-NEXT:    vpbroadcastw {{.*#+}} ymm2 = [255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255]
; AVX2-NEXT:    vpand %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpackuswb %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: trunc2x16i16_32i8:
; AVX512F:       # %bb.0: # %entry
; AVX512F-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
; AVX512F-NEXT:    vpmovdb %zmm0, %xmm0
; AVX512F-NEXT:    vpmovzxwd {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero
; AVX512F-NEXT:    vpmovdb %zmm1, %xmm1
; AVX512F-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: trunc2x16i16_32i8:
; AVX512VL:       # %bb.0: # %entry
; AVX512VL-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
; AVX512VL-NEXT:    vpmovdb %zmm0, %xmm0
; AVX512VL-NEXT:    vpmovzxwd {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero
; AVX512VL-NEXT:    vpmovdb %zmm1, %xmm1
; AVX512VL-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512VL-NEXT:    retq
;
; AVX512BW-LABEL: trunc2x16i16_32i8:
; AVX512BW:       # %bb.0: # %entry
; AVX512BW-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512BW-NEXT:    vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; AVX512BW-NEXT:    vpmovwb %zmm0, %ymm0
; AVX512BW-NEXT:    retq
;
; AVX512BWVL-LABEL: trunc2x16i16_32i8:
; AVX512BWVL:       # %bb.0: # %entry
; AVX512BWVL-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512BWVL-NEXT:    vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; AVX512BWVL-NEXT:    vpmovwb %zmm0, %ymm0
; AVX512BWVL-NEXT:    retq
entry:
  %0 = trunc <16 x i16> %a to <16 x i8>
  %1 = trunc <16 x i16> %b to <16 x i8>
  %2 = shufflevector <16 x i8> %0, <16 x i8> %1, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
  ret <32 x i8> %2
}

define <16 x i8> @trunc2x8i16_16i8(<8 x i16> %a, <8 x i16> %b) {
; SSE2-SSSE3-LABEL: trunc2x8i16_16i8:
; SSE2-SSSE3:       # %bb.0: # %entry
; SSE2-SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
; SSE2-SSSE3-NEXT:    pand %xmm2, %xmm1
; SSE2-SSSE3-NEXT:    pand %xmm2, %xmm0
; SSE2-SSSE3-NEXT:    packuswb %xmm1, %xmm0
; SSE2-SSSE3-NEXT:    retq
;
; SSE41-LABEL: trunc2x8i16_16i8:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    pmovzxbw {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
; SSE41-NEXT:    pand %xmm2, %xmm1
; SSE41-NEXT:    pand %xmm2, %xmm0
; SSE41-NEXT:    packuswb %xmm1, %xmm0
; SSE41-NEXT:    retq
;
; AVX1-LABEL: trunc2x8i16_16i8:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    vbroadcastss {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
; AVX1-NEXT:    vpand %xmm2, %xmm1, %xmm1
; AVX1-NEXT:    vpand %xmm2, %xmm0, %xmm0
; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    retq
;
; AVX2-LABEL: trunc2x8i16_16i8:
; AVX2:       # %bb.0: # %entry
; AVX2-NEXT:    vpbroadcastw {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
; AVX2-NEXT:    vpand %xmm2, %xmm1, %xmm1
; AVX2-NEXT:    vpand %xmm2, %xmm0, %xmm0
; AVX2-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: trunc2x8i16_16i8:
; AVX512F:       # %bb.0: # %entry
; AVX512F-NEXT:    vpbroadcastw {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
; AVX512F-NEXT:    vpand %xmm2, %xmm1, %xmm1
; AVX512F-NEXT:    vpand %xmm2, %xmm0, %xmm0
; AVX512F-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: trunc2x8i16_16i8:
; AVX512VL:       # %bb.0: # %entry
; AVX512VL-NEXT:    vpbroadcastd {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
; AVX512VL-NEXT:    vpand %xmm2, %xmm1, %xmm1
; AVX512VL-NEXT:    vpand %xmm2, %xmm0, %xmm0
; AVX512VL-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
; AVX512VL-NEXT:    retq
;
; AVX512BW-LABEL: trunc2x8i16_16i8:
; AVX512BW:       # %bb.0: # %entry
; AVX512BW-NEXT:    # kill: def $xmm0 killed $xmm0 def $ymm0
; AVX512BW-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512BW-NEXT:    vpmovwb %zmm0, %ymm0
; AVX512BW-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
; AVX512BW-NEXT:    vzeroupper
; AVX512BW-NEXT:    retq
;
; AVX512BWVL-LABEL: trunc2x8i16_16i8:
; AVX512BWVL:       # %bb.0: # %entry
; AVX512BWVL-NEXT:    # kill: def $xmm0 killed $xmm0 def $ymm0
; AVX512BWVL-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512BWVL-NEXT:    vpmovwb %ymm0, %xmm0
; AVX512BWVL-NEXT:    vzeroupper
; AVX512BWVL-NEXT:    retq
entry:
  %0 = trunc <8 x i16> %a to <8 x i8>
  %1 = trunc <8 x i16> %b to <8 x i8>
  %2 = shufflevector <8 x i8> %0, <8 x i8> %1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
  ret <16 x i8> %2
}

; PR15524 http://llvm.org/bugs/show_bug.cgi?id=15524
define i64 @trunc8i16_i64(<8 x i16> %inval) {
; SSE2-LABEL: trunc8i16_i64:
; SSE2:       # %bb.0: # %entry
; SSE2-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT:    packuswb %xmm0, %xmm0
; SSE2-NEXT:    movq %xmm0, %rax
; SSE2-NEXT:    retq
;
; SSSE3-LABEL: trunc8i16_i64:
; SSSE3:       # %bb.0: # %entry
; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
; SSSE3-NEXT:    movq %xmm0, %rax
; SSSE3-NEXT:    retq
;
; SSE41-LABEL: trunc8i16_i64:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
; SSE41-NEXT:    movq %xmm0, %rax
; SSE41-NEXT:    retq
;
; AVX-LABEL: trunc8i16_i64:
; AVX:       # %bb.0: # %entry
; AVX-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
; AVX-NEXT:    vmovq %xmm0, %rax
; AVX-NEXT:    retq
;
; AVX512F-LABEL: trunc8i16_i64:
; AVX512F:       # %bb.0: # %entry
; AVX512F-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
; AVX512F-NEXT:    vmovq %xmm0, %rax
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: trunc8i16_i64:
; AVX512VL:       # %bb.0: # %entry
; AVX512VL-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
; AVX512VL-NEXT:    vmovq %xmm0, %rax
; AVX512VL-NEXT:    retq
;
; AVX512BW-LABEL: trunc8i16_i64:
; AVX512BW:       # %bb.0: # %entry
; AVX512BW-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
; AVX512BW-NEXT:    vmovq %xmm0, %rax
; AVX512BW-NEXT:    retq
;
; AVX512BWVL-LABEL: trunc8i16_i64:
; AVX512BWVL:       # %bb.0: # %entry
; AVX512BWVL-NEXT:    vpmovwb %xmm0, %xmm0
; AVX512BWVL-NEXT:    vmovq %xmm0, %rax
; AVX512BWVL-NEXT:    retq
entry:
  %0 = trunc <8 x i16> %inval to <8 x i8>
  %1 = bitcast <8 x i8> %0 to i64
  ret i64 %1
}

define <16 x i8> @trunc16i64_16i8_const() {
; SSE-LABEL: trunc16i64_16i8_const:
; SSE:       # %bb.0: # %entry
; SSE-NEXT:    xorps %xmm0, %xmm0
; SSE-NEXT:    retq
;
; AVX-LABEL: trunc16i64_16i8_const:
; AVX:       # %bb.0: # %entry
; AVX-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX-NEXT:    retq
;
; AVX512-LABEL: trunc16i64_16i8_const:
; AVX512:       # %bb.0: # %entry
; AVX512-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; AVX512-NEXT:    retq

entry:
  %0 = trunc <16 x i64> zeroinitializer to <16 x i8>
  %1 = shufflevector <16 x i8> %0, <16 x i8> %0, <16 x i32> <i32 28, i32 30, i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 undef, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26>
  ret <16 x i8> %1
}

define <8 x i16> @PR32160(<8 x i32> %x) {
; SSE-LABEL: PR32160:
; SSE:       # %bb.0:
; SSE-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,4,4,4]
; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,2,2,2]
; SSE-NEXT:    retq
;
; AVX-LABEL: PR32160:
; AVX:       # %bb.0:
; AVX-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[8,9,8,9,8,9,8,9,8,9,8,9,8,9,8,9]
; AVX-NEXT:    vzeroupper
; AVX-NEXT:    retq
;
; AVX512F-LABEL: PR32160:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
; AVX512F-NEXT:    vpshuflw {{.*#+}} xmm0 = xmm0[2,2,2,2,4,5,6,7]
; AVX512F-NEXT:    vpbroadcastd %xmm0, %xmm0
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: PR32160:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vpmovdw %ymm0, %xmm0
; AVX512VL-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[4,5,4,5,4,5,4,5,4,5,4,5,4,5,4,5]
; AVX512VL-NEXT:    vzeroupper
; AVX512VL-NEXT:    retq
;
; AVX512BW-LABEL: PR32160:
; AVX512BW:       # %bb.0:
; AVX512BW-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512BW-NEXT:    vpmovdw %zmm0, %ymm0
; AVX512BW-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[4,5,4,5,4,5,4,5,4,5,4,5,4,5,4,5]
; AVX512BW-NEXT:    vzeroupper
; AVX512BW-NEXT:    retq
;
; AVX512BWVL-LABEL: PR32160:
; AVX512BWVL:       # %bb.0:
; AVX512BWVL-NEXT:    vpmovdw %ymm0, %xmm0
; AVX512BWVL-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[4,5,4,5,4,5,4,5,4,5,4,5,4,5,4,5]
; AVX512BWVL-NEXT:    vzeroupper
; AVX512BWVL-NEXT:    retq
  %shuf = trunc <8 x i32> %x to <8 x i16>
  %trunc = shufflevector <8 x i16> %shuf, <8 x i16> undef, <8 x i32> <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>
  ret <8 x i16> %trunc
}

define void @PR34773(ptr %a0, ptr %a1) {
; SSE-LABEL: PR34773:
; SSE:       # %bb.0:
; SSE-NEXT:    movdqu (%rdi), %xmm0
; SSE-NEXT:    movdqu 16(%rdi), %xmm1
; SSE-NEXT:    movdqu 32(%rdi), %xmm2
; SSE-NEXT:    movdqu 48(%rdi), %xmm3
; SSE-NEXT:    psrlw $8, %xmm1
; SSE-NEXT:    psrlw $8, %xmm0
; SSE-NEXT:    packuswb %xmm1, %xmm0
; SSE-NEXT:    psrlw $8, %xmm3
; SSE-NEXT:    psrlw $8, %xmm2
; SSE-NEXT:    packuswb %xmm3, %xmm2
; SSE-NEXT:    movdqu %xmm0, (%rsi)
; SSE-NEXT:    movdqu %xmm2, 16(%rsi)
; SSE-NEXT:    retq
;
; AVX1-LABEL: PR34773:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vmovdqu (%rdi), %xmm0
; AVX1-NEXT:    vmovdqu 16(%rdi), %xmm1
; AVX1-NEXT:    vmovdqu 32(%rdi), %xmm2
; AVX1-NEXT:    vmovdqu 48(%rdi), %xmm3
; AVX1-NEXT:    vpsrlw $8, %xmm1, %xmm1
; AVX1-NEXT:    vpsrlw $8, %xmm0, %xmm0
; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vpsrlw $8, %xmm3, %xmm1
; AVX1-NEXT:    vpsrlw $8, %xmm2, %xmm2
; AVX1-NEXT:    vpackuswb %xmm1, %xmm2, %xmm1
; AVX1-NEXT:    vmovdqu %xmm0, (%rsi)
; AVX1-NEXT:    vmovdqu %xmm1, 16(%rsi)
; AVX1-NEXT:    retq
;
; AVX2-LABEL: PR34773:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vmovdqu (%rdi), %ymm0
; AVX2-NEXT:    vmovdqu 32(%rdi), %ymm1
; AVX2-NEXT:    vpsrlw $8, %ymm0, %ymm0
; AVX2-NEXT:    vpsrlw $8, %ymm1, %ymm1
; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm2
; AVX2-NEXT:    vpackuswb %xmm2, %xmm0, %xmm0
; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm2
; AVX2-NEXT:    vpackuswb %xmm2, %xmm1, %xmm1
; AVX2-NEXT:    vmovdqu %xmm0, (%rsi)
; AVX2-NEXT:    vmovdqu %xmm1, 16(%rsi)
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: PR34773:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vmovdqu (%rdi), %ymm0
; AVX512F-NEXT:    vmovdqu 32(%rdi), %ymm1
; AVX512F-NEXT:    vpsrlw $8, %ymm0, %ymm0
; AVX512F-NEXT:    vpsrlw $8, %ymm1, %ymm1
; AVX512F-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
; AVX512F-NEXT:    vpmovdb %zmm0, (%rsi)
; AVX512F-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero
; AVX512F-NEXT:    vpmovdb %zmm0, 16(%rsi)
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: PR34773:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    vmovdqu (%rdi), %ymm0
; AVX512VL-NEXT:    vmovdqu 32(%rdi), %ymm1
; AVX512VL-NEXT:    vpsrlw $8, %ymm0, %ymm0
; AVX512VL-NEXT:    vpsrlw $8, %ymm1, %ymm1
; AVX512VL-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
; AVX512VL-NEXT:    vpmovdb %zmm0, (%rsi)
; AVX512VL-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero
; AVX512VL-NEXT:    vpmovdb %zmm0, 16(%rsi)
; AVX512VL-NEXT:    vzeroupper
; AVX512VL-NEXT:    retq
;
; AVX512BW-LABEL: PR34773:
; AVX512BW:       # %bb.0:
; AVX512BW-NEXT:    vmovdqu (%rdi), %ymm0
; AVX512BW-NEXT:    vmovdqu 32(%rdi), %ymm1
; AVX512BW-NEXT:    vpsrlw $8, %ymm0, %ymm0
; AVX512BW-NEXT:    vpsrlw $8, %ymm1, %ymm1
; AVX512BW-NEXT:    vpmovwb %zmm0, %ymm0
; AVX512BW-NEXT:    vpmovwb %zmm1, %ymm1
; AVX512BW-NEXT:    vmovdqu %xmm0, (%rsi)
; AVX512BW-NEXT:    vmovdqu %xmm1, 16(%rsi)
; AVX512BW-NEXT:    vzeroupper
; AVX512BW-NEXT:    retq
;
; AVX512BWVL-LABEL: PR34773:
; AVX512BWVL:       # %bb.0:
; AVX512BWVL-NEXT:    vpsrlw $8, (%rdi), %ymm0
; AVX512BWVL-NEXT:    vpsrlw $8, 32(%rdi), %ymm1
; AVX512BWVL-NEXT:    vpmovwb %ymm0, (%rsi)
; AVX512BWVL-NEXT:    vpmovwb %ymm1, 16(%rsi)
; AVX512BWVL-NEXT:    vzeroupper
; AVX512BWVL-NEXT:    retq
  %1  = getelementptr i16, ptr %a0, i64 16
  %2  = getelementptr i8, ptr %a1, i64 16
  %3  = load <16 x i16>, ptr %a0, align 2
  %4  = load <16 x i16>, ptr %1, align 2
  %5  = lshr <16 x i16> %3, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
  %6 = lshr <16 x i16> %4, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
  %7 = trunc <16 x i16> %5  to <16 x i8>
  %8 = trunc <16 x i16> %6 to <16 x i8>
  store <16 x i8> %7, ptr %a1, align 1
  store <16 x i8> %8, ptr %2, align 1
  ret void
}

define i16 @PR66194(i8 %q) {
; SSE2-SSSE3-LABEL: PR66194:
; SSE2-SSSE3:       # %bb.0: # %entry
; SSE2-SSSE3-NEXT:    xorl %eax, %eax
; SSE2-SSSE3-NEXT:    xorl %ecx, %ecx
; SSE2-SSSE3-NEXT:    testb %dil, %dil
; SSE2-SSSE3-NEXT:    setne %al
; SSE2-SSSE3-NEXT:    sete %cl
; SSE2-SSSE3-NEXT:    movl %ecx, %edx
; SSE2-SSSE3-NEXT:    shll $16, %edx
; SSE2-SSSE3-NEXT:    orl %eax, %edx
; SSE2-SSSE3-NEXT:    movd %edx, %xmm0
; SSE2-SSSE3-NEXT:    pinsrw $2, %eax, %xmm0
; SSE2-SSSE3-NEXT:    pinsrw $3, %eax, %xmm0
; SSE2-SSSE3-NEXT:    pinsrw $4, %ecx, %xmm0
; SSE2-SSSE3-NEXT:    pinsrw $5, %eax, %xmm0
; SSE2-SSSE3-NEXT:    pinsrw $6, %eax, %xmm0
; SSE2-SSSE3-NEXT:    pinsrw $7, %ecx, %xmm0
; SSE2-SSSE3-NEXT:    pcmpeqd %xmm1, %xmm1
; SSE2-SSSE3-NEXT:    psubw %xmm1, %xmm0
; SSE2-SSSE3-NEXT:    packuswb %xmm0, %xmm0
; SSE2-SSSE3-NEXT:    pxor %xmm1, %xmm1
; SSE2-SSSE3-NEXT:    psadbw %xmm0, %xmm1
; SSE2-SSSE3-NEXT:    movd %xmm1, %eax
; SSE2-SSSE3-NEXT:    # kill: def $ax killed $ax killed $eax
; SSE2-SSSE3-NEXT:    retq
;
; SSE41-LABEL: PR66194:
; SSE41:       # %bb.0: # %entry
; SSE41-NEXT:    xorl %eax, %eax
; SSE41-NEXT:    xorl %ecx, %ecx
; SSE41-NEXT:    testb %dil, %dil
; SSE41-NEXT:    setne %al
; SSE41-NEXT:    sete %cl
; SSE41-NEXT:    movd %eax, %xmm0
; SSE41-NEXT:    pinsrb $2, %ecx, %xmm0
; SSE41-NEXT:    pinsrb $4, %eax, %xmm0
; SSE41-NEXT:    pinsrb $6, %eax, %xmm0
; SSE41-NEXT:    pinsrb $8, %ecx, %xmm0
; SSE41-NEXT:    pinsrb $10, %eax, %xmm0
; SSE41-NEXT:    pinsrb $12, %eax, %xmm0
; SSE41-NEXT:    pinsrb $14, %ecx, %xmm0
; SSE41-NEXT:    pcmpeqd %xmm1, %xmm1
; SSE41-NEXT:    psubw %xmm1, %xmm0
; SSE41-NEXT:    packuswb %xmm0, %xmm0
; SSE41-NEXT:    pxor %xmm1, %xmm1
; SSE41-NEXT:    psadbw %xmm0, %xmm1
; SSE41-NEXT:    movd %xmm1, %eax
; SSE41-NEXT:    # kill: def $ax killed $ax killed $eax
; SSE41-NEXT:    retq
;
; AVX1-LABEL: PR66194:
; AVX1:       # %bb.0: # %entry
; AVX1-NEXT:    xorl %eax, %eax
; AVX1-NEXT:    testb %dil, %dil
; AVX1-NEXT:    setne %al
; AVX1-NEXT:    sete %cl
; AVX1-NEXT:    vmovd %eax, %xmm0
; AVX1-NEXT:    vpinsrb $2, %ecx, %xmm0, %xmm0
; AVX1-NEXT:    vpinsrb $4, %eax, %xmm0, %xmm0
; AVX1-NEXT:    vpinsrb $6, %eax, %xmm0, %xmm0
; AVX1-NEXT:    vpinsrb $8, %ecx, %xmm0, %xmm0
; AVX1-NEXT:    vpinsrb $10, %eax, %xmm0, %xmm0
; AVX1-NEXT:    vpinsrb $12, %eax, %xmm0, %xmm0
; AVX1-NEXT:    vpinsrb $14, %ecx, %xmm0, %xmm0
; AVX1-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
; AVX1-NEXT:    vpsubw %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
; AVX1-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
; AVX1-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vpsrld $16, %xmm0, %xmm1
; AVX1-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vmovd %xmm0, %eax
; AVX1-NEXT:    # kill: def $ax killed $ax killed $eax
; AVX1-NEXT:    retq
;
; AVX2-LABEL: PR66194:
; AVX2:       # %bb.0: # %entry
; AVX2-NEXT:    xorl %eax, %eax
; AVX2-NEXT:    xorl %ecx, %ecx
; AVX2-NEXT:    testb %dil, %dil
; AVX2-NEXT:    setne %al
; AVX2-NEXT:    sete %cl
; AVX2-NEXT:    vmovd %eax, %xmm0
; AVX2-NEXT:    vpinsrw $1, %ecx, %xmm0, %xmm0
; AVX2-NEXT:    vpinsrw $2, %eax, %xmm0, %xmm0
; AVX2-NEXT:    vpinsrw $3, %eax, %xmm0, %xmm0
; AVX2-NEXT:    vpinsrw $4, %ecx, %xmm0, %xmm0
; AVX2-NEXT:    vpinsrw $5, %eax, %xmm0, %xmm0
; AVX2-NEXT:    vpinsrw $6, %eax, %xmm0, %xmm0
; AVX2-NEXT:    vpinsrw $7, %ecx, %xmm0, %xmm0
; AVX2-NEXT:    vpaddw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
; AVX2-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
; AVX2-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vpsrld $16, %xmm0, %xmm1
; AVX2-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vmovd %xmm0, %eax
; AVX2-NEXT:    # kill: def $ax killed $ax killed $eax
; AVX2-NEXT:    retq
;
; AVX512-LABEL: PR66194:
; AVX512:       # %bb.0: # %entry
; AVX512-NEXT:    xorl %eax, %eax
; AVX512-NEXT:    xorl %ecx, %ecx
; AVX512-NEXT:    testb %dil, %dil
; AVX512-NEXT:    setne %al
; AVX512-NEXT:    sete %cl
; AVX512-NEXT:    vmovd %eax, %xmm0
; AVX512-NEXT:    vpinsrw $1, %ecx, %xmm0, %xmm0
; AVX512-NEXT:    vpinsrw $2, %eax, %xmm0, %xmm0
; AVX512-NEXT:    vpinsrw $3, %eax, %xmm0, %xmm0
; AVX512-NEXT:    vpinsrw $4, %ecx, %xmm0, %xmm0
; AVX512-NEXT:    vpinsrw $5, %eax, %xmm0, %xmm0
; AVX512-NEXT:    vpinsrw $6, %eax, %xmm0, %xmm0
; AVX512-NEXT:    vpinsrw $7, %ecx, %xmm0, %xmm0
; AVX512-NEXT:    vpaddw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
; AVX512-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
; AVX512-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    vpsrld $16, %xmm0, %xmm1
; AVX512-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    vmovd %xmm0, %eax
; AVX512-NEXT:    # kill: def $ax killed $ax killed $eax
; AVX512-NEXT:    retq
entry:
  %cmp12.i.13 = icmp ne i8 %q, 0
  %cond.i15.13 = zext i1 %cmp12.i.13 to i16
  %tobool.not.i.13 = icmp eq i8 %q, 0
  %cond18.i.13 = zext i1 %tobool.not.i.13 to i16
  %0 = insertelement <16 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>, i16 %cond.i15.13, i64 8
  %1 = insertelement <16 x i16> %0, i16 %cond18.i.13, i64 9
  %2 = insertelement <16 x i16> %1, i16 %cond.i15.13, i64 10
  %3 = insertelement <16 x i16> %2, i16 %cond.i15.13, i64 11
  %4 = insertelement <16 x i16> %3, i16 %cond18.i.13, i64 12
  %5 = insertelement <16 x i16> %4, i16 %cond.i15.13, i64 13
  %6 = insertelement <16 x i16> %5, i16 %cond.i15.13, i64 14
  %7 = insertelement <16 x i16> %6, i16 %cond18.i.13, i64 15
  %8 = tail call i16 @llvm.vector.reduce.add.v16i16(<16 x i16> %7)
  ret i16 %8
}
declare i16 @llvm.vector.reduce.add.v16i16(<16 x i16>)

; Store merging must not infinitely fight store splitting.

define void @store_merge_split(<8 x i32> %w1, <8 x i32> %w2, i64 %idx, ptr %p) align 2 {
; SSE2-LABEL: store_merge_split:
; SSE2:       # %bb.0:
; SSE2-NEXT:    pslld $16, %xmm1
; SSE2-NEXT:    psrad $16, %xmm1
; SSE2-NEXT:    pslld $16, %xmm0
; SSE2-NEXT:    psrad $16, %xmm0
; SSE2-NEXT:    packssdw %xmm1, %xmm0
; SSE2-NEXT:    pslld $16, %xmm3
; SSE2-NEXT:    psrad $16, %xmm3
; SSE2-NEXT:    pslld $16, %xmm2
; SSE2-NEXT:    psrad $16, %xmm2
; SSE2-NEXT:    packssdw %xmm3, %xmm2
; SSE2-NEXT:    shlq $4, %rdi
; SSE2-NEXT:    movdqu %xmm0, (%rsi,%rdi)
; SSE2-NEXT:    movdqu %xmm2, 16(%rsi,%rdi)
; SSE2-NEXT:    retq
;
; SSSE3-LABEL: store_merge_split:
; SSSE3:       # %bb.0:
; SSSE3-NEXT:    movdqa {{.*#+}} xmm4 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
; SSSE3-NEXT:    pshufb %xmm4, %xmm1
; SSSE3-NEXT:    pshufb %xmm4, %xmm0
; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSSE3-NEXT:    pshufb %xmm4, %xmm3
; SSSE3-NEXT:    pshufb %xmm4, %xmm2
; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
; SSSE3-NEXT:    shlq $4, %rdi
; SSSE3-NEXT:    movdqu %xmm0, (%rsi,%rdi)
; SSSE3-NEXT:    movdqu %xmm2, 16(%rsi,%rdi)
; SSSE3-NEXT:    retq
;
; SSE41-LABEL: store_merge_split:
; SSE41:       # %bb.0:
; SSE41-NEXT:    pxor %xmm4, %xmm4
; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1],xmm1[2],xmm4[3],xmm1[4],xmm4[5],xmm1[6],xmm4[7]
; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1],xmm0[2],xmm4[3],xmm0[4],xmm4[5],xmm0[6],xmm4[7]
; SSE41-NEXT:    packusdw %xmm1, %xmm0
; SSE41-NEXT:    pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1],xmm3[2],xmm4[3],xmm3[4],xmm4[5],xmm3[6],xmm4[7]
; SSE41-NEXT:    pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1],xmm2[2],xmm4[3],xmm2[4],xmm4[5],xmm2[6],xmm4[7]
; SSE41-NEXT:    packusdw %xmm3, %xmm2
; SSE41-NEXT:    shlq $4, %rdi
; SSE41-NEXT:    movdqu %xmm0, (%rsi,%rdi)
; SSE41-NEXT:    movdqu %xmm2, 16(%rsi,%rdi)
; SSE41-NEXT:    retq
;
; AVX1-LABEL: store_merge_split:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastss {{.*#+}} ymm2 = [65535,65535,65535,65535,65535,65535,65535,65535]
; AVX1-NEXT:    vandps %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT:    vpackusdw %xmm3, %xmm0, %xmm0
; AVX1-NEXT:    vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT:    vpackusdw %xmm2, %xmm1, %xmm1
; AVX1-NEXT:    shlq $4, %rdi
; AVX1-NEXT:    vmovdqu %xmm0, (%rsi,%rdi)
; AVX1-NEXT:    vmovdqu %xmm1, 16(%rsi,%rdi)
; AVX1-NEXT:    vzeroupper
; AVX1-NEXT:    retq
;
; AVX2-LABEL: store_merge_split:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT:    vpshufb %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
; AVX2-NEXT:    vpshufb %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
; AVX2-NEXT:    shlq $4, %rdi
; AVX2-NEXT:    vmovdqu %xmm0, (%rsi,%rdi)
; AVX2-NEXT:    vmovdqu %xmm1, 16(%rsi,%rdi)
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512F-LABEL: store_merge_split:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    # kill: def $ymm1 killed $ymm1 def $zmm1
; AVX512F-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
; AVX512F-NEXT:    vpmovdw %zmm1, %ymm1
; AVX512F-NEXT:    shlq $4, %rdi
; AVX512F-NEXT:    vmovdqu %xmm0, (%rsi,%rdi)
; AVX512F-NEXT:    vmovdqu %xmm1, 16(%rsi,%rdi)
; AVX512F-NEXT:    vzeroupper
; AVX512F-NEXT:    retq
;
; AVX512VL-LABEL: store_merge_split:
; AVX512VL:       # %bb.0:
; AVX512VL-NEXT:    shlq $4, %rdi
; AVX512VL-NEXT:    vpmovdw %ymm0, (%rsi,%rdi)
; AVX512VL-NEXT:    vpmovdw %ymm1, 16(%rsi,%rdi)
; AVX512VL-NEXT:    vzeroupper
; AVX512VL-NEXT:    retq
;
; AVX512BW-LABEL: store_merge_split:
; AVX512BW:       # %bb.0:
; AVX512BW-NEXT:    # kill: def $ymm1 killed $ymm1 def $zmm1
; AVX512BW-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512BW-NEXT:    vpmovdw %zmm0, %ymm0
; AVX512BW-NEXT:    vpmovdw %zmm1, %ymm1
; AVX512BW-NEXT:    shlq $4, %rdi
; AVX512BW-NEXT:    vmovdqu %xmm0, (%rsi,%rdi)
; AVX512BW-NEXT:    vmovdqu %xmm1, 16(%rsi,%rdi)
; AVX512BW-NEXT:    vzeroupper
; AVX512BW-NEXT:    retq
;
; AVX512BWVL-LABEL: store_merge_split:
; AVX512BWVL:       # %bb.0:
; AVX512BWVL-NEXT:    shlq $4, %rdi
; AVX512BWVL-NEXT:    vpmovdw %ymm0, (%rsi,%rdi)
; AVX512BWVL-NEXT:    vpmovdw %ymm1, 16(%rsi,%rdi)
; AVX512BWVL-NEXT:    vzeroupper
; AVX512BWVL-NEXT:    retq
  %t1 = trunc <8 x i32> %w1 to <8 x i16>
  %t2 = trunc <8 x i32> %w2 to <8 x i16>
  %g1 = getelementptr inbounds <8 x i16>, ptr %p, i64 %idx
  %g2 = getelementptr inbounds <8 x i16>, ptr %g1, i64 1
  store <8 x i16> %t1, ptr %g1, align 2
  store <8 x i16> %t2, ptr %g2, align 2
  ret void
}