commit 615eee6402c8be9f57fe224ca1ad2999cf1cf53d
author Aditya Nandakumar <aditya_nandakumar@apple.com> Tue Aug 13 21:49:11 2019 +0000
committer Aditya Nandakumar <aditya_nandakumar@apple.com> Tue Aug 13 21:49:11 2019 +0000
tree 11bf98fdd8c54417b3d7d4fb6ad0d668247fd358
parent 6c1b19ac9e85aff6d6cba14d9c1e29c11c1a0372

[GlobalISel]: Fix lowering of G_SHUFFLE_VECTOR with scalar sources

https://reviews.llvm.org/D66171

llvm-svn: 368753

llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index db796e9..4d7db27 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -3821,6 +3821,7 @@
   Register DstReg = MI.getOperand(0).getReg();
   Register Src0Reg = MI.getOperand(1).getReg();
   Register Src1Reg = MI.getOperand(2).getReg();
+  LLT Src0Ty = MRI.getType(Src0Reg);
   LLT DstTy = MRI.getType(DstReg);
   LLT EltTy = DstTy.getElementType();
   int NumElts = DstTy.getNumElements();
@@ -3842,11 +3843,15 @@
       continue;
     }
 
-    Register SrcVec = Idx < NumElts ? Src0Reg : Src1Reg;
-    int ExtractIdx = Idx < NumElts ? Idx : Idx - NumElts;
-    auto IdxK = MIRBuilder.buildConstant(IdxTy, ExtractIdx);
-    auto Extract = MIRBuilder.buildExtractVectorElement(EltTy, SrcVec, IdxK);
-    BuildVec.push_back(Extract.getReg(0));
+    if (Src0Ty.isScalar()) {
+      BuildVec.push_back(Idx == 0 ? Src0Reg : Src1Reg);
+    } else {
+      Register SrcVec = Idx < NumElts ? Src0Reg : Src1Reg;
+      int ExtractIdx = Idx < NumElts ? Idx : Idx - NumElts;
+      auto IdxK = MIRBuilder.buildConstant(IdxTy, ExtractIdx);
+      auto Extract = MIRBuilder.buildExtractVectorElement(EltTy, SrcVec, IdxK);
+      BuildVec.push_back(Extract.getReg(0));
+    }
   }
 
   MIRBuilder.buildBuildVector(DstReg, BuildVec);