[PowerPC] Emit lxvkq and vsrq instructions for build vector patterns (#157625) ### Optimize BUILD_VECTOR having special quadword patterns This change optimizes `BUILD_VECTOR` operations by using the `lxvkq` or `xxpltib + vsrq` instructions to inline constants matching specific 128-bit patterns: - **MSB set pattern**: `0x8000_0000_0000_0000_0000_0000_0000_0000` - **LSB set pattern**: `0x0000_0000_0000_0000_0000_0000_0000_0001` ### Implementation Details The `lxvkq` instruction loads special quadword values into VSX registers: ```asm lxvkq XT, UIM # When UIM=16: loads 0x8000_0000_0000_0000_0000_0000_0000_0000 ``` The optimization reconstructs the 128-bit register pattern from `BUILD_VECTOR` operands, accounting for target endianness. For example, the MSB pattern can be represented as: - **Big-Endian**: `<i64 -9223372036854775808, i64 0>` - **Little-Endian**: `<i64 0, i64 -9223372036854775808>` Both produce the same register value: `0x8000_0000_0000_0000_0000_0000_0000_0000` ### MSB Pattern (`0x8000...0000`) All vector types (`v2i64`, `v4i32`, `v8i16`, `v16i8`) generate: ```asm lxvkq v2, 16 ``` ### LSB Pattern (`0x0000...0001`) All vector types generate: ```asm xxspltib v2, 255 vsrq v2, v2, v2 ``` --------- Co-authored-by: Tony Varghese <tony.varghese@ibm.com>
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