)]}'
{
  "commit": "5d54a576fe0eecc37e318eb883bfbcc42f76ffb8",
  "tree": "008163ba1977485ac169149777c14a9a0d97b181",
  "parents": [
    "ca7ffaaeeb54bc350b8e48f4f35b68902dc9868c"
  ],
  "author": {
    "name": "Jim M. R. Teichgräber",
    "email": "Jim.Teichgraber@amd.com",
    "time": "Tue Aug 12 11:40:02 2025 +0100"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Tue Aug 12 19:40:02 2025 +0900"
  },
  "message": "[AMDGPU] AMDGPULateCodeGenPrepare Legacy PM: replace `setPreservesAll()` with `setPreservesCFG()` (#148167)\n\nThis PR depends on #148165; the first commit\n(90f1d0a881a21a8b4f192622d798c290770fda63) belongs to that PR. The\nchanges are distinct, so separate PRs seemed like the best option. I\ndon\u0027t have commit access, so I couldn\u0027t use user-branches to mark the\ndependency.\n\nAs AMDGPULateCodeGenPrepare actually performs changes that invalidate\nUniformity Analysis; use `setPreservesCFG()` to mark this, instead of\n`setPreservesAll()` which wrongly includes preserving Uniformity\nAnalysis.\n\nNote that before #148165, this would still have preserved Uniformity\nAnalysis, hence the dependency. In addition, `amdgpu/llc-pipeline.cc`\nneeds to be changed when both changes are in effect, but those changes\nwould make the test fail if the PRs weren\u0027t based on one another.\n\nNote on why this hasn\u0027t caused issues so far:\nIt just so happens that AMDGPULateCodeGenPrepare is always immediately\nfollowed by AMDGPUUnifyDivergentExitNodes, which *does* invalidate most\nanalyses, including Uniformity. And because UnifyDivergentExitNodes only\nlooks at terminators, and LateCGP seemingly does not replace uniform\nvalues with divergent values, or divergent values with uniform values,\nand it only *inserts new values that are not looked at by\nUnifyDivergentExitNodes*, this bug remained hidden.\n\n---\n\nI ran `git-clang-format` on my changes. I tested them using the\n`check-llvm` target; no unexpected failures occurred after I made the\nchange to `amdgpu/llc-pipeline.ll`.",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "523c66c72273c7647d34e698e854ad8a19565153",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp",
      "new_id": "56113e6dd9f974def9a123e2590c006fdd84c362",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp"
    },
    {
      "type": "modify",
      "old_id": "2a5c65278f7dce2bfa4124094cfd1480435dff2a",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/AMDGPU/llc-pipeline.ll",
      "new_id": "3e17be6b34a57670b1ac10d4b8f3544eca09198b",
      "new_mode": 33188,
      "new_path": "llvm/test/CodeGen/AMDGPU/llc-pipeline.ll"
    }
  ]
}