| commit | 5cc1016a57b38595262026ba3c482f6108b12e5b | [log] [tgz] |
|---|---|---|
| author | Nick Desaulniers <ndesaulniers@google.com> | Thu Feb 16 17:47:37 2023 -0800 |
| committer | Nick Desaulniers <ndesaulniers@google.com> | Thu Feb 16 17:58:34 2023 -0800 |
| tree | 38d88d841f4f32adfa3b5d02ed3c901691311e0c | |
| parent | 28d45c843cd07514c9a7260d285ff59e14280ecf [diff] [blame] |
[llvm][SelectionDAGBuilder] codegen callbr.landingpad intrinsic Given a CallBrInst, retain its first virtual register in SelectionDagBuilder's FunctionLoweringInfo if there's corresponding landingpad. Walk the list of COPY MachineInstr to find the original virtual and physical registers defined by the INLINEASM_BR MachineInst. Test cases from https://reviews.llvm.org/D139565. Link: https://github.com/llvm/llvm-project/issues/59538 Part 3 from https://discourse.llvm.org/t/rfc-syncing-asm-goto-with-outputs-with-gcc/65453/8 Follow up patches still need to wire up CallBrPrepare into the pass pipelines. Reviewed By: efriedma, void Differential Revision: https://reviews.llvm.org/D140160
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h index bf21110..769a827 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
@@ -534,6 +534,7 @@ // These all get lowered before this pass. void visitInvoke(const InvokeInst &I); void visitCallBr(const CallBrInst &I); + void visitCallBrLandingPad(const CallInst &I); void visitResume(const ResumeInst &I); void visitUnary(const User &I, unsigned Opcode);