)]}'
{
  "commit": "5a21128f24a7f9a48166ae4a0aafe5bd70154012",
  "tree": "408606dc33dacc3719705832400896ae1c152d2f",
  "parents": [
    "28743fafa6b5358ede23da93f3ca7d52d1b4f75c"
  ],
  "author": {
    "name": "Matt Arsenault",
    "email": "Matthew.Arsenault@amd.com",
    "time": "Fri Sep 12 08:57:47 2025 +0900"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Fri Sep 12 08:57:47 2025 +0900"
  },
  "message": "AMDGPU: Relax legal register operand constraint (#157989)\n\nFind a common subclass instead of directly checking for a subclass\nrelationship. This fixes folding logic for unaligned register defs\ninto aligned use contexts. e.g., a vreg_64 def into an av_64_align2\nuse should be able to find the common subclass vreg_align2. This\navoids regressions in future patches.\n\nChecking the subclass was also redundant on the subregister path;\ngetMatchingSuperRegClass is sufficient.",
  "tree_diff": [
    {
      "type": "modify",
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      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/SIInstrInfo.cpp",
      "new_id": "23a124fecddadc39364490afd6959d2737b9ee9f",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/SIInstrInfo.cpp"
    },
    {
      "type": "modify",
      "old_id": "9c2fabce4bcdebe048c1247d4a76e224dfa41488",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll",
      "new_id": "b33b8a7d8cd725cba3cb701ece373716c4e11928",
      "new_mode": 33188,
      "new_path": "llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll"
    },
    {
      "type": "modify",
      "old_id": "7b3337445301071838c767651d6baf121d29ef29",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll",
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      "new_mode": 33188,
      "new_path": "llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll"
    },
    {
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      "old_path": "llvm/test/CodeGen/AMDGPU/fold-sgpr-copy.mir",
      "new_id": "e1295d4a095632b053b3bd4da2cb9b026ed537d7",
      "new_mode": 33188,
      "new_path": "llvm/test/CodeGen/AMDGPU/fold-sgpr-copy.mir"
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  ]
}