[CUDA] Use monotonic ordering for __nvvm_atom* builtins (#185822) CUDA's __nvvm_atom* builtins are expected to produce atomic operations with relaxed ordering. However, Clang lowered tham as atomicrmw and cmpxchg with the default seq_cst ordering. That mismatch went unnoticed because until recently NVPTX back end was unable to lower all atomic instructions correctly, and despite using `cst_seq` ordering in IR we ended up generating the intended PTX instructions with relaxed ordering, It worked well enough until https://github.com/llvm/llvm-project/pull/179553 implemented correct NVPTX atomic lowering. That, in turn, caused severe performance regression for the code that relied on these builtins. Thanks to @akshayrdeodhar for figuring out what happened. Switching __nvvm_atom* builtins to generate atomic instructions with monotonic ordering matches the expected semantics of the builtins, and restores performance of the generated code. See: https://github.com/llvm/llvm-project/pull/179553#issuecomment-4035193968
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