)]}'
{
  "id": "12f0a684a8e8241df9cb2c0d0737b79db48f0c12",
  "repo": "llvm-project",
  "revision": "56ee698b48ab31be816dbdfd4bea8c3761663dbe",
  "path": "llvm/test/CodeGen/AMDGPU/dpp_combine_rev_opcode.mir"
}