| commit | 4e63e0457cc1f768c628e71a0786fdb8a6ec271e | [log] [tgz] |
|---|---|---|
| author | Pierre van Houtryve <pierre.vanhoutryve@amd.com> | Wed May 14 10:48:51 2025 +0200 |
| committer | GitHub <noreply@github.com> | Wed May 14 10:48:51 2025 +0200 |
| tree | 94979aef53efaf1b869e9dffcce8d70d88ddebbe | |
| parent | d441d28083e2f9de5170f5a96a8e44a38d306c62 [diff] |
[AMDGPU] Canonicalize G_ZEXT of the shift amount in RegBankCombiner (#131792) Canonicalize it to a G_AND instead so that ISel patterns can pick it up and ignore it, as the shift instructions only read low bits. G_ZEXT would be lowered to a v/s_and anyway in most cases. I'm also looking at making a DAG version of this in a separate patch.
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