[RISCV] Use default promotion for i32 CTLZ on RV64 with XTHeadBb. (#157994) The existing isel pattern felt like it was emitting more instructions than an isel pattern probably should. We were also missing opportunities to fold the innermost instructions with surrounding instructions. I tried to move the expansion to lowering, but we got a little too aggressive folding the (not (slli (not))) with other operations in some tests and created code with constants that are hard to materialize and missed using TH_FF0. We could probably have fixed that with a RISCVISD::TH_FF0 node. While investigating, I tried using the default promotion. The results aren't obviously worse than the previous codegen. And in some case they are obviously better.
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