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test
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CodeGen
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LoongArch
tree: 60d7b98eff2032ad837bd897f20ea0639e4f05ab [
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[
tgz
]
ir-instruction/
lasx/
lsx/
alloca.ll
alsl.ll
analyze-branch.ll
andn-icmp.ll
atomicrmw-uinc-udec-wrap.ll
bitreverse.ll
block-address.ll
blockaddress-symbol.ll
bnez-beqz.ll
branch-relaxation-spill-32.ll
branch-relaxation-spill-64.ll
branch-relaxation.ll
bstrins_d.ll
bstrins_w.ll
bstrpick_d.ll
bstrpick_w.ll
bswap-bitreverse.ll
bswap.ll
bytepick.ll
calling-conv-common.ll
calling-conv-lp64d.ll
calling-conv-lp64s.ll
can-not-realign-stack.ll
cfr-copy.mir
cfr-pseudo-copy.mir
code-models.ll
cpu-name-generic.ll
cpus-invalid.ll
cpus.ll
ctlz-cttz-ctpop.ll
double-br-fcmp.ll
double-fcmp-strict.ll
double-fcmps-strict.ll
double-fma.ll
double-imm.ll
duplicate-returns-for-tailcall.ll
dwarf-eh.ll
e_flags.ll
eh-dwarf-cfa.ll
emergency-spill-slot.ll
exception-pointer-register.ll
expand-call.ll
fabs.ll
fcopysign.ll
feature-32bit.ll
float-br-fcmp.ll
float-fcmp-strict.ll
float-fcmps-strict.ll
float-fma.ll
float-imm.ll
fp-expand.ll
fp-max-min.ll
fp-reciprocal.ll
fp-trunc-store.ll
frame.ll
frameaddr-returnaddr.ll
frint.ll
fsqrt.ll
get-reg-error-la32.ll
get-reg-error-la64.ll
get-reg.ll
get-setcc-result-type.ll
ghc-cc.ll
global-address.ll
global-variable-code-model.ll
imm.ll
inline-asm-clobbers-fcc.mir
inline-asm-clobbers.ll
inline-asm-constraint-error.ll
inline-asm-constraint-f.ll
inline-asm-constraint-k.ll
inline-asm-constraint-m.ll
inline-asm-constraint-ZB.ll
inline-asm-constraint-ZC.ll
inline-asm-constraint.ll
inline-asm-operand-modifiers.ll
inline-asm-reg-names-error.ll
inline-asm-reg-names-f-error.ll
inline-asm-reg-names-f.ll
inline-asm-reg-names.ll
intrinsic-csr-side-effects.ll
intrinsic-error.ll
intrinsic-frecipe-dbl.ll
intrinsic-frecipe-flt.ll
intrinsic-iocsr-side-effects.ll
intrinsic-la32-error.ll
intrinsic-la32.ll
intrinsic-la64-error.ll
intrinsic-la64.ll
intrinsic-not-constant-error.ll
intrinsic.ll
is_fpclass_f32.ll
is_fpclass_f64.ll
jump-table.ll
ldptr.ll
ldx-stx-sp-1.ll
ldx-stx-sp-2.ll
ldx-stx-sp-3.ll
legalicmpimm.ll
lit.local.cfg
load-store-offset.ll
mafft-Lalignmm.ll
memcmp.ll
mir-target-flags.ll
nomerge.ll
not.ll
numeric-reg-names.ll
O0-pipeline.ll
opt-pipeline.ll
patchable-function-entry.ll
preferred-alignments.ll
psabi-restricted-scheduling.ll
register-coalescer-crash-pr79718.mir
returnaddr-error.ll
rotl-rotr.ll
select-const.ll
select-to-shiftand.ll
sext-cheaper-than-zext.ll
shift-masked-shamt.ll
shrinkwrap.ll
smul-with-overflow.ll
soft-fp-to-int.ll
spill-ra-without-kill.ll
spill-reload-cfr.ll
split-sp-adjust.ll
stack-realignment-with-variable-sized-objects.ll
stack-realignment.ll
stptr.ll
tail-calls.ll
target-abi-from-triple-edge-cases.ll
target-abi-from-triple.ll
target_support.ll
test_bl_fixupkind.mir
thread-pointer.ll
tls-models.ll
trap.ll
unaligned-access.ll
unaligned-memcpy-inline.ll
vararg.ll
vector-fp-imm.ll
xray-attribute-instrumentation.ll
zext-with-load-is-free.ll