| ; RUN: llc -mtriple=armv7-none-linux-gnueabi -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK-WITH-LDRD |
| ; RUN: llc -mtriple=armv4-none-linux-gnueabi -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK-WITHOUT-LDRD |
| ; RUN: llc -mtriple=thumbv7-none-linux-gnueabi -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK-WITH-LDRD |
| |
| define void @foo(ptr %addr) { |
| %val1 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(ptr %addr) |
| %val2 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(ptr %addr) |
| %val3 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(ptr %addr) |
| %val4 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(ptr %addr) |
| %val5 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(ptr %addr) |
| %val6 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(ptr %addr) |
| %val7 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(ptr %addr) |
| |
| ; Key point is that enough 64-bit paired GPR values are live that |
| ; one of them has to be spilled. This used to cause an abort because |
| ; an LDMIA was created with both a FrameIndex and an offset, which |
| ; is not allowed. |
| |
| ; CHECK-WITH-LDRD-DAG: strd {{r[0-9]+}}, {{r[0-9]+}}, [sp, #8] |
| ; CHECK-WITH-LDRD-DAG: strd {{r[0-9]+}}, {{r[0-9]+}}, [sp] |
| |
| ; CHECK-WITH-LDRD-DAG: ldrd {{r[0-9]+}}, {{r[0-9]+}}, [sp, #8] |
| ; CHECK-WITH-LDRD-DAG: ldrd {{r[0-9]+}}, {{r[0-9]+}}, [sp] |
| |
| ; We also want to ensure the register scavenger is working (i.e. an |
| ; offset from sp can be generated), so we need two spills. |
| ; CHECK-WITHOUT-LDRD-DAG: add [[ADDRREG:[a-z0-9]+]], sp, #{{[0-9]+}} |
| ; CHECK-WITHOUT-LDRD-DAG: stm [[ADDRREG]], {r{{[0-9]+}}, r{{[0-9]+}}} |
| ; CHECK-WITHOUT-LDRD-DAG: stm sp, {r{{[0-9]+}}, r{{[0-9]+}}} |
| |
| ; In principle LLVM may have to recalculate the offset. At the moment |
| ; it reuses the original though. |
| ; CHECK-WITHOUT-LDRD-DAG: ldm [[ADDRREG]], {r{{[0-9]+}}, r{{[0-9]+}}} |
| ; CHECK-WITHOUT-LDRD-DAG: ldm sp, {r{{[0-9]+}}, r{{[0-9]+}}} |
| |
| store volatile i64 %val1, ptr %addr |
| store volatile i64 %val2, ptr %addr |
| store volatile i64 %val3, ptr %addr |
| store volatile i64 %val4, ptr %addr |
| store volatile i64 %val5, ptr %addr |
| store volatile i64 %val6, ptr %addr |
| store volatile i64 %val7, ptr %addr |
| ret void |
| } |