| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| ; RUN: llc < %s -mtriple=aarch64 | FileCheck %s --check-prefixes=CHECK,CHECK-CVT |
| ; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-FP16 |
| |
| ; |
| ; 32-bit float to unsigned integer |
| ; |
| |
| declare i1 @llvm.fptoui.sat.i1.f32 (float) |
| declare i8 @llvm.fptoui.sat.i8.f32 (float) |
| declare i13 @llvm.fptoui.sat.i13.f32 (float) |
| declare i16 @llvm.fptoui.sat.i16.f32 (float) |
| declare i19 @llvm.fptoui.sat.i19.f32 (float) |
| declare i32 @llvm.fptoui.sat.i32.f32 (float) |
| declare i50 @llvm.fptoui.sat.i50.f32 (float) |
| declare i64 @llvm.fptoui.sat.i64.f32 (float) |
| declare i100 @llvm.fptoui.sat.i100.f32(float) |
| declare i128 @llvm.fptoui.sat.i128.f32(float) |
| |
| define i1 @test_unsigned_i1_f32(float %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i1_f32: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: fcvtzu w8, s0 |
| ; CHECK-NEXT: cmp w8, #1 |
| ; CHECK-NEXT: csinc w0, w8, wzr, lo |
| ; CHECK-NEXT: ret |
| %x = call i1 @llvm.fptoui.sat.i1.f32(float %f) |
| ret i1 %x |
| } |
| |
| define i8 @test_unsigned_i8_f32(float %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i8_f32: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: fcvtzu w9, s0 |
| ; CHECK-NEXT: mov w8, #255 // =0xff |
| ; CHECK-NEXT: cmp w9, #255 |
| ; CHECK-NEXT: csel w0, w9, w8, lo |
| ; CHECK-NEXT: ret |
| %x = call i8 @llvm.fptoui.sat.i8.f32(float %f) |
| ret i8 %x |
| } |
| |
| define i13 @test_unsigned_i13_f32(float %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i13_f32: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: fcvtzu w8, s0 |
| ; CHECK-NEXT: mov w9, #8191 // =0x1fff |
| ; CHECK-NEXT: cmp w8, w9 |
| ; CHECK-NEXT: csel w0, w8, w9, lo |
| ; CHECK-NEXT: ret |
| %x = call i13 @llvm.fptoui.sat.i13.f32(float %f) |
| ret i13 %x |
| } |
| |
| define i16 @test_unsigned_i16_f32(float %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i16_f32: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: fcvtzu w8, s0 |
| ; CHECK-NEXT: mov w9, #65535 // =0xffff |
| ; CHECK-NEXT: cmp w8, w9 |
| ; CHECK-NEXT: csel w0, w8, w9, lo |
| ; CHECK-NEXT: ret |
| %x = call i16 @llvm.fptoui.sat.i16.f32(float %f) |
| ret i16 %x |
| } |
| |
| define i19 @test_unsigned_i19_f32(float %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i19_f32: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: fcvtzu w8, s0 |
| ; CHECK-NEXT: mov w9, #524287 // =0x7ffff |
| ; CHECK-NEXT: cmp w8, w9 |
| ; CHECK-NEXT: csel w0, w8, w9, lo |
| ; CHECK-NEXT: ret |
| %x = call i19 @llvm.fptoui.sat.i19.f32(float %f) |
| ret i19 %x |
| } |
| |
| define i32 @test_unsigned_i32_f32(float %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i32_f32: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: fcvtzu w0, s0 |
| ; CHECK-NEXT: ret |
| %x = call i32 @llvm.fptoui.sat.i32.f32(float %f) |
| ret i32 %x |
| } |
| |
| define i50 @test_unsigned_i50_f32(float %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i50_f32: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: fcvtzu x8, s0 |
| ; CHECK-NEXT: mov x9, #1125899906842623 // =0x3ffffffffffff |
| ; CHECK-NEXT: cmp x8, x9 |
| ; CHECK-NEXT: csel x0, x8, x9, lo |
| ; CHECK-NEXT: ret |
| %x = call i50 @llvm.fptoui.sat.i50.f32(float %f) |
| ret i50 %x |
| } |
| |
| define i64 @test_unsigned_i64_f32(float %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i64_f32: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: fcvtzu x0, s0 |
| ; CHECK-NEXT: ret |
| %x = call i64 @llvm.fptoui.sat.i64.f32(float %f) |
| ret i64 %x |
| } |
| |
| define i100 @test_unsigned_i100_f32(float %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i100_f32: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill |
| ; CHECK-NEXT: str x30, [sp, #8] // 8-byte Folded Spill |
| ; CHECK-NEXT: fmov s8, s0 |
| ; CHECK-NEXT: bl __fixunssfti |
| ; CHECK-NEXT: mov w8, #1904214015 // =0x717fffff |
| ; CHECK-NEXT: fcmp s8, #0.0 |
| ; CHECK-NEXT: mov x10, #68719476735 // =0xfffffffff |
| ; CHECK-NEXT: fmov s0, w8 |
| ; CHECK-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload |
| ; CHECK-NEXT: csel x8, xzr, x0, lt |
| ; CHECK-NEXT: csel x9, xzr, x1, lt |
| ; CHECK-NEXT: fcmp s8, s0 |
| ; CHECK-NEXT: csel x1, x10, x9, gt |
| ; CHECK-NEXT: csinv x0, x8, xzr, le |
| ; CHECK-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload |
| ; CHECK-NEXT: ret |
| %x = call i100 @llvm.fptoui.sat.i100.f32(float %f) |
| ret i100 %x |
| } |
| |
| define i128 @test_unsigned_i128_f32(float %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i128_f32: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill |
| ; CHECK-NEXT: str x30, [sp, #8] // 8-byte Folded Spill |
| ; CHECK-NEXT: fmov s8, s0 |
| ; CHECK-NEXT: bl __fixunssfti |
| ; CHECK-NEXT: mov w8, #2139095039 // =0x7f7fffff |
| ; CHECK-NEXT: fcmp s8, #0.0 |
| ; CHECK-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload |
| ; CHECK-NEXT: fmov s0, w8 |
| ; CHECK-NEXT: csel x8, xzr, x1, lt |
| ; CHECK-NEXT: csel x9, xzr, x0, lt |
| ; CHECK-NEXT: fcmp s8, s0 |
| ; CHECK-NEXT: csinv x0, x9, xzr, le |
| ; CHECK-NEXT: csinv x1, x8, xzr, le |
| ; CHECK-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload |
| ; CHECK-NEXT: ret |
| %x = call i128 @llvm.fptoui.sat.i128.f32(float %f) |
| ret i128 %x |
| } |
| |
| ; |
| ; 64-bit float to unsigned integer |
| ; |
| |
| declare i1 @llvm.fptoui.sat.i1.f64 (double) |
| declare i8 @llvm.fptoui.sat.i8.f64 (double) |
| declare i13 @llvm.fptoui.sat.i13.f64 (double) |
| declare i16 @llvm.fptoui.sat.i16.f64 (double) |
| declare i19 @llvm.fptoui.sat.i19.f64 (double) |
| declare i32 @llvm.fptoui.sat.i32.f64 (double) |
| declare i50 @llvm.fptoui.sat.i50.f64 (double) |
| declare i64 @llvm.fptoui.sat.i64.f64 (double) |
| declare i100 @llvm.fptoui.sat.i100.f64(double) |
| declare i128 @llvm.fptoui.sat.i128.f64(double) |
| |
| define i1 @test_unsigned_i1_f64(double %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i1_f64: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: fcvtzu w8, d0 |
| ; CHECK-NEXT: cmp w8, #1 |
| ; CHECK-NEXT: csinc w0, w8, wzr, lo |
| ; CHECK-NEXT: ret |
| %x = call i1 @llvm.fptoui.sat.i1.f64(double %f) |
| ret i1 %x |
| } |
| |
| define i8 @test_unsigned_i8_f64(double %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i8_f64: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: fcvtzu w9, d0 |
| ; CHECK-NEXT: mov w8, #255 // =0xff |
| ; CHECK-NEXT: cmp w9, #255 |
| ; CHECK-NEXT: csel w0, w9, w8, lo |
| ; CHECK-NEXT: ret |
| %x = call i8 @llvm.fptoui.sat.i8.f64(double %f) |
| ret i8 %x |
| } |
| |
| define i13 @test_unsigned_i13_f64(double %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i13_f64: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: fcvtzu w8, d0 |
| ; CHECK-NEXT: mov w9, #8191 // =0x1fff |
| ; CHECK-NEXT: cmp w8, w9 |
| ; CHECK-NEXT: csel w0, w8, w9, lo |
| ; CHECK-NEXT: ret |
| %x = call i13 @llvm.fptoui.sat.i13.f64(double %f) |
| ret i13 %x |
| } |
| |
| define i16 @test_unsigned_i16_f64(double %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i16_f64: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: fcvtzu w8, d0 |
| ; CHECK-NEXT: mov w9, #65535 // =0xffff |
| ; CHECK-NEXT: cmp w8, w9 |
| ; CHECK-NEXT: csel w0, w8, w9, lo |
| ; CHECK-NEXT: ret |
| %x = call i16 @llvm.fptoui.sat.i16.f64(double %f) |
| ret i16 %x |
| } |
| |
| define i19 @test_unsigned_i19_f64(double %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i19_f64: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: fcvtzu w8, d0 |
| ; CHECK-NEXT: mov w9, #524287 // =0x7ffff |
| ; CHECK-NEXT: cmp w8, w9 |
| ; CHECK-NEXT: csel w0, w8, w9, lo |
| ; CHECK-NEXT: ret |
| %x = call i19 @llvm.fptoui.sat.i19.f64(double %f) |
| ret i19 %x |
| } |
| |
| define i32 @test_unsigned_i32_f64(double %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i32_f64: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: fcvtzu w0, d0 |
| ; CHECK-NEXT: ret |
| %x = call i32 @llvm.fptoui.sat.i32.f64(double %f) |
| ret i32 %x |
| } |
| |
| define i50 @test_unsigned_i50_f64(double %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i50_f64: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: fcvtzu x8, d0 |
| ; CHECK-NEXT: mov x9, #1125899906842623 // =0x3ffffffffffff |
| ; CHECK-NEXT: cmp x8, x9 |
| ; CHECK-NEXT: csel x0, x8, x9, lo |
| ; CHECK-NEXT: ret |
| %x = call i50 @llvm.fptoui.sat.i50.f64(double %f) |
| ret i50 %x |
| } |
| |
| define i64 @test_unsigned_i64_f64(double %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i64_f64: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: fcvtzu x0, d0 |
| ; CHECK-NEXT: ret |
| %x = call i64 @llvm.fptoui.sat.i64.f64(double %f) |
| ret i64 %x |
| } |
| |
| define i100 @test_unsigned_i100_f64(double %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i100_f64: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill |
| ; CHECK-NEXT: str x30, [sp, #8] // 8-byte Folded Spill |
| ; CHECK-NEXT: fmov d8, d0 |
| ; CHECK-NEXT: bl __fixunsdfti |
| ; CHECK-NEXT: mov x8, #5057542381537067007 // =0x462fffffffffffff |
| ; CHECK-NEXT: fcmp d8, #0.0 |
| ; CHECK-NEXT: mov x10, #68719476735 // =0xfffffffff |
| ; CHECK-NEXT: fmov d0, x8 |
| ; CHECK-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload |
| ; CHECK-NEXT: csel x8, xzr, x0, lt |
| ; CHECK-NEXT: csel x9, xzr, x1, lt |
| ; CHECK-NEXT: fcmp d8, d0 |
| ; CHECK-NEXT: csel x1, x10, x9, gt |
| ; CHECK-NEXT: csinv x0, x8, xzr, le |
| ; CHECK-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload |
| ; CHECK-NEXT: ret |
| %x = call i100 @llvm.fptoui.sat.i100.f64(double %f) |
| ret i100 %x |
| } |
| |
| define i128 @test_unsigned_i128_f64(double %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i128_f64: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill |
| ; CHECK-NEXT: str x30, [sp, #8] // 8-byte Folded Spill |
| ; CHECK-NEXT: fmov d8, d0 |
| ; CHECK-NEXT: bl __fixunsdfti |
| ; CHECK-NEXT: mov x8, #5183643171103440895 // =0x47efffffffffffff |
| ; CHECK-NEXT: fcmp d8, #0.0 |
| ; CHECK-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload |
| ; CHECK-NEXT: fmov d0, x8 |
| ; CHECK-NEXT: csel x8, xzr, x1, lt |
| ; CHECK-NEXT: csel x9, xzr, x0, lt |
| ; CHECK-NEXT: fcmp d8, d0 |
| ; CHECK-NEXT: csinv x0, x9, xzr, le |
| ; CHECK-NEXT: csinv x1, x8, xzr, le |
| ; CHECK-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload |
| ; CHECK-NEXT: ret |
| %x = call i128 @llvm.fptoui.sat.i128.f64(double %f) |
| ret i128 %x |
| } |
| |
| ; |
| ; 16-bit float to unsigned integer |
| ; |
| |
| declare i1 @llvm.fptoui.sat.i1.f16 (half) |
| declare i8 @llvm.fptoui.sat.i8.f16 (half) |
| declare i13 @llvm.fptoui.sat.i13.f16 (half) |
| declare i16 @llvm.fptoui.sat.i16.f16 (half) |
| declare i19 @llvm.fptoui.sat.i19.f16 (half) |
| declare i32 @llvm.fptoui.sat.i32.f16 (half) |
| declare i50 @llvm.fptoui.sat.i50.f16 (half) |
| declare i64 @llvm.fptoui.sat.i64.f16 (half) |
| declare i100 @llvm.fptoui.sat.i100.f16(half) |
| declare i128 @llvm.fptoui.sat.i128.f16(half) |
| |
| define i1 @test_unsigned_i1_f16(half %f) nounwind { |
| ; CHECK-CVT-LABEL: test_unsigned_i1_f16: |
| ; CHECK-CVT: // %bb.0: |
| ; CHECK-CVT-NEXT: fcvt s0, h0 |
| ; CHECK-CVT-NEXT: fcvtzu w8, s0 |
| ; CHECK-CVT-NEXT: cmp w8, #1 |
| ; CHECK-CVT-NEXT: csinc w0, w8, wzr, lo |
| ; CHECK-CVT-NEXT: ret |
| ; |
| ; CHECK-FP16-LABEL: test_unsigned_i1_f16: |
| ; CHECK-FP16: // %bb.0: |
| ; CHECK-FP16-NEXT: fcvtzu w8, h0 |
| ; CHECK-FP16-NEXT: cmp w8, #1 |
| ; CHECK-FP16-NEXT: csinc w0, w8, wzr, lo |
| ; CHECK-FP16-NEXT: ret |
| %x = call i1 @llvm.fptoui.sat.i1.f16(half %f) |
| ret i1 %x |
| } |
| |
| define i8 @test_unsigned_i8_f16(half %f) nounwind { |
| ; CHECK-CVT-LABEL: test_unsigned_i8_f16: |
| ; CHECK-CVT: // %bb.0: |
| ; CHECK-CVT-NEXT: fcvt s0, h0 |
| ; CHECK-CVT-NEXT: mov w8, #255 // =0xff |
| ; CHECK-CVT-NEXT: fcvtzu w9, s0 |
| ; CHECK-CVT-NEXT: cmp w9, #255 |
| ; CHECK-CVT-NEXT: csel w0, w9, w8, lo |
| ; CHECK-CVT-NEXT: ret |
| ; |
| ; CHECK-FP16-LABEL: test_unsigned_i8_f16: |
| ; CHECK-FP16: // %bb.0: |
| ; CHECK-FP16-NEXT: fcvtzu w9, h0 |
| ; CHECK-FP16-NEXT: mov w8, #255 // =0xff |
| ; CHECK-FP16-NEXT: cmp w9, #255 |
| ; CHECK-FP16-NEXT: csel w0, w9, w8, lo |
| ; CHECK-FP16-NEXT: ret |
| %x = call i8 @llvm.fptoui.sat.i8.f16(half %f) |
| ret i8 %x |
| } |
| |
| define i13 @test_unsigned_i13_f16(half %f) nounwind { |
| ; CHECK-CVT-LABEL: test_unsigned_i13_f16: |
| ; CHECK-CVT: // %bb.0: |
| ; CHECK-CVT-NEXT: fcvt s0, h0 |
| ; CHECK-CVT-NEXT: mov w9, #8191 // =0x1fff |
| ; CHECK-CVT-NEXT: fcvtzu w8, s0 |
| ; CHECK-CVT-NEXT: cmp w8, w9 |
| ; CHECK-CVT-NEXT: csel w0, w8, w9, lo |
| ; CHECK-CVT-NEXT: ret |
| ; |
| ; CHECK-FP16-LABEL: test_unsigned_i13_f16: |
| ; CHECK-FP16: // %bb.0: |
| ; CHECK-FP16-NEXT: fcvtzu w8, h0 |
| ; CHECK-FP16-NEXT: mov w9, #8191 // =0x1fff |
| ; CHECK-FP16-NEXT: cmp w8, w9 |
| ; CHECK-FP16-NEXT: csel w0, w8, w9, lo |
| ; CHECK-FP16-NEXT: ret |
| %x = call i13 @llvm.fptoui.sat.i13.f16(half %f) |
| ret i13 %x |
| } |
| |
| define i16 @test_unsigned_i16_f16(half %f) nounwind { |
| ; CHECK-CVT-LABEL: test_unsigned_i16_f16: |
| ; CHECK-CVT: // %bb.0: |
| ; CHECK-CVT-NEXT: fcvt s0, h0 |
| ; CHECK-CVT-NEXT: mov w9, #65535 // =0xffff |
| ; CHECK-CVT-NEXT: fcvtzu w8, s0 |
| ; CHECK-CVT-NEXT: cmp w8, w9 |
| ; CHECK-CVT-NEXT: csel w0, w8, w9, lo |
| ; CHECK-CVT-NEXT: ret |
| ; |
| ; CHECK-FP16-LABEL: test_unsigned_i16_f16: |
| ; CHECK-FP16: // %bb.0: |
| ; CHECK-FP16-NEXT: fcvtzu w8, h0 |
| ; CHECK-FP16-NEXT: mov w9, #65535 // =0xffff |
| ; CHECK-FP16-NEXT: cmp w8, w9 |
| ; CHECK-FP16-NEXT: csel w0, w8, w9, lo |
| ; CHECK-FP16-NEXT: ret |
| %x = call i16 @llvm.fptoui.sat.i16.f16(half %f) |
| ret i16 %x |
| } |
| |
| define i19 @test_unsigned_i19_f16(half %f) nounwind { |
| ; CHECK-CVT-LABEL: test_unsigned_i19_f16: |
| ; CHECK-CVT: // %bb.0: |
| ; CHECK-CVT-NEXT: fcvt s0, h0 |
| ; CHECK-CVT-NEXT: mov w9, #524287 // =0x7ffff |
| ; CHECK-CVT-NEXT: fcvtzu w8, s0 |
| ; CHECK-CVT-NEXT: cmp w8, w9 |
| ; CHECK-CVT-NEXT: csel w0, w8, w9, lo |
| ; CHECK-CVT-NEXT: ret |
| ; |
| ; CHECK-FP16-LABEL: test_unsigned_i19_f16: |
| ; CHECK-FP16: // %bb.0: |
| ; CHECK-FP16-NEXT: fcvtzu w8, h0 |
| ; CHECK-FP16-NEXT: mov w9, #524287 // =0x7ffff |
| ; CHECK-FP16-NEXT: cmp w8, w9 |
| ; CHECK-FP16-NEXT: csel w0, w8, w9, lo |
| ; CHECK-FP16-NEXT: ret |
| %x = call i19 @llvm.fptoui.sat.i19.f16(half %f) |
| ret i19 %x |
| } |
| |
| define i32 @test_unsigned_i32_f16(half %f) nounwind { |
| ; CHECK-CVT-LABEL: test_unsigned_i32_f16: |
| ; CHECK-CVT: // %bb.0: |
| ; CHECK-CVT-NEXT: fcvt s0, h0 |
| ; CHECK-CVT-NEXT: fcvtzu w0, s0 |
| ; CHECK-CVT-NEXT: ret |
| ; |
| ; CHECK-FP16-LABEL: test_unsigned_i32_f16: |
| ; CHECK-FP16: // %bb.0: |
| ; CHECK-FP16-NEXT: fcvtzu w0, h0 |
| ; CHECK-FP16-NEXT: ret |
| %x = call i32 @llvm.fptoui.sat.i32.f16(half %f) |
| ret i32 %x |
| } |
| |
| define i50 @test_unsigned_i50_f16(half %f) nounwind { |
| ; CHECK-CVT-LABEL: test_unsigned_i50_f16: |
| ; CHECK-CVT: // %bb.0: |
| ; CHECK-CVT-NEXT: fcvt s0, h0 |
| ; CHECK-CVT-NEXT: mov x9, #1125899906842623 // =0x3ffffffffffff |
| ; CHECK-CVT-NEXT: fcvtzu x8, s0 |
| ; CHECK-CVT-NEXT: cmp x8, x9 |
| ; CHECK-CVT-NEXT: csel x0, x8, x9, lo |
| ; CHECK-CVT-NEXT: ret |
| ; |
| ; CHECK-FP16-LABEL: test_unsigned_i50_f16: |
| ; CHECK-FP16: // %bb.0: |
| ; CHECK-FP16-NEXT: fcvtzu x8, h0 |
| ; CHECK-FP16-NEXT: mov x9, #1125899906842623 // =0x3ffffffffffff |
| ; CHECK-FP16-NEXT: cmp x8, x9 |
| ; CHECK-FP16-NEXT: csel x0, x8, x9, lo |
| ; CHECK-FP16-NEXT: ret |
| %x = call i50 @llvm.fptoui.sat.i50.f16(half %f) |
| ret i50 %x |
| } |
| |
| define i64 @test_unsigned_i64_f16(half %f) nounwind { |
| ; CHECK-CVT-LABEL: test_unsigned_i64_f16: |
| ; CHECK-CVT: // %bb.0: |
| ; CHECK-CVT-NEXT: fcvt s0, h0 |
| ; CHECK-CVT-NEXT: fcvtzu x0, s0 |
| ; CHECK-CVT-NEXT: ret |
| ; |
| ; CHECK-FP16-LABEL: test_unsigned_i64_f16: |
| ; CHECK-FP16: // %bb.0: |
| ; CHECK-FP16-NEXT: fcvtzu x0, h0 |
| ; CHECK-FP16-NEXT: ret |
| %x = call i64 @llvm.fptoui.sat.i64.f16(half %f) |
| ret i64 %x |
| } |
| |
| define i100 @test_unsigned_i100_f16(half %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i100_f16: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill |
| ; CHECK-NEXT: fcvt s8, h0 |
| ; CHECK-NEXT: str x30, [sp, #8] // 8-byte Folded Spill |
| ; CHECK-NEXT: fmov s0, s8 |
| ; CHECK-NEXT: bl __fixunssfti |
| ; CHECK-NEXT: mov w8, #1904214015 // =0x717fffff |
| ; CHECK-NEXT: fcmp s8, #0.0 |
| ; CHECK-NEXT: mov x10, #68719476735 // =0xfffffffff |
| ; CHECK-NEXT: fmov s0, w8 |
| ; CHECK-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload |
| ; CHECK-NEXT: csel x8, xzr, x0, lt |
| ; CHECK-NEXT: csel x9, xzr, x1, lt |
| ; CHECK-NEXT: fcmp s8, s0 |
| ; CHECK-NEXT: csel x1, x10, x9, gt |
| ; CHECK-NEXT: csinv x0, x8, xzr, le |
| ; CHECK-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload |
| ; CHECK-NEXT: ret |
| %x = call i100 @llvm.fptoui.sat.i100.f16(half %f) |
| ret i100 %x |
| } |
| |
| define i128 @test_unsigned_i128_f16(half %f) nounwind { |
| ; CHECK-LABEL: test_unsigned_i128_f16: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill |
| ; CHECK-NEXT: fcvt s8, h0 |
| ; CHECK-NEXT: str x30, [sp, #8] // 8-byte Folded Spill |
| ; CHECK-NEXT: fmov s0, s8 |
| ; CHECK-NEXT: bl __fixunssfti |
| ; CHECK-NEXT: mov w8, #2139095039 // =0x7f7fffff |
| ; CHECK-NEXT: fcmp s8, #0.0 |
| ; CHECK-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload |
| ; CHECK-NEXT: fmov s0, w8 |
| ; CHECK-NEXT: csel x8, xzr, x1, lt |
| ; CHECK-NEXT: csel x9, xzr, x0, lt |
| ; CHECK-NEXT: fcmp s8, s0 |
| ; CHECK-NEXT: csinv x0, x9, xzr, le |
| ; CHECK-NEXT: csinv x1, x8, xzr, le |
| ; CHECK-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload |
| ; CHECK-NEXT: ret |
| %x = call i128 @llvm.fptoui.sat.i128.f16(half %f) |
| ret i128 %x |
| } |