)]}'
{
  "commit": "458e9c452c103189865632657504174b24b91630",
  "tree": "7d088fe4f0ce9d5f93f59b227881b0e2f2255144",
  "parents": [
    "f9b5aedf6537dee0aa26c70fed32d67755e18a80"
  ],
  "author": {
    "name": "JaberwockySeamonstah",
    "email": "76793519+JaberwockySeamonstah@users.noreply.github.com",
    "time": "Tue Apr 21 02:32:35 2026 +0100"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Tue Apr 21 09:32:35 2026 +0800"
  },
  "message": "Prevent undefined behavior caused by combination of branch and load delay slots on MIPS1 (#185427)\n\nUnder certain conditions the LLVM `MipsDelaySlotFiller` fills a branch\ndelay slot with an instruction requiring a load delay slot. However the\n`MipsDelaySlotFiller` does not check the filled instruction for hazard\nwhich leads to code like this:\n```asm\n\tbeqz\t$1, $BB0_5\n\tlbu\t$2, %lo(_RNvCs5jWYnRsDZoD_3app13CONTROLLERS_A)($2)\n# --- Some other instructions\n$BB0_5:\n\tandi\t$1, $2, 1\n```\n`lbu` got moved into the branch delay slot but has a load delay slot -\nso when jumping to `$BB0_5` the value for `$2` will not be ready, which\nleads to undefined behavior.\n\nThis PR suggests to declare instructions with a load delay slot to be\nhazardous for the branch delay slot, only for `MIPS1`. This will prevent\nthe load instructions in the branch delay slot, which has a slight\nimpact on the optimization.\n\nIdeally in case of a load instruction in a branch delay slot, we would\nwant to check the target register and check if it is used in the\nfollowing instruction and at the branch destination instruction. Code\nfor this is already in place from a previous PR (`bool\nMipsInstrInfo::SafeInLoadDelaySlot(const MachineInstr \u0026MIInSlot, const\nMachineInstr \u0026LoadMI) const`), however I\u0027m not experienced enough with\nthe LLVM to identify the `MachineInstr` required for that ideal\nsituation.\n\nIf I could get some feedback about this I might be able to stitch it in.\n\nThe original issue came from Rust and is described [here rust issue\n150676](https://github.com/rust-lang/rust/issues/150676). It was then\nraised in the LLVM project [here issue\n180639](https://github.com/llvm/llvm-project/issues/180639#issuecomment-3874380424)\nand in the forum\n[here](https://discourse.llvm.org/t/where-to-start-fixing-an-opt-pass-for-mips1/89857).\n\nCo-authored-by: Jaby \u003cjaby@william.zone\u003e",
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