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parent 3de88fe40fd0dc5f52ba0bc7ebbaf16e938d6670
author Sudharsan Veeravalli <quic_svs@quicinc.com> 1744782553 +0530
committer GitHub <noreply@github.com> 1744782553 +0530
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[RISCV] Add basic ISel patterns for Xqcilo instructions (#135901)

This patch adds basic instruction selection patterns for generating the
48 bit load/store instructions that are a part of the Qualcomm uC Xqcilo
vendor extension.