)]}'
{
  "id": "e6d1bc7717cb0c214d72d32ff4bff3dc0bdf6373",
  "repo": "llvm-project",
  "revision": "3f954f575156bce8ac81d6b4d94de443786befed",
  "path": "llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-assert-align.mir"
}