| commit | 3f46af98caa2d0c3b8dcde02f0cc08fde03376c9 | [log] [tgz] |
|---|---|---|
| author | Sam Elliott <quic_aelliott@quicinc.com> | Mon Apr 28 08:12:45 2025 -0700 |
| committer | GitHub <noreply@github.com> | Mon Apr 28 08:12:45 2025 -0700 |
| tree | 72353465812c39af9a895efdaf45886cccdcf9d6 | |
| parent | 258e1438c23c20cfe5c4908633401ab0adf4a364 [diff] |
[RISCV] Support Push/Pop with Xqci (#134191)
The `qc.c.mienter` and `qc.c.mienter.nest` instructions, broadly only
save the argument and temporary registers. The exceptions are that they
also save `fp` (`s0`) to construct a frame chain from the signal handler
to the frame below, and they also save `ra`. They are designed this way
so that (if needed) push and pop instructions can be used to save the
callee-saved registers.
This patch implements this optimisation, constructing the following
rather than a long sequence of `sw` and `lw` instructions for saving the
callee-saved registers:
```asm
qc.c.mienter
qc.cm.push {ra, s0-sN}, -M
...
qc.cm.pop {ra, s0-sN}, M
qc.c.mileaveret
```
There are some carefully-worked-out details here, especially around CFI
information. For any register saved by both `qc.c.mienter(.nest)` and
the push (which is `ra` and `s0` at most), we point the CFI information
at the version saved by `qc.c.mienter(.nest)`. This ensures the CFI
points at the same `fp` copy as a frame pointer unwinder would find.
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