| commit | 3b17d041dd775e033cca499f2a25548c8c22bb86 | [log] [tgz] |
|---|---|---|
| author | Benjamin Maxwell <benjamin.maxwell@arm.com> | Mon Dec 16 10:23:40 2024 +0000 |
| committer | GitHub <noreply@github.com> | Mon Dec 16 10:23:40 2024 +0000 |
| tree | 85c50e2e0630146abfbb3862db7dcf548a2b03c3 | |
| parent | aff3e68d6f10dd3087c29a09865683b9d35a362e [diff] |
[AArch64][SVE] Don't require 16-byte aligned SVE loads/stores with +strict-align (#119732) Instead, allow any alignment >= the element size (in bytes). This is all that is needed for (predicated) vector loads even if unaligned accesses are disabled. See: https://developer.arm.com/documentation/ddi0602/2024-09/Shared-Pseudocode/aarch64-functions-memory?lang=en#impl-aarch64.Mem.read.3 Specifically: ``` // Check alignment on size of element accessed, not overall access size. constant integer alignment = if accdesc.ispair then size DIV 2 else size; ``` The `size` passed to `Mem` by SVE load/store instructions is the element size.
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