[AMDGPU] - Add address space for strided buffers (#74471)
This is an experimental address space for strided buffers. These buffers
can have structs as elements and
a stride > 1.
These pointers allow the indexed access in units of stride, i.e., they
point at `buffer[index * stride]`.
Thus, we can use the `idxen` modifier for buffer loads.
We assign address space 9 to 192-bit buffer pointers which contain a
128-bit descriptor, a 32-bit offset and a 32-bit index. Essentially,
they are fat buffer pointers with an additional 32-bit index.
diff --git a/llvm/test/CodeGen/AMDGPU/nullptr.ll b/llvm/test/CodeGen/AMDGPU/nullptr.ll
index eab5cc8..513332a 100644
--- a/llvm/test/CodeGen/AMDGPU/nullptr.ll
+++ b/llvm/test/CodeGen/AMDGPU/nullptr.ll
@@ -38,9 +38,9 @@
; FIXME-R600-NEXT: .long 0
; FIXME @nullptr8 = global ptr addrspace(8) addrspacecast (ptr null to ptr addrspace(8))
-; CHECK-LABEL: nullptr9:
-; R600-NEXT: .long 0
-@nullptr9 = global ptr addrspace(9) addrspacecast (ptr null to ptr addrspace(9))
+; FIXME-LABEL: nullptr9:
+; FIXME-R600-NEXT: .long 0
+; FIXME @nullptr9 = global ptr addrspace(9) addrspacecast (ptr null to ptr addrspace(9))
; CHECK-LABEL: nullptr10:
; R600-NEXT: .long 0
