)]}'
{
  "commit": "31daed868d69ac1ac6f6a29340d0b5e0e6dc39ab",
  "tree": "d0216a279e2695f4aaec7419a7ccc3da8acdf27e",
  "parents": [
    "56548e1d9b2ed4f5d2fe3913c27af770cf0e06e5"
  ],
  "author": {
    "name": "Sudharsan Veeravalli",
    "email": "quic_svs@quicinc.com",
    "time": "Thu Jun 12 22:01:11 2025 +0530"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Thu Jun 12 22:01:11 2025 +0530"
  },
  "message": "[RISCV] Prefer QC_EXTU to ANDI for certain 12-bit mask immediates (#143838)\n\n`QC_EXTU` can be compressed to `QC_C_EXTU` when the immediate is a `mask\n\u003e\u003d63`. We currently only handle masks that don\u0027t fit in 12-bits in\n`RISCVISelDAGToDAG`.\n\nI have added ISEL patterns in `RISCVInstrInfoXqci.td` instead of\nchanging code in `RISCVISelDAGToDAG` since the other extract\ninstructions ( in `XTHeadbb` and `XAndesPerf`) don\u0027t have compressed\nversions and it is a lot easier to maintain things this way.",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "dba035bab928ca2e7bf199736e4b74ba844e0deb",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td",
      "new_id": "9f96a3ed80561ef15c4a1fbf35b8c6d77d1cf85a",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td"
    },
    {
      "type": "modify",
      "old_id": "cb01510058da4c793d423e94a45923e38da972da",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/RISCV/xqcibm-extract.ll",
      "new_id": "edf6e9a2d5019f05f073d4bca8a918ffbe458e4c",
      "new_mode": 33188,
      "new_path": "llvm/test/CodeGen/RISCV/xqcibm-extract.ll"
    }
  ]
}