)]}'
{
  "commit": "2a5e3f4c6c2cdd2aab55fbfdb703ca8163351ea9",
  "tree": "0aaa73790f5b3aaa140d9561cc4ccc3785ebba43",
  "parents": [
    "165f45a877742a74988d63f36aee635c8e0a47da"
  ],
  "author": {
    "name": "Craig Topper",
    "email": "craig.topper@sifive.com",
    "time": "Thu Aug 03 08:12:00 2023 -0700"
  },
  "committer": {
    "name": "Craig Topper",
    "email": "craig.topper@sifive.com",
    "time": "Thu Aug 03 08:12:01 2023 -0700"
  },
  "message": "[X86] Workaround possible CPUID bug in Sandy Bridge.\n\nDon\u0027t access leaf 7 subleaf 1 unless subleaf 0 says it is\nsupported via EAX.\n\nIntel documentation says invalid subleaves return 0. We had been\nrelying on that behavior instead of checking the max sublef number.\n\nIt appears that some Sandy Bridge CPUs return at least the subleaf 0\nEDX value for subleaf 1. Best guess is that this is a bug in a\nmicrocode patch since all of the bits we\u0027re seeing set in EDX were\nintroduced after Sandy Bridge was originally released.\n\nThis is causing avxvnniint16 to be incorrectly enabled with -march\u003dnative\non these CPUs.\n\nReviewed By: pengfei, anna\n\nDifferential Revision: https://reviews.llvm.org/D156963\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "b4663027d2e7b14d18afa4583b49c501455009cd",
      "old_mode": 33188,
      "old_path": "compiler-rt/lib/builtins/cpu_model.c",
      "new_id": "3be5a95ea9f62b93def165b4091abae51f15d475",
      "new_mode": 33188,
      "new_path": "compiler-rt/lib/builtins/cpu_model.c"
    },
    {
      "type": "modify",
      "old_id": "1141df09307cb72aeab4647598908028170536c0",
      "old_mode": 33188,
      "old_path": "llvm/lib/TargetParser/Host.cpp",
      "new_id": "1c4feff26d9848891be8e837a1a2e5f44ead032b",
      "new_mode": 33188,
      "new_path": "llvm/lib/TargetParser/Host.cpp"
    }
  ]
}